From cef96902ad2c5eb20b8b43741238e85089770555 Mon Sep 17 00:00:00 2001 From: Matthias Koefferlein Date: Tue, 9 Jul 2019 19:55:48 +0200 Subject: [PATCH] Boundary for circuits, reverted automatic generation of global pins - global pins have been generated for device cells too and lead to implicit pins which may not be desired. The original problem was how to make abstract circuits comparable. This has to be solved differently. - Circuit boundaries are good for displaying the boxes for abstract circuits --- src/db/db/dbHierNetworkProcessor.cc | 12 ------------ src/db/db/dbNetlistCompare.cc | 17 +++++++++-------- src/db/unit_tests/dbNetlistTests.cc | 3 +++ testdata/algo/l2n_writer_au.txt | 6 ++++++ testdata/algo/l2n_writer_au_2.txt | 9 +++++++++ testdata/algo/l2n_writer_au_2s.txt | 3 +++ testdata/algo/l2n_writer_au_s.txt | 2 ++ testdata/algo/lvs_test1_au.lvsdb | 9 +++++++++ testdata/algo/lvs_test1b_au.lvsdb | 9 +++++++++ testdata/algo/lvs_test2_au.lvsdb | 9 +++++++++ testdata/algo/lvs_test2b_au.lvsdb | 9 +++++++++ testdata/lvs/inv.lvsdb | 3 +++ testdata/lvs/inv2.lvsdb | 3 +++ testdata/lvs/ringo_simple.lvsdb | 9 +++++++++ .../lvs/ringo_simple_implicit_connections.lvsdb | 9 +++++++++ testdata/lvs/ringo_simple_io.lvsdb | 9 +++++++++ testdata/lvs/ringo_simple_io2.l2n | 9 +++++++++ testdata/lvs/ringo_simple_io2.lvsdb | 9 +++++++++ ...ngo_simple_net_and_circuit_equivalence.lvsdb | 9 +++++++++ testdata/lvs/ringo_simple_pin_swapping.lvsdb | 9 +++++++++ .../lvs/ringo_simple_same_device_classes.lvsdb | 9 +++++++++ testdata/lvs/ringo_simple_simplification.lvsdb | 12 ++++++++++++ testdata/ruby/dbNetlist.rb | 3 +++ testdata/ruby/dbNetlistCompare.rb | 2 +- 24 files changed, 162 insertions(+), 21 deletions(-) diff --git a/src/db/db/dbHierNetworkProcessor.cc b/src/db/db/dbHierNetworkProcessor.cc index 8ce6411ec..2005b010c 100644 --- a/src/db/db/dbHierNetworkProcessor.cc +++ b/src/db/db/dbHierNetworkProcessor.cc @@ -2043,25 +2043,13 @@ hier_clusters::build_hier_connections (cell_clusters_box_converter &cbc, c // insert the global nets from here - std::set::global_net_id> gn_seen; for (typename db::connected_clusters::const_iterator cl = local.begin (); cl != local.end (); ++cl) { const typename db::local_cluster::global_nets &gn = cl->get_global_nets (); if (! gn.empty ()) { - gn_seen.insert (gn.begin (), gn.end ()); global_net_clusters.add (gn, db::ClusterInstance (cl->id ())); } } - // add dummy cluster instance for global nets not having any shape on it - - for (size_t gn_id = 0; gn_id < conn.global_nets (); ++gn_id) { - if (gn_seen.find (gn_id) == gn_seen.end ()) { - typename db::local_cluster::global_nets gn; - gn.insert (gn_id); - global_net_clusters.add (gn, db::ClusterInstance ()); - } - } - // now global_net_clusters knows what clusters need to be made for the global nets for (GlobalNetClusterMaker::entry_iterator ge = global_net_clusters.begin (); ge != global_net_clusters.end (); ++ge) { diff --git a/src/db/db/dbNetlistCompare.cc b/src/db/db/dbNetlistCompare.cc index 276e3462d..a94769732 100644 --- a/src/db/db/dbNetlistCompare.cc +++ b/src/db/db/dbNetlistCompare.cc @@ -1303,8 +1303,10 @@ NetGraph::derive_node_identities (size_t net_index, NetGraph &other, size_t dept other_nodes.reserve (ee - e); for (NetGraphNode::edge_iterator i = e; i != ee; ++i) { - const NetGraphNode *n = &node (i->second.first); - nodes.push_back (n); + // @@@ if (i->second.first != net_index) { + const NetGraphNode *nn = &node (i->second.first); + nodes.push_back (nn); + // @@@ } } if (! nodes.empty ()) { // if non-ambiguous, non-assigned @@ -1319,12 +1321,11 @@ NetGraph::derive_node_identities (size_t net_index, NetGraph &other, size_t dept ++ee_other; } - size_t count_other = 0; - for (NetGraphNode::edge_iterator i = e_other; i != ee_other && count_other < 2; ++i) { - - const NetGraphNode *n = &other.node (i->second.first); - other_nodes.push_back (n); - + for (NetGraphNode::edge_iterator i = e_other; i != ee_other; ++i) { + // @@@ if (i->second.first != net_index) { + const NetGraphNode *nn = &other.node (i->second.first); + other_nodes.push_back (nn); + // @@@ } } } diff --git a/src/db/unit_tests/dbNetlistTests.cc b/src/db/unit_tests/dbNetlistTests.cc index cf13e7011..fdffed627 100644 --- a/src/db/unit_tests/dbNetlistTests.cc +++ b/src/db/unit_tests/dbNetlistTests.cc @@ -331,6 +331,9 @@ TEST(3_CircuitBasic) c.set_name ("name"); EXPECT_EQ (c.name (), "name"); + c.set_boundary (db::DPolygon (db::DBox (0, 1, 2, 3))); + EXPECT_EQ (c.boundary ().to_string (), "(0,1;0,3;2,3;2,1)"); + db::Pin p1 = c.add_pin ("p1"); db::Pin p2 = c.add_pin ("p2"); EXPECT_EQ (pins2string (c), "p1#0,p2#1"); diff --git a/testdata/algo/l2n_writer_au.txt b/testdata/algo/l2n_writer_au.txt index d0c7ddf75..6a9228b28 100644 --- a/testdata/algo/l2n_writer_au.txt +++ b/testdata/algo/l2n_writer_au.txt @@ -86,6 +86,9 @@ device(D$NMOS$1 NMOS # Circuits are the hierarchical building blocks of the netlist. circuit(INV2 + # Circuit boundary + rect((-1700 -800) (3100 4600)) + # Nets with their geometries net(1 name(IN) rect(poly (-525 -250) (250 2500)) @@ -209,6 +212,9 @@ circuit(INV2 ) circuit(RINGO + # Circuit boundary + rect((-1720 -800) (26880 4600)) + # Nets with their geometries net(1 name(FB) rect(diff_cont (22850 2490) (220 220)) diff --git a/testdata/algo/l2n_writer_au_2.txt b/testdata/algo/l2n_writer_au_2.txt index 2749416ef..2c615dffc 100644 --- a/testdata/algo/l2n_writer_au_2.txt +++ b/testdata/algo/l2n_writer_au_2.txt @@ -109,6 +109,9 @@ device(D$NMOS$1 NMOS # Circuits are the hierarchical building blocks of the netlist. circuit(INV2 + # Circuit boundary + rect((-1700 -1640) (3100 6220)) + # Nets with their geometries net(1 rect(nwell (-1400 1800) (2800 2780)) @@ -249,6 +252,9 @@ circuit(INV2 ) circuit(INV2PAIR + # Circuit boundary + rect((0 -840) (5740 6220)) + # Nets with their geometries net(1 name(BULK)) net(2 @@ -331,6 +337,9 @@ circuit(INV2PAIR ) circuit(RINGO + # Circuit boundary + rect((-1720 -1640) (26880 6220)) + # Nets with their geometries net(1 name(FB) rect(diff_cont (22850 2490) (220 220)) diff --git a/testdata/algo/l2n_writer_au_2s.txt b/testdata/algo/l2n_writer_au_2s.txt index 559d261b0..7af0f364f 100644 --- a/testdata/algo/l2n_writer_au_2s.txt +++ b/testdata/algo/l2n_writer_au_2s.txt @@ -89,6 +89,7 @@ D(D$NMOS$1 NMOS ) ) X(INV2 + R((-1700 -1640) (3100 6220)) N(1 R(nwell (-1400 1800) (2800 2780)) R(diff_cont (-1510 -650) (220 220)) @@ -222,6 +223,7 @@ X(INV2 ) ) X(INV2PAIR + R((0 -840) (5740 6220)) N(1 I(BULK)) N(2 R(diff_cont (3430 3290) (220 220)) @@ -297,6 +299,7 @@ X(INV2PAIR ) ) X(RINGO + R((-1720 -1640) (26880 6220)) N(1 I(FB) R(diff_cont (22850 2490) (220 220)) R(diff_cont (-220 180) (220 220)) diff --git a/testdata/algo/l2n_writer_au_s.txt b/testdata/algo/l2n_writer_au_s.txt index 47d0ccb8d..84903d827 100644 --- a/testdata/algo/l2n_writer_au_s.txt +++ b/testdata/algo/l2n_writer_au_s.txt @@ -68,6 +68,7 @@ D(D$NMOS$1 NMOS ) ) X(INV2 + R((-1700 -800) (3100 4600)) N(1 I(IN) R(poly (-525 -250) (250 2500)) R(poly (-1425 -630) (1300 360)) @@ -184,6 +185,7 @@ X(INV2 ) ) X(RINGO + R((-1720 -800) (26880 4600)) N(1 I(FB) R(diff_cont (22850 2490) (220 220)) R(diff_cont (-220 180) (220 220)) diff --git a/testdata/algo/lvs_test1_au.lvsdb b/testdata/algo/lvs_test1_au.lvsdb index 8e8112e64..e7277ae3d 100644 --- a/testdata/algo/lvs_test1_au.lvsdb +++ b/testdata/algo/lvs_test1_au.lvsdb @@ -112,6 +112,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(INV2 + # Circuit boundary + rect((-1700 -2440) (3100 7820)) + # Nets with their geometries net(1 rect(nwell (-1400 1800) (2800 3580)) @@ -259,6 +262,9 @@ layout( ) circuit(INV2PAIR + # Circuit boundary + rect((0 -1640) (5740 7820)) + # Nets with their geometries net(1 name(BULK)) net(2 @@ -374,6 +380,9 @@ layout( ) circuit(RINGO + # Circuit boundary + rect((-1720 -2440) (26880 7820)) + # Nets with their geometries net(1 name(FB) rect(diff_cont (20210 90) (220 220)) diff --git a/testdata/algo/lvs_test1b_au.lvsdb b/testdata/algo/lvs_test1b_au.lvsdb index 0c1b4a15e..858b8a2da 100644 --- a/testdata/algo/lvs_test1b_au.lvsdb +++ b/testdata/algo/lvs_test1b_au.lvsdb @@ -112,6 +112,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(INV2 + # Circuit boundary + rect((-1700 -2440) (3100 7820)) + # Nets with their geometries net(1 rect(nwell (-1400 1800) (2800 3580)) @@ -259,6 +262,9 @@ layout( ) circuit(INV2PAIR + # Circuit boundary + rect((0 -1640) (5740 7820)) + # Nets with their geometries net(1 name(BULK)) net(2 @@ -374,6 +380,9 @@ layout( ) circuit(RINGO + # Circuit boundary + rect((-1720 -2440) (26880 7820)) + # Nets with their geometries net(1 name(FB) rect(diff_cont (20210 90) (220 220)) diff --git a/testdata/algo/lvs_test2_au.lvsdb b/testdata/algo/lvs_test2_au.lvsdb index 7510baff2..dfc0ece2b 100644 --- a/testdata/algo/lvs_test2_au.lvsdb +++ b/testdata/algo/lvs_test2_au.lvsdb @@ -112,6 +112,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(INV2 + # Circuit boundary + rect((-1700 -2440) (3100 7820)) + # Nets with their geometries net(1 rect(nwell (-1400 1800) (2800 3580)) @@ -259,6 +262,9 @@ layout( ) circuit(INV2PAIR + # Circuit boundary + rect((0 -1640) (5740 7820)) + # Nets with their geometries net(1 name(BULK)) net(2 @@ -374,6 +380,9 @@ layout( ) circuit(RINGO + # Circuit boundary + rect((-1720 -2440) (26880 7820)) + # Nets with their geometries net(1 name(FB) rect(diff_cont (20210 90) (220 220)) diff --git a/testdata/algo/lvs_test2b_au.lvsdb b/testdata/algo/lvs_test2b_au.lvsdb index 9c1707306..e7fe45287 100644 --- a/testdata/algo/lvs_test2b_au.lvsdb +++ b/testdata/algo/lvs_test2b_au.lvsdb @@ -112,6 +112,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(INV2 + # Circuit boundary + rect((-1700 -2440) (3100 7820)) + # Nets with their geometries net(1 rect(nwell (-1400 1800) (2800 3580)) @@ -259,6 +262,9 @@ layout( ) circuit(INV2PAIR + # Circuit boundary + rect((0 -1640) (5740 7820)) + # Nets with their geometries net(1 name(BULK)) net(2 @@ -374,6 +380,9 @@ layout( ) circuit(RINGO + # Circuit boundary + rect((-1720 -2440) (26880 7820)) + # Nets with their geometries net(1 name(FB) rect(diff_cont (20210 90) (220 220)) diff --git a/testdata/lvs/inv.lvsdb b/testdata/lvs/inv.lvsdb index 6f1013a7b..1e96ba514 100644 --- a/testdata/lvs/inv.lvsdb +++ b/testdata/lvs/inv.lvsdb @@ -77,6 +77,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(INVERTER + # Circuit boundary + rect((0 0) (2000 6150)) + # Nets with their geometries net(1 name(IN) rect(l4 (900 50) (250 1050)) diff --git a/testdata/lvs/inv2.lvsdb b/testdata/lvs/inv2.lvsdb index 144461be3..deada80c9 100644 --- a/testdata/lvs/inv2.lvsdb +++ b/testdata/lvs/inv2.lvsdb @@ -81,6 +81,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(INVERTER_WITH_DIODES + # Circuit boundary + rect((0 0) (3000 6150)) + # Nets with their geometries net(1 name(IN) rect(l4 (900 50) (250 1050)) diff --git a/testdata/lvs/ringo_simple.lvsdb b/testdata/lvs/ringo_simple.lvsdb index cbe51bfb3..5e05088fb 100644 --- a/testdata/lvs/ringo_simple.lvsdb +++ b/testdata/lvs/ringo_simple.lvsdb @@ -133,6 +133,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(ND2X1 + # Circuit boundary + rect((-100 400) (2600 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (1110 5160) (180 180)) @@ -267,6 +270,9 @@ layout( ) circuit(INVX1 + # Circuit boundary + rect((-100 400) (2000 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (410 6260) (180 180)) @@ -351,6 +357,9 @@ layout( ) circuit(RINGO + # Circuit boundary + rect((0 350) (25800 7650)) + # Nets with their geometries net(1 rect(l8 (4710 3010) (180 180)) diff --git a/testdata/lvs/ringo_simple_implicit_connections.lvsdb b/testdata/lvs/ringo_simple_implicit_connections.lvsdb index fac1c0ddc..17d5a4237 100644 --- a/testdata/lvs/ringo_simple_implicit_connections.lvsdb +++ b/testdata/lvs/ringo_simple_implicit_connections.lvsdb @@ -133,6 +133,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(ND2X1 + # Circuit boundary + rect((-100 400) (2600 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (1110 5160) (180 180)) @@ -267,6 +270,9 @@ layout( ) circuit(INVX1 + # Circuit boundary + rect((-100 400) (2000 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (410 6260) (180 180)) @@ -351,6 +357,9 @@ layout( ) circuit(RINGO + # Circuit boundary + rect((0 350) (28300 7650)) + # Nets with their geometries net(1 rect(l8 (5210 3010) (180 180)) diff --git a/testdata/lvs/ringo_simple_io.lvsdb b/testdata/lvs/ringo_simple_io.lvsdb index cbe51bfb3..5e05088fb 100644 --- a/testdata/lvs/ringo_simple_io.lvsdb +++ b/testdata/lvs/ringo_simple_io.lvsdb @@ -133,6 +133,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(ND2X1 + # Circuit boundary + rect((-100 400) (2600 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (1110 5160) (180 180)) @@ -267,6 +270,9 @@ layout( ) circuit(INVX1 + # Circuit boundary + rect((-100 400) (2000 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (410 6260) (180 180)) @@ -351,6 +357,9 @@ layout( ) circuit(RINGO + # Circuit boundary + rect((0 350) (25800 7650)) + # Nets with their geometries net(1 rect(l8 (4710 3010) (180 180)) diff --git a/testdata/lvs/ringo_simple_io2.l2n b/testdata/lvs/ringo_simple_io2.l2n index f59be1b14..7dd408743 100644 --- a/testdata/lvs/ringo_simple_io2.l2n +++ b/testdata/lvs/ringo_simple_io2.l2n @@ -130,6 +130,9 @@ device(D$NMOS$2 NMOS # Circuits are the hierarchical building blocks of the netlist. circuit(ND2X1 + # Circuit boundary + rect((-100 400) (2600 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (1110 5160) (180 180)) @@ -264,6 +267,9 @@ circuit(ND2X1 ) circuit(INVX1 + # Circuit boundary + rect((-100 400) (2000 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (410 6260) (180 180)) @@ -348,6 +354,9 @@ circuit(INVX1 ) circuit(RINGO + # Circuit boundary + rect((0 350) (25800 7650)) + # Nets with their geometries net(1 rect(l8 (4710 3010) (180 180)) diff --git a/testdata/lvs/ringo_simple_io2.lvsdb b/testdata/lvs/ringo_simple_io2.lvsdb index cbe51bfb3..5e05088fb 100644 --- a/testdata/lvs/ringo_simple_io2.lvsdb +++ b/testdata/lvs/ringo_simple_io2.lvsdb @@ -133,6 +133,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(ND2X1 + # Circuit boundary + rect((-100 400) (2600 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (1110 5160) (180 180)) @@ -267,6 +270,9 @@ layout( ) circuit(INVX1 + # Circuit boundary + rect((-100 400) (2000 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (410 6260) (180 180)) @@ -351,6 +357,9 @@ layout( ) circuit(RINGO + # Circuit boundary + rect((0 350) (25800 7650)) + # Nets with their geometries net(1 rect(l8 (4710 3010) (180 180)) diff --git a/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb b/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb index 66ef89e6d..034c13b0a 100644 --- a/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb +++ b/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb @@ -133,6 +133,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(nd2X1 + # Circuit boundary + rect((-100 400) (2600 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (1110 5160) (180 180)) @@ -267,6 +270,9 @@ layout( ) circuit(INV + # Circuit boundary + rect((-100 400) (2000 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (410 6260) (180 180)) @@ -351,6 +357,9 @@ layout( ) circuit(top + # Circuit boundary + rect((0 350) (25800 7650)) + # Nets with their geometries net(1 rect(l8 (4710 3010) (180 180)) diff --git a/testdata/lvs/ringo_simple_pin_swapping.lvsdb b/testdata/lvs/ringo_simple_pin_swapping.lvsdb index fc13e7fed..637bf2b3b 100644 --- a/testdata/lvs/ringo_simple_pin_swapping.lvsdb +++ b/testdata/lvs/ringo_simple_pin_swapping.lvsdb @@ -133,6 +133,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(ND2X1 + # Circuit boundary + rect((-100 400) (2600 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (1110 5160) (180 180)) @@ -267,6 +270,9 @@ layout( ) circuit(INVX1 + # Circuit boundary + rect((-100 400) (2000 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (410 6260) (180 180)) @@ -351,6 +357,9 @@ layout( ) circuit(RINGO + # Circuit boundary + rect((0 350) (25800 7650)) + # Nets with their geometries net(1 rect(l8 (4710 3010) (180 180)) diff --git a/testdata/lvs/ringo_simple_same_device_classes.lvsdb b/testdata/lvs/ringo_simple_same_device_classes.lvsdb index 2449789ae..e174f0c0a 100644 --- a/testdata/lvs/ringo_simple_same_device_classes.lvsdb +++ b/testdata/lvs/ringo_simple_same_device_classes.lvsdb @@ -133,6 +133,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(ND2X1 + # Circuit boundary + rect((-100 400) (2600 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (1110 5160) (180 180)) @@ -267,6 +270,9 @@ layout( ) circuit(INVX1 + # Circuit boundary + rect((-100 400) (2000 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (410 6260) (180 180)) @@ -351,6 +357,9 @@ layout( ) circuit(RINGO + # Circuit boundary + rect((0 350) (25800 7650)) + # Nets with their geometries net(1 rect(l8 (4710 3010) (180 180)) diff --git a/testdata/lvs/ringo_simple_simplification.lvsdb b/testdata/lvs/ringo_simple_simplification.lvsdb index e8e2e73f4..d7c91d5dc 100644 --- a/testdata/lvs/ringo_simple_simplification.lvsdb +++ b/testdata/lvs/ringo_simple_simplification.lvsdb @@ -133,6 +133,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(ND2X1 + # Circuit boundary + rect((-100 400) (2600 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (1110 5160) (180 180)) @@ -267,6 +270,9 @@ layout( ) circuit(INVX1 + # Circuit boundary + rect((-100 400) (2000 7600)) + # Nets with their geometries net(1 name(VDD) rect(l8 (410 6260) (180 180)) @@ -351,6 +357,9 @@ layout( ) circuit(INVX2 + # Circuit boundary + rect((-100 400) (2600 7600)) + # Nets with their geometries net(1 name(IN) rect(l4 (725 2860) (250 1940)) @@ -470,6 +479,9 @@ layout( ) circuit(RINGO + # Circuit boundary + rect((600 350) (25800 7650)) + # Nets with their geometries net(1 rect(l8 (4710 3010) (180 180)) diff --git a/testdata/ruby/dbNetlist.rb b/testdata/ruby/dbNetlist.rb index df5309401..43f2f3a09 100644 --- a/testdata/ruby/dbNetlist.rb +++ b/testdata/ruby/dbNetlist.rb @@ -34,6 +34,9 @@ class DBNetlist_TestClass < TestBase c.name = "XYZ" assert_equal(c.name, "XYZ") + c.boundary = RBA::DPolygon::new(RBA::DBox::new(0, 1, 2, 3)) + assert_equal(c.boundary.to_s, "(0,1;0,3;2,3;2,1)") + c.cell_index = 42 assert_equal(c.cell_index, 42) diff --git a/testdata/ruby/dbNetlistCompare.rb b/testdata/ruby/dbNetlistCompare.rb index 236bf079a..da076e61a 100644 --- a/testdata/ruby/dbNetlistCompare.rb +++ b/testdata/ruby/dbNetlistCompare.rb @@ -200,7 +200,7 @@ device_class_mismatch A (null) device_class_mismatch (null) B END - assert_equal(good, false) + assert_equal(good, true) nls1 = <<"END" circuit INV($1=IN,$2=OUT,$3=VDD,$4=VSS);