From c90f7e4af9908bdaf2f9922b556d883e37cdaeef Mon Sep 17 00:00:00 2001 From: Matthias Koefferlein Date: Sat, 2 Feb 2019 01:29:28 +0100 Subject: [PATCH] Introduced perimeter parameters for MOS3/MOS4 --- src/db/db/dbNetlistDeviceClasses.cc | 23 ++-- src/db/db/dbNetlistDeviceClasses.h | 9 +- src/db/db/dbNetlistDeviceExtractor.cc | 2 +- src/db/db/dbNetlistDeviceExtractor.h | 2 +- src/db/db/dbNetlistDeviceExtractorClasses.cc | 1 + src/db/db/dbNetlistSpiceWriter.cc | 2 + src/db/db/gsiDeclDbNetlistDeviceClasses.cc | 20 +++- .../unit_tests/dbHierNetworkProcessorTests.cc | 6 +- src/db/unit_tests/dbLayoutToNetlistTests.cc | 76 ++++++------- .../unit_tests/dbNetlistDeviceClassesTests.cc | 100 ++++++++++++------ src/db/unit_tests/dbNetlistExtractorTests.cc | 96 ++++++++--------- src/db/unit_tests/dbNetlistWriterTests.cc | 12 +++ testdata/algo/l2n_writer_au.txt | 8 ++ testdata/algo/l2n_writer_au_2.txt | 8 ++ testdata/algo/l2n_writer_au_2s.txt | 8 ++ testdata/algo/l2n_writer_au_s.txt | 8 ++ testdata/algo/nwriter5_au.txt | 4 +- testdata/algo/nwriter6_au.txt | 4 +- testdata/algo/nwriter8_au.txt | 4 +- testdata/ruby/dbLayoutToNetlist.rb | 24 ++--- testdata/ruby/dbNetlistDeviceClasses.rb | 20 ++-- 21 files changed, 278 insertions(+), 159 deletions(-) diff --git a/src/db/db/dbNetlistDeviceClasses.cc b/src/db/db/dbNetlistDeviceClasses.cc index 393653d05..05a1a59c8 100644 --- a/src/db/db/dbNetlistDeviceClasses.cc +++ b/src/db/db/dbNetlistDeviceClasses.cc @@ -199,6 +199,8 @@ DB_PUBLIC size_t DeviceClassMOS3Transistor::param_id_L = 0; DB_PUBLIC size_t DeviceClassMOS3Transistor::param_id_W = 1; DB_PUBLIC size_t DeviceClassMOS3Transistor::param_id_AS = 2; DB_PUBLIC size_t DeviceClassMOS3Transistor::param_id_AD = 3; +DB_PUBLIC size_t DeviceClassMOS3Transistor::param_id_PS = 4; +DB_PUBLIC size_t DeviceClassMOS3Transistor::param_id_PD = 5; DB_PUBLIC size_t DeviceClassMOS3Transistor::terminal_id_S = 0; DB_PUBLIC size_t DeviceClassMOS3Transistor::terminal_id_G = 1; @@ -214,6 +216,8 @@ DeviceClassMOS3Transistor::DeviceClassMOS3Transistor () add_parameter_definition (db::DeviceParameterDefinition ("W", "Gate width (micrometer)", 0.0)); add_parameter_definition (db::DeviceParameterDefinition ("AS", "Source area (square micrometer)", 0.0)); add_parameter_definition (db::DeviceParameterDefinition ("AD", "Drain area (square micrometer)", 0.0)); + add_parameter_definition (db::DeviceParameterDefinition ("PS", "Source perimeter (micrometer)", 0.0)); + add_parameter_definition (db::DeviceParameterDefinition ("PD", "Drain perimeter (micrometer)", 0.0)); } bool DeviceClassMOS3Transistor::combine_devices (Device *a, Device *b) const @@ -231,9 +235,8 @@ bool DeviceClassMOS3Transistor::combine_devices (Device *a, Device *b) const // for combination the gate length must be identical if (fabs (a->parameter_value (0) - b->parameter_value (0)) < 1e-6) { - a->set_parameter_value (1, a->parameter_value (1) + b->parameter_value (1)); - a->set_parameter_value (2, a->parameter_value (2) + b->parameter_value (2)); - a->set_parameter_value (3, a->parameter_value (3) + b->parameter_value (3)); + combine_parameters (a, b); + b->connect_terminal (0, 0); b->connect_terminal (1, 0); b->connect_terminal (2, 0); @@ -247,6 +250,15 @@ bool DeviceClassMOS3Transistor::combine_devices (Device *a, Device *b) const return false; } +void DeviceClassMOS3Transistor::combine_parameters (Device *a, Device *b) const +{ + a->set_parameter_value (1, a->parameter_value (1) + b->parameter_value (1)); + a->set_parameter_value (2, a->parameter_value (2) + b->parameter_value (2)); + a->set_parameter_value (3, a->parameter_value (3) + b->parameter_value (3)); + a->set_parameter_value (4, a->parameter_value (4) + b->parameter_value (4)); + a->set_parameter_value (5, a->parameter_value (5) + b->parameter_value (5)); +} + // ------------------------------------------------------------------------------------ // DeviceClassMOS4Transistor implementation @@ -274,9 +286,8 @@ bool DeviceClassMOS4Transistor::combine_devices (Device *a, Device *b) const // for combination the gate length must be identical if (fabs (a->parameter_value (0) - b->parameter_value (0)) < 1e-6) { - a->set_parameter_value (1, a->parameter_value (1) + b->parameter_value (1)); - a->set_parameter_value (2, a->parameter_value (2) + b->parameter_value (2)); - a->set_parameter_value (3, a->parameter_value (3) + b->parameter_value (3)); + combine_parameters (a, b); + b->connect_terminal (0, 0); b->connect_terminal (1, 0); b->connect_terminal (2, 0); diff --git a/src/db/db/dbNetlistDeviceClasses.h b/src/db/db/dbNetlistDeviceClasses.h index fca6d3c15..c7d4b5187 100644 --- a/src/db/db/dbNetlistDeviceClasses.h +++ b/src/db/db/dbNetlistDeviceClasses.h @@ -147,8 +147,8 @@ public: /** * @brief A basic MOSFET device class with three terminals - * A MOSFET defines four parameters: "W" for the gate width in micrometers, "L" for the gate length in micrometers, - * "AS" for the source area and "AD" for the drain area. + * A MOSFET defines six parameters: "W" for the gate width in micrometers, "L" for the gate length in micrometers, + * "AS" for the source area and "AD" for the drain area and "PS" and "PD" for the source and drain perimeter. * The MOSFET device defines three terminals, "S", "D" and "G" for source, drain and gate. */ class DB_PUBLIC DeviceClassMOS3Transistor @@ -161,6 +161,8 @@ public: static size_t param_id_W; static size_t param_id_AS; static size_t param_id_AD; + static size_t param_id_PS; + static size_t param_id_PD; static size_t terminal_id_S; static size_t terminal_id_G; @@ -173,6 +175,9 @@ public: virtual bool combine_devices (Device *a, Device *b) const; virtual bool supports_parallel_combination () const { return true; } + +protected: + void combine_parameters (Device *a, Device *b) const; }; /** diff --git a/src/db/db/dbNetlistDeviceExtractor.cc b/src/db/db/dbNetlistDeviceExtractor.cc index 3edbf16bd..d30906149 100644 --- a/src/db/db/dbNetlistDeviceExtractor.cc +++ b/src/db/db/dbNetlistDeviceExtractor.cc @@ -327,7 +327,7 @@ void NetlistDeviceExtractor::push_new_devices (const db::Vector &disp_cache) DeviceCellKey key; for (geometry_per_terminal_type::const_iterator t = d->second.second.begin (); t != d->second.second.end (); ++t) { - std::map > > = key.geometry [t->first]; + std::map > > = key.geometry [t->first]; for (geometry_per_layer_type::const_iterator l = t->second.begin (); l != t->second.end (); ++l) { std::set &gl = gt [l->first]; for (std::vector::const_iterator p = l->second.begin (); p != l->second.end (); ++p) { diff --git a/src/db/db/dbNetlistDeviceExtractor.h b/src/db/db/dbNetlistDeviceExtractor.h index db7fca2e3..12a4ce280 100644 --- a/src/db/db/dbNetlistDeviceExtractor.h +++ b/src/db/db/dbNetlistDeviceExtractor.h @@ -493,7 +493,7 @@ private: return false; } - std::map > > geometry; + std::map > > geometry; std::map parameters; }; diff --git a/src/db/db/dbNetlistDeviceExtractorClasses.cc b/src/db/db/dbNetlistDeviceExtractorClasses.cc index 15531fea8..8fa72d3ac 100644 --- a/src/db/db/dbNetlistDeviceExtractorClasses.cc +++ b/src/db/db/dbNetlistDeviceExtractorClasses.cc @@ -112,6 +112,7 @@ void NetlistDeviceExtractorMOS3Transistor::extract_devices (const std::vector 0); device->set_parameter_value (diff_index == 0 ? db::DeviceClassMOS3Transistor::param_id_AS : db::DeviceClassMOS3Transistor::param_id_AD, dbu () * dbu () * d->area () / double (n)); + device->set_parameter_value (diff_index == 0 ? db::DeviceClassMOS3Transistor::param_id_PS : db::DeviceClassMOS3Transistor::param_id_PD, dbu () * d->perimeter () / double (n)); define_terminal (device, diff_index == 0 ? db::DeviceClassMOS3Transistor::terminal_id_S : db::DeviceClassMOS3Transistor::terminal_id_D, terminal_geometry_index, *d); diff --git a/src/db/db/dbNetlistSpiceWriter.cc b/src/db/db/dbNetlistSpiceWriter.cc index 338edce2b..833cd1af5 100644 --- a/src/db/db/dbNetlistSpiceWriter.cc +++ b/src/db/db/dbNetlistSpiceWriter.cc @@ -149,6 +149,8 @@ void NetlistSpiceWriterDelegate::write_device (const db::Device &dev) const os << " W=" << tl::sprintf ("%.12gU", dev.parameter_value (db::DeviceClassMOS3Transistor::param_id_W)); os << " AS=" << tl::sprintf ("%.12gU", dev.parameter_value (db::DeviceClassMOS3Transistor::param_id_AS)); os << " AD=" << tl::sprintf ("%.12gU", dev.parameter_value (db::DeviceClassMOS3Transistor::param_id_AD)); + os << " PS=" << tl::sprintf ("%.12gU", dev.parameter_value (db::DeviceClassMOS3Transistor::param_id_PS)); + os << " PD=" << tl::sprintf ("%.12gU", dev.parameter_value (db::DeviceClassMOS3Transistor::param_id_PD)); } else { diff --git a/src/db/db/gsiDeclDbNetlistDeviceClasses.cc b/src/db/db/gsiDeclDbNetlistDeviceClasses.cc index 8d1fc2ac4..4bd11a670 100644 --- a/src/db/db/gsiDeclDbNetlistDeviceClasses.cc +++ b/src/db/db/gsiDeclDbNetlistDeviceClasses.cc @@ -127,14 +127,20 @@ Class decl_dbDeviceClassMOS3Transistor (decl_dbDe ) + gsi::constant ("PARAM_AD", db::DeviceClassMOS3Transistor::param_id_AD, "@brief A constant giving the parameter ID for parameter AD" + ) + + gsi::constant ("PARAM_PS", db::DeviceClassMOS3Transistor::param_id_PS, + "@brief A constant giving the parameter ID for parameter PS" + ) + + gsi::constant ("PARAM_PD", db::DeviceClassMOS3Transistor::param_id_PD, + "@brief A constant giving the parameter ID for parameter PD" ), "@brief A device class for a 3-terminal MOS transistor.\n" "This class can be used to describe MOS transistors without a bulk terminal. " "A device class for a MOS transistor with a bulk terminal is \\DeviceClassMOS4Transistor. " "MOS transistors are defined by their combination behavior and the basic parameters.\n" "\n" - "The parameters are L, W, AS and AD for the gate length and width in micrometers and source and drain area " - "in square micrometers.\n" + "The parameters are L, W, AS, AD, PS and PD for the gate length and width in micrometers, source and drain area " + "in square micrometers and the source and drain perimeter in micrometers.\n" "\n" "The terminals are S, G and D for source, gate and drain.\n" "\n" @@ -169,14 +175,20 @@ Class decl_dbDeviceClassMOS4Transistor (decl_dbDe ) + gsi::constant ("PARAM_AD", db::DeviceClassMOS4Transistor::param_id_AD, "@brief A constant giving the parameter ID for parameter AD" + ) + + gsi::constant ("PARAM_PS", db::DeviceClassMOS4Transistor::param_id_PS, + "@brief A constant giving the parameter ID for parameter PS" + ) + + gsi::constant ("PARAM_PD", db::DeviceClassMOS4Transistor::param_id_PD, + "@brief A constant giving the parameter ID for parameter PD" ), "@brief A device class for a 4-terminal MOS transistor.\n" "This class can be used to describe MOS transistors with a bulk terminal. " "A device class for a MOS transistor without a bulk terminal is \\DeviceClassMOS3Transistor. " "MOS transistors are defined by their combination behavior and the basic parameters.\n" "\n" - "The parameters are L, W, AS and AD for the gate length and width in micrometers and source and drain area " - "in square micrometers.\n" + "The parameters are L, W, AS, AD, PS and PD for the gate length and width in micrometers, source and drain area " + "in square micrometers and the source and drain perimeter in micrometers.\n" "\n" "The terminals are S, G, D and B for source, gate, drain and bulk.\n" "\n" diff --git a/src/db/unit_tests/dbHierNetworkProcessorTests.cc b/src/db/unit_tests/dbHierNetworkProcessorTests.cc index c81cc404b..ba5801b4e 100644 --- a/src/db/unit_tests/dbHierNetworkProcessorTests.cc +++ b/src/db/unit_tests/dbHierNetworkProcessorTests.cc @@ -659,7 +659,7 @@ TEST(40_HierClustersBasic) EXPECT_EQ (cluster->bbox ().to_string (), "(0,0;1000,1000)") nc = 0; for (db::connected_clusters::connections_iterator i = cluster->begin_connections (); i != cluster->end_connections (); ++i) { - nc += i->second.size (); + nc += int (i->second.size ()); } EXPECT_EQ (nc, 2); @@ -673,7 +673,7 @@ TEST(40_HierClustersBasic) EXPECT_EQ (cluster->bbox ().to_string (), "(0,0;2000,500)") nc = 0; for (db::connected_clusters::connections_iterator i = cluster->begin_connections (); i != cluster->end_connections (); ++i) { - nc += i->second.size (); + nc += int (i->second.size ()); } EXPECT_EQ (nc, 0); @@ -687,7 +687,7 @@ TEST(40_HierClustersBasic) EXPECT_EQ (cluster->bbox ().to_string (), "(0,0;500,2000)") nc = 0; for (db::connected_clusters::connections_iterator i = cluster->begin_connections (); i != cluster->end_connections (); ++i) { - nc += i->second.size (); + nc += int (i->second.size ()); } EXPECT_EQ (nc, 1); } diff --git a/src/db/unit_tests/dbLayoutToNetlistTests.cc b/src/db/unit_tests/dbLayoutToNetlistTests.cc index e063dab20..c28e53f25 100644 --- a/src/db/unit_tests/dbLayoutToNetlistTests.cc +++ b/src/db/unit_tests/dbLayoutToNetlistTests.cc @@ -350,10 +350,10 @@ TEST(1_BasicExtraction) " XINV2 $9 (IN=$I6,$2=$I45,OUT=$I7,$4=VSS,$5=VDD)\n" " XINV2 $10 (IN=$I7,$2=$I46,OUT=$I8,$4=VSS,$5=VDD)\n" "Circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5):\n" - " DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" + " DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" " XTRANS $1 ($1=$2,$2=$4,$3=IN)\n" " XTRANS $2 ($1=$2,$2=$5,$3=IN)\n" " XTRANS $3 ($1=$5,$2=OUT,$3=$2)\n" @@ -505,10 +505,10 @@ TEST(1_BasicExtraction) " XINV2 $9 (IN=$I6,$2=(null),OUT=$I7,$4=VSS,$5=VDD)\n" " XINV2 $10 (IN=$I7,$2=(null),OUT=$I8,$4=VSS,$5=VDD)\n" "Circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5):\n" - " DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" + " DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" ); // do some probing after purging @@ -695,10 +695,10 @@ TEST(2_Probing) " XINV2 $1 (IN=$I3,$2=$I7,OUT=$I1,$4=$I4,$5=$I5)\n" " XINV2 $2 (IN=$I2,$2=$I6,OUT=$I3,$4=$I4,$5=$I5)\n" "Circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5):\n" - " DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" + " DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" " XTRANS $1 ($1=$2,$2=$4,$3=IN)\n" " XTRANS $2 ($1=$2,$2=$5,$3=IN)\n" " XTRANS $3 ($1=$5,$2=OUT,$3=$2)\n" @@ -747,10 +747,10 @@ TEST(2_Probing) " XINV2 $1 (IN=$I3,$2=$I7,OUT=$I1,$4=$I4,$5=$I5)\n" " XINV2 $2 (IN=$I2,$2=(null),OUT=$I3,$4=$I4,$5=$I5)\n" "Circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5):\n" - " DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" + " DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" ); // do some probing after purging @@ -967,10 +967,10 @@ TEST(3_GlobalNetConnections) " XINV2 $1 ($1=$I1,IN=$I3,$3=$I7,OUT=$I4,VSS=$I5,VDD=$I6,BULK=BULK)\n" " XINV2 $2 ($1=$I1,IN=$I4,$3=$I8,OUT=$I2,VSS=$I5,VDD=$I6,BULK=BULK)\n" "Circuit INV2 ($1=$1,IN=IN,$3=$3,OUT=OUT,VSS=VSS,VDD=VDD,BULK=BULK):\n" - " DPMOS $1 (S=$3,G=IN,D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $2 (S=VDD,G=$3,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $3 (S=$3,G=IN,D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $4 (S=VSS,G=$3,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" + " DPMOS $1 (S=$3,G=IN,D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $2 (S=VDD,G=$3,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $3 (S=$3,G=IN,D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $4 (S=VSS,G=$3,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" " XTRANS $1 ($1=$3,$2=VSS,$3=IN)\n" " XTRANS $2 ($1=$3,$2=VDD,$3=IN)\n" " XTRANS $3 ($1=VDD,$2=OUT,$3=$3)\n" @@ -1019,10 +1019,10 @@ TEST(3_GlobalNetConnections) " XINV2 $1 ($1=$I1,IN=$I3,$3=(null),OUT=$I4,VSS=$I5,VDD=$I6,BULK=BULK)\n" " XINV2 $2 ($1=$I1,IN=$I4,$3=$I8,OUT=$I2,VSS=$I5,VDD=$I6,BULK=BULK)\n" "Circuit INV2 ($1=(null),IN=IN,$3=$3,OUT=OUT,VSS=VSS,VDD=VDD,BULK=(null)):\n" - " DPMOS $1 (S=$3,G=IN,D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $2 (S=VDD,G=$3,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $3 (S=$3,G=IN,D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $4 (S=VSS,G=$3,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" + " DPMOS $1 (S=$3,G=IN,D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $2 (S=VDD,G=$3,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $3 (S=$3,G=IN,D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $4 (S=VSS,G=$3,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" ); // do some probing after purging @@ -1245,10 +1245,10 @@ TEST(4_GlobalNetDeviceExtraction) " XINV2 $1 ($1=$I1,IN=$I3,$3=$I7,OUT=$I4,VSS=$I5,VDD=$I6,BULK=BULK)\n" " XINV2 $2 ($1=$I1,IN=$I4,$3=$I8,OUT=$I2,VSS=$I5,VDD=$I6,BULK=BULK)\n" "Circuit INV2 ($1=$1,IN=IN,$3=$3,OUT=OUT,VSS=VSS,VDD=VDD,BULK=BULK):\n" - " DPMOS $1 (S=$3,G=IN,D=VDD,B=$1) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $2 (S=VDD,G=$3,D=OUT,B=$1) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $3 (S=$3,G=IN,D=VSS,B=BULK) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $4 (S=VSS,G=$3,D=OUT,B=BULK) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" + " DPMOS $1 (S=$3,G=IN,D=VDD,B=$1) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $2 (S=VDD,G=$3,D=OUT,B=$1) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $3 (S=$3,G=IN,D=VSS,B=BULK) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $4 (S=VSS,G=$3,D=OUT,B=BULK) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" " XTRANS $1 ($1=$3,$2=VSS,$3=IN)\n" " XTRANS $2 ($1=$3,$2=VDD,$3=IN)\n" " XTRANS $3 ($1=VDD,$2=OUT,$3=$3)\n" @@ -1297,10 +1297,10 @@ TEST(4_GlobalNetDeviceExtraction) " XINV2 $1 ($1=$I1,IN=$I3,$3=(null),OUT=$I4,VSS=$I5,VDD=$I6,BULK=BULK)\n" " XINV2 $2 ($1=$I1,IN=$I4,$3=$I8,OUT=$I2,VSS=$I5,VDD=$I6,BULK=BULK)\n" "Circuit INV2 ($1=$1,IN=IN,$3=$3,OUT=OUT,VSS=VSS,VDD=VDD,BULK=BULK):\n" - " DPMOS $1 (S=$3,G=IN,D=VDD,B=$1) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $2 (S=VDD,G=$3,D=OUT,B=$1) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $3 (S=$3,G=IN,D=VSS,B=BULK) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $4 (S=VSS,G=$3,D=OUT,B=BULK) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" + " DPMOS $1 (S=$3,G=IN,D=VDD,B=$1) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $2 (S=VDD,G=$3,D=OUT,B=$1) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $3 (S=$3,G=IN,D=VSS,B=BULK) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $4 (S=VSS,G=$3,D=OUT,B=BULK) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" ); // do some probing after purging @@ -1523,10 +1523,10 @@ TEST(5_DeviceExtractionWithDeviceCombination) " XINV2 $1 ($1=$I1,IN=$I3,OUT=$I4,VSS=$I5,VDD=$I6,BULK=BULK)\n" " XINV2 $2 ($1=$I1,IN=$I4,OUT=$I2,VSS=$I5,VDD=$I6,BULK=BULK)\n" "Circuit INV2 ($1=$1,IN=IN,OUT=OUT,VSS=VSS,VDD=VDD,BULK=BULK):\n" - " DPMOS $1 (S=OUT,G=IN,D=VDD,B=$1) [L=0.25,W=1.75,AS=0.91875,AD=0.48125]\n" - " DPMOS $2 (S=VDD,G=IN,D=OUT,B=$1) [L=0.25,W=1.75,AS=0.48125,AD=0.91875]\n" - " DNMOS $3 (S=OUT,G=IN,D=VSS,B=BULK) [L=0.25,W=1.75,AS=0.91875,AD=0.48125]\n" - " DNMOS $4 (S=VSS,G=IN,D=OUT,B=BULK) [L=0.25,W=1.75,AS=0.48125,AD=0.91875]\n" + " DPMOS $1 (S=OUT,G=IN,D=VDD,B=$1) [L=0.25,W=1.75,AS=0.91875,AD=0.48125,PS=4.55,PD=2.3]\n" + " DPMOS $2 (S=VDD,G=IN,D=OUT,B=$1) [L=0.25,W=1.75,AS=0.48125,AD=0.91875,PS=2.3,PD=4.55]\n" + " DNMOS $3 (S=OUT,G=IN,D=VSS,B=BULK) [L=0.25,W=1.75,AS=0.91875,AD=0.48125,PS=4.55,PD=2.3]\n" + " DNMOS $4 (S=VSS,G=IN,D=OUT,B=BULK) [L=0.25,W=1.75,AS=0.48125,AD=0.91875,PS=2.3,PD=4.55]\n" " XTRANS $1 ($1=OUT,$2=VSS,$3=IN)\n" " XTRANS $2 ($1=OUT,$2=VDD,$3=IN)\n" " XTRANS $3 ($1=OUT,$2=VSS,$3=IN)\n" @@ -1572,8 +1572,8 @@ TEST(5_DeviceExtractionWithDeviceCombination) " XINV2 $1 ($1=$I1,IN=$I3,OUT=$I4,VSS=$I5,VDD=$I6,BULK=BULK)\n" " XINV2 $2 ($1=$I1,IN=$I4,OUT=$I2,VSS=$I5,VDD=$I6,BULK=BULK)\n" "Circuit INV2 ($1=$1,IN=IN,OUT=OUT,VSS=VSS,VDD=VDD,BULK=BULK):\n" - " DPMOS $1 (S=OUT,G=IN,D=VDD,B=$1) [L=0.25,W=3.5,AS=1.4,AD=1.4]\n" - " DNMOS $3 (S=OUT,G=IN,D=VSS,B=BULK) [L=0.25,W=3.5,AS=1.4,AD=1.4]\n" + " DPMOS $1 (S=OUT,G=IN,D=VDD,B=$1) [L=0.25,W=3.5,AS=1.4,AD=1.4,PS=6.85,PD=6.85]\n" + " DNMOS $3 (S=OUT,G=IN,D=VSS,B=BULK) [L=0.25,W=3.5,AS=1.4,AD=1.4,PS=6.85,PD=6.85]\n" ); // do some probing after purging diff --git a/src/db/unit_tests/dbNetlistDeviceClassesTests.cc b/src/db/unit_tests/dbNetlistDeviceClassesTests.cc index f37a5e397..095541605 100644 --- a/src/db/unit_tests/dbNetlistDeviceClassesTests.cc +++ b/src/db/unit_tests/dbNetlistDeviceClassesTests.cc @@ -916,11 +916,15 @@ TEST(20_ParallelMOS3Transistors) d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 1.0); d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 2.0); d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 3.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 12.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 13.0); db::Device *d2 = new db::Device (cls, "d2"); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_L, 0.5); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 2.0); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 3.0); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 4.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 13.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 14.0); db::Circuit *circuit = new db::Circuit (); nl.add_circuit (circuit); @@ -952,8 +956,8 @@ TEST(20_ParallelMOS3Transistors) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3):\n" - " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n1,G=n3,D=n2) [L=0.5,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n1,G=n3,D=n2) [L=0.5,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); nl.combine_devices (); @@ -961,7 +965,7 @@ TEST(20_ParallelMOS3Transistors) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3):\n" - " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=3,AS=5,AD=7]\n" + " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=3,AS=5,AD=7,PS=25,PD=27]\n" ); } @@ -977,11 +981,15 @@ TEST(21_AntiParallelMOS3Transistors) d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 1.0); d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 2.0); d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 3.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 12.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 13.0); db::Device *d2 = new db::Device (cls, "d2"); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_L, 0.5); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 2.0); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 3.0); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 4.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 13.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 14.0); db::Circuit *circuit = new db::Circuit (); nl.add_circuit (circuit); @@ -1013,8 +1021,8 @@ TEST(21_AntiParallelMOS3Transistors) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3):\n" - " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n2,G=n3,D=n1) [L=0.5,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n2,G=n3,D=n1) [L=0.5,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); nl.combine_devices (); @@ -1022,7 +1030,7 @@ TEST(21_AntiParallelMOS3Transistors) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3):\n" - " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=3,AS=5,AD=7]\n" + " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=3,AS=5,AD=7,PS=25,PD=27]\n" ); } @@ -1038,11 +1046,15 @@ TEST(22_ParallelMOS3TransistorsDisconnectedGates) d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 1.0); d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 2.0); d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 3.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 12.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 13.0); db::Device *d2 = new db::Device (cls, "d2"); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_L, 0.5); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 2.0); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 3.0); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 4.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 13.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 14.0); db::Circuit *circuit = new db::Circuit (); nl.add_circuit (circuit); @@ -1079,8 +1091,8 @@ TEST(22_ParallelMOS3TransistorsDisconnectedGates) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C1=n3,C2=n4):\n" - " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n1,G=n4,D=n2) [L=0.5,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n1,G=n4,D=n2) [L=0.5,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); nl.combine_devices (); @@ -1090,8 +1102,8 @@ TEST(22_ParallelMOS3TransistorsDisconnectedGates) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C1=n3,C2=n4):\n" - " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n1,G=n4,D=n2) [L=0.5,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n1,G=n4,D=n2) [L=0.5,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); } @@ -1107,11 +1119,15 @@ TEST(23_ParallelMOS3TransistorsDifferentLength) d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 1.0); d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 2.0); d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 3.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 12.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 13.0); db::Device *d2 = new db::Device (cls, "d2"); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_L, 0.75); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 2.0); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 3.0); d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 4.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 13.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 14.0); db::Circuit *circuit = new db::Circuit (); nl.add_circuit (circuit); @@ -1143,8 +1159,8 @@ TEST(23_ParallelMOS3TransistorsDifferentLength) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3):\n" - " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n1,G=n3,D=n2) [L=0.75,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n1,G=n3,D=n2) [L=0.75,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); nl.combine_devices (); @@ -1154,8 +1170,8 @@ TEST(23_ParallelMOS3TransistorsDifferentLength) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3):\n" - " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n1,G=n3,D=n2) [L=0.75,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3,D=n2) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n1,G=n3,D=n2) [L=0.75,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); } @@ -1171,11 +1187,15 @@ TEST(30_ParallelMOS4Transistors) d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_W, 1.0); d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AS, 2.0); d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AD, 3.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 12.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 13.0); db::Device *d2 = new db::Device (cls, "d2"); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_L, 0.5); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_W, 2.0); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AS, 3.0); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AD, 4.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 13.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 14.0); db::Circuit *circuit = new db::Circuit (); nl.add_circuit (circuit); @@ -1214,8 +1234,8 @@ TEST(30_ParallelMOS4Transistors) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3,D=n0):\n" - " D d1 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); nl.combine_devices (); @@ -1223,7 +1243,7 @@ TEST(30_ParallelMOS4Transistors) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3,D=n0):\n" - " D d1 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=3,AS=5,AD=7]\n" + " D d1 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=3,AS=5,AD=7,PS=25,PD=27]\n" ); } @@ -1239,11 +1259,15 @@ TEST(31_AntiParallelMOS4Transistors) d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_W, 1.0); d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AS, 2.0); d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AD, 3.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 12.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 13.0); db::Device *d2 = new db::Device (cls, "d2"); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_L, 0.5); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_W, 2.0); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AS, 3.0); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AD, 4.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 13.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 14.0); db::Circuit *circuit = new db::Circuit (); nl.add_circuit (circuit); @@ -1282,8 +1306,8 @@ TEST(31_AntiParallelMOS4Transistors) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3,D=n0):\n" - " D d1 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n2,G=n3,D=n1,B=n0) [L=0.5,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n2,G=n3,D=n1,B=n0) [L=0.5,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); nl.combine_devices (); @@ -1291,7 +1315,7 @@ TEST(31_AntiParallelMOS4Transistors) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3,D=n0):\n" - " D d1 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=3,AS=5,AD=7]\n" + " D d1 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=3,AS=5,AD=7,PS=25,PD=27]\n" ); } @@ -1307,11 +1331,15 @@ TEST(32_ParallelMOS4TransistorsDisconnectedGates) d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_W, 1.0); d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AS, 2.0); d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AD, 3.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 12.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 13.0); db::Device *d2 = new db::Device (cls, "d2"); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_L, 0.5); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_W, 2.0); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AS, 3.0); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AD, 4.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 13.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 14.0); db::Circuit *circuit = new db::Circuit (); nl.add_circuit (circuit); @@ -1355,8 +1383,8 @@ TEST(32_ParallelMOS4TransistorsDisconnectedGates) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C1=n3a,C2=n3b,D=n0):\n" - " D d1 (S=n1,G=n3a,D=n2,B=n0) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n1,G=n3b,D=n2,B=n0) [L=0.5,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3a,D=n2,B=n0) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n1,G=n3b,D=n2,B=n0) [L=0.5,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); nl.combine_devices (); @@ -1366,8 +1394,8 @@ TEST(32_ParallelMOS4TransistorsDisconnectedGates) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C1=n3a,C2=n3b,D=n0):\n" - " D d1 (S=n1,G=n3a,D=n2,B=n0) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n1,G=n3b,D=n2,B=n0) [L=0.5,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3a,D=n2,B=n0) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n1,G=n3b,D=n2,B=n0) [L=0.5,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); } @@ -1383,11 +1411,15 @@ TEST(33_ParallelMOS4TransistorsDisconnectedBulk) d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_W, 1.0); d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AS, 2.0); d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AD, 3.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 12.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 13.0); db::Device *d2 = new db::Device (cls, "d2"); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_L, 0.5); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_W, 2.0); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AS, 3.0); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AD, 4.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 13.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 14.0); db::Circuit *circuit = new db::Circuit (); nl.add_circuit (circuit); @@ -1431,8 +1463,8 @@ TEST(33_ParallelMOS4TransistorsDisconnectedBulk) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3,D1=n0a,D2=n0b):\n" - " D d1 (S=n1,G=n3,D=n2,B=n0a) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n1,G=n3,D=n2,B=n0b) [L=0.5,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3,D=n2,B=n0a) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n1,G=n3,D=n2,B=n0b) [L=0.5,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); // not combined because bulk is different: @@ -1442,8 +1474,8 @@ TEST(33_ParallelMOS4TransistorsDisconnectedBulk) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3,D1=n0a,D2=n0b):\n" - " D d1 (S=n1,G=n3,D=n2,B=n0a) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n1,G=n3,D=n2,B=n0b) [L=0.5,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3,D=n2,B=n0a) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n1,G=n3,D=n2,B=n0b) [L=0.5,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); } @@ -1459,11 +1491,15 @@ TEST(34_ParallelMOS4TransistorsDifferentLength) d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_W, 1.0); d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AS, 2.0); d1->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AD, 3.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 12.0); + d1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 13.0); db::Device *d2 = new db::Device (cls, "d2"); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_L, 0.75); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_W, 2.0); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AS, 3.0); d2->set_parameter_value (db::DeviceClassMOS4Transistor::param_id_AD, 4.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 13.0); + d2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 14.0); db::Circuit *circuit = new db::Circuit (); nl.add_circuit (circuit); @@ -1502,8 +1538,8 @@ TEST(34_ParallelMOS4TransistorsDifferentLength) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3,D=n0):\n" - " D d1 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n1,G=n3,D=n2,B=n0) [L=0.75,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n1,G=n3,D=n2,B=n0) [L=0.75,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); nl.combine_devices (); @@ -1513,8 +1549,8 @@ TEST(34_ParallelMOS4TransistorsDifferentLength) EXPECT_EQ (nl.to_string (), "Circuit (A=n1,B=n2,C=n3,D=n0):\n" - " D d1 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=1,AS=2,AD=3]\n" - " D d2 (S=n1,G=n3,D=n2,B=n0) [L=0.75,W=2,AS=3,AD=4]\n" + " D d1 (S=n1,G=n3,D=n2,B=n0) [L=0.5,W=1,AS=2,AD=3,PS=12,PD=13]\n" + " D d2 (S=n1,G=n3,D=n2,B=n0) [L=0.75,W=2,AS=3,AD=4,PS=13,PD=14]\n" ); } diff --git a/src/db/unit_tests/dbNetlistExtractorTests.cc b/src/db/unit_tests/dbNetlistExtractorTests.cc index 22d590b75..aaaa44a27 100644 --- a/src/db/unit_tests/dbNetlistExtractorTests.cc +++ b/src/db/unit_tests/dbNetlistExtractorTests.cc @@ -293,10 +293,10 @@ TEST(1_DeviceAndNetExtraction) " XINV2 $9 (IN=$I6,$2=$I45,OUT=$I7,$4=VSS,$5=VDD)\n" " XINV2 $10 (IN=$I7,$2=$I46,OUT=$I8,$4=VSS,$5=VDD)\n" "Circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5):\n" - " DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" + " DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" " XTRANS $1 ($1=$2,$2=$4,$3=IN)\n" " XTRANS $2 ($1=$2,$2=$5,$3=IN)\n" " XTRANS $3 ($1=$5,$2=OUT,$3=$2)\n" @@ -325,10 +325,10 @@ TEST(1_DeviceAndNetExtraction) " XINV2 $9 (IN=$I6,$2=(null),OUT=$I7,$4=VSS,$5=VDD)\n" " XINV2 $10 (IN=$I7,$2=(null),OUT=$I8,$4=VSS,$5=VDD)\n" "Circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5):\n" - " DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" + " DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" ); // compare the collected test data @@ -496,46 +496,46 @@ TEST(2_DeviceAndNetExtractionFlat) // happen to be the same because they share the same label. EXPECT_EQ (nl.to_string (), "Circuit RINGO ():\n" - " DPMOS $1 (S=$16,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $2 (S=VDD,G=$16,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DPMOS $3 (S=$14,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $4 (S=VDD,G=$14,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DPMOS $5 (S=$12,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $6 (S=VDD,G=$12,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DPMOS $7 (S='IN,FB',G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $8 (S=VDD,G='IN,FB',D='OUT,OSC') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DPMOS $9 (S=$4,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $10 (S=VDD,G=$4,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DPMOS $11 (S=$8,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $12 (S=VDD,G=$8,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DPMOS $13 (S=$2,G='IN,FB',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $14 (S=VDD,G=$2,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DPMOS $15 (S=$6,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $16 (S=VDD,G=$6,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DPMOS $17 (S=$18,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $18 (S=VDD,G=$18,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DPMOS $19 (S=$10,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DPMOS $20 (S=VDD,G=$10,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $21 (S='IN,FB',G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $22 (S=VSS,G='IN,FB',D='OUT,OSC') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $23 (S=$18,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $24 (S=VSS,G=$18,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $25 (S=$14,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $26 (S=VSS,G=$14,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $27 (S=$12,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $28 (S=VSS,G=$12,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $29 (S=$4,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $30 (S=VSS,G=$4,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $31 (S=$2,G='IN,FB',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $32 (S=VSS,G=$2,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $33 (S=$8,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $34 (S=VSS,G=$8,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $35 (S=$6,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $36 (S=VSS,G=$6,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $37 (S=$16,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $38 (S=VSS,G=$16,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" - " DNMOS $39 (S=$10,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n" - " DNMOS $40 (S=VSS,G=$10,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n" + " DPMOS $1 (S=$16,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $2 (S=VDD,G=$16,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DPMOS $3 (S=$14,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $4 (S=VDD,G=$14,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DPMOS $5 (S=$12,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $6 (S=VDD,G=$12,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DPMOS $7 (S='IN,FB',G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $8 (S=VDD,G='IN,FB',D='OUT,OSC') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DPMOS $9 (S=$4,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $10 (S=VDD,G=$4,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DPMOS $11 (S=$8,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $12 (S=VDD,G=$8,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DPMOS $13 (S=$2,G='IN,FB',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $14 (S=VDD,G=$2,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DPMOS $15 (S=$6,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $16 (S=VDD,G=$6,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DPMOS $17 (S=$18,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $18 (S=VDD,G=$18,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DPMOS $19 (S=$10,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DPMOS $20 (S=VDD,G=$10,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $21 (S='IN,FB',G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $22 (S=VSS,G='IN,FB',D='OUT,OSC') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $23 (S=$18,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $24 (S=VSS,G=$18,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $25 (S=$14,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $26 (S=VSS,G=$14,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $27 (S=$12,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $28 (S=VSS,G=$12,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $29 (S=$4,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $30 (S=VSS,G=$4,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $31 (S=$2,G='IN,FB',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $32 (S=VSS,G=$2,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $33 (S=$8,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $34 (S=VSS,G=$8,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $35 (S=$6,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $36 (S=VSS,G=$6,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $37 (S=$16,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $38 (S=VSS,G=$16,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" + " DNMOS $39 (S=$10,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5]\n" + " DNMOS $40 (S=VSS,G=$10,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95]\n" ); // compare the collected test data diff --git a/src/db/unit_tests/dbNetlistWriterTests.cc b/src/db/unit_tests/dbNetlistWriterTests.cc index 24ec3f413..2132169a4 100644 --- a/src/db/unit_tests/dbNetlistWriterTests.cc +++ b/src/db/unit_tests/dbNetlistWriterTests.cc @@ -393,11 +393,15 @@ TEST(5_WriterMOS3Devices) ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 0.18); ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 1.2); ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 0.75); + ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 2.2); + ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 1.75); db::Device *ddev2 = new db::Device (m3cls); ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_L, 1.4); ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 0.25); ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 1.3); ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 0.85); + ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 2.3); + ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 1.85); circuit1->add_device (ddev1); circuit1->add_device (ddev2); @@ -488,11 +492,15 @@ TEST(6_WriterMOS4Devices) ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 0.18); ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 1.2); ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 0.75); + ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 2.2); + ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 1.75); db::Device *ddev2 = new db::Device (m4cls); ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_L, 1.4); ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 0.25); ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 1.3); ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 0.85); + ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 2.3); + ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 1.85); circuit1->add_device (ddev1); circuit1->add_device (ddev2); @@ -657,11 +665,15 @@ TEST(8_WriterSubcircuits) ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 0.18); ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 1.2); ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 0.75); + ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 2.2); + ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 1.75); db::Device *ddev2 = new db::Device (m4cls); ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_L, 1.4); ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 0.25); ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 1.3); ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 0.85); + ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 2.3); + ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 1.85); circuit1->add_device (ddev1); circuit1->add_device (ddev2); diff --git a/testdata/algo/l2n_writer_au.txt b/testdata/algo/l2n_writer_au.txt index 2861391d6..03320e97f 100644 --- a/testdata/algo/l2n_writer_au.txt +++ b/testdata/algo/l2n_writer_au.txt @@ -162,6 +162,8 @@ circuit(INV2 param(W 0.95) param(AS 0.49875) param(AD 0.26125) + param(PS 2.95) + param(PD 1.5) terminal(S $2) terminal(G IN) terminal(D $5) @@ -172,6 +174,8 @@ circuit(INV2 param(W 0.95) param(AS 0.26125) param(AD 0.49875) + param(PS 1.5) + param(PD 2.95) terminal(S $5) terminal(G $2) terminal(D OUT) @@ -182,6 +186,8 @@ circuit(INV2 param(W 0.95) param(AS 0.49875) param(AD 0.26125) + param(PS 2.95) + param(PD 1.5) terminal(S $2) terminal(G IN) terminal(D $4) @@ -192,6 +198,8 @@ circuit(INV2 param(W 0.95) param(AS 0.26125) param(AD 0.49875) + param(PS 1.5) + param(PD 2.95) terminal(S $4) terminal(G $2) terminal(D OUT) diff --git a/testdata/algo/l2n_writer_au_2.txt b/testdata/algo/l2n_writer_au_2.txt index f4e5c05c7..847a910a8 100644 --- a/testdata/algo/l2n_writer_au_2.txt +++ b/testdata/algo/l2n_writer_au_2.txt @@ -198,6 +198,8 @@ circuit(INV2 param(W 0.95) param(AS 0.49875) param(AD 0.26125) + param(PS 2.95) + param(PD 1.5) terminal(S $3) terminal(G IN) terminal(D VDD) @@ -209,6 +211,8 @@ circuit(INV2 param(W 0.95) param(AS 0.26125) param(AD 0.49875) + param(PS 1.5) + param(PD 2.95) terminal(S VDD) terminal(G $3) terminal(D OUT) @@ -220,6 +224,8 @@ circuit(INV2 param(W 0.95) param(AS 0.49875) param(AD 0.26125) + param(PS 2.95) + param(PD 1.5) terminal(S $3) terminal(G IN) terminal(D VSS) @@ -231,6 +237,8 @@ circuit(INV2 param(W 0.95) param(AS 0.26125) param(AD 0.49875) + param(PS 1.5) + param(PD 2.95) terminal(S VSS) terminal(G $3) terminal(D OUT) diff --git a/testdata/algo/l2n_writer_au_2s.txt b/testdata/algo/l2n_writer_au_2s.txt index 2465db56d..034f62c26 100644 --- a/testdata/algo/l2n_writer_au_2s.txt +++ b/testdata/algo/l2n_writer_au_2s.txt @@ -174,6 +174,8 @@ X(INV2 E(W 0.95) E(AS 0.49875) E(AD 0.26125) + E(PS 2.95) + E(PD 1.5) T(S $3) T(G IN) T(D VDD) @@ -185,6 +187,8 @@ X(INV2 E(W 0.95) E(AS 0.26125) E(AD 0.49875) + E(PS 1.5) + E(PD 2.95) T(S VDD) T(G $3) T(D OUT) @@ -196,6 +200,8 @@ X(INV2 E(W 0.95) E(AS 0.49875) E(AD 0.26125) + E(PS 2.95) + E(PD 1.5) T(S $3) T(G IN) T(D VSS) @@ -207,6 +213,8 @@ X(INV2 E(W 0.95) E(AS 0.26125) E(AD 0.49875) + E(PS 1.5) + E(PD 2.95) T(S VSS) T(G $3) T(D OUT) diff --git a/testdata/algo/l2n_writer_au_s.txt b/testdata/algo/l2n_writer_au_s.txt index 2ff91db45..726395991 100644 --- a/testdata/algo/l2n_writer_au_s.txt +++ b/testdata/algo/l2n_writer_au_s.txt @@ -140,6 +140,8 @@ X(INV2 E(W 0.95) E(AS 0.49875) E(AD 0.26125) + E(PS 2.95) + E(PD 1.5) T(S $2) T(G IN) T(D $5) @@ -150,6 +152,8 @@ X(INV2 E(W 0.95) E(AS 0.26125) E(AD 0.49875) + E(PS 1.5) + E(PD 2.95) T(S $5) T(G $2) T(D OUT) @@ -160,6 +164,8 @@ X(INV2 E(W 0.95) E(AS 0.49875) E(AD 0.26125) + E(PS 2.95) + E(PD 1.5) T(S $2) T(G IN) T(D $4) @@ -170,6 +176,8 @@ X(INV2 E(W 0.95) E(AS 0.26125) E(AD 0.49875) + E(PS 1.5) + E(PD 2.95) T(S $4) T(G $2) T(D OUT) diff --git a/testdata/algo/nwriter5_au.txt b/testdata/algo/nwriter5_au.txt index 2f6212938..3c1b7df3c 100644 --- a/testdata/algo/nwriter5_au.txt +++ b/testdata/algo/nwriter5_au.txt @@ -10,7 +10,7 @@ * net 3 n3 * net 4 n4 * device instance $1 0,0 M3CLS -M$1 1 4 3 1 MM3CLS L=0.25U W=0.18U AS=1.2U AD=0.75U +M$1 1 4 3 1 MM3CLS L=0.25U W=0.18U AS=1.2U AD=0.75U PS=2.2U PD=1.75U * device instance $2 0,0 M3CLS -M$2 3 4 2 3 MM3CLS L=1.4U W=0.25U AS=1.3U AD=0.85U +M$2 3 4 2 3 MM3CLS L=1.4U W=0.25U AS=1.3U AD=0.85U PS=2.3U PD=1.85U .ENDS C1 diff --git a/testdata/algo/nwriter6_au.txt b/testdata/algo/nwriter6_au.txt index caae620b9..349757227 100644 --- a/testdata/algo/nwriter6_au.txt +++ b/testdata/algo/nwriter6_au.txt @@ -12,7 +12,7 @@ * net 4 n4 * net 5 n5 * device instance $1 0,0 M4CLS -M$1 1 4 3 5 1 MM4CLS L=0.25U W=0.18U AS=1.2U AD=0.75U +M$1 1 4 3 5 1 MM4CLS L=0.25U W=0.18U AS=1.2U AD=0.75U PS=2.2U PD=1.75U * device instance $2 0,0 M4CLS -M$2 3 4 2 5 3 MM4CLS L=1.4U W=0.25U AS=1.3U AD=0.85U +M$2 3 4 2 5 3 MM4CLS L=1.4U W=0.25U AS=1.3U AD=0.85U PS=2.3U PD=1.85U .ENDS C1 diff --git a/testdata/algo/nwriter8_au.txt b/testdata/algo/nwriter8_au.txt index b17e53ee2..f5d4cb619 100644 --- a/testdata/algo/nwriter8_au.txt +++ b/testdata/algo/nwriter8_au.txt @@ -28,7 +28,7 @@ XSC2 3 2 4 3 C1 * net 4 n4 * net 5 n5 * device instance $1 0,0 M4CLS -M$1 1 4 3 5 1 MM4CLS L=0.25U W=0.18U AS=1.2U AD=0.75U +M$1 1 4 3 5 1 MM4CLS L=0.25U W=0.18U AS=1.2U AD=0.75U PS=2.2U PD=1.75U * device instance $2 0,0 M4CLS -M$2 3 4 2 5 3 MM4CLS L=1.4U W=0.25U AS=1.3U AD=0.85U +M$2 3 4 2 5 3 MM4CLS L=1.4U W=0.25U AS=1.3U AD=0.85U PS=2.3U PD=1.85U .ENDS C1 diff --git a/testdata/ruby/dbLayoutToNetlist.rb b/testdata/ruby/dbLayoutToNetlist.rb index 89e920d2b..c6f5ac5df 100644 --- a/testdata/ruby/dbLayoutToNetlist.rb +++ b/testdata/ruby/dbLayoutToNetlist.rb @@ -279,10 +279,10 @@ Circuit RINGO (): XINV2 $9 (IN=$I6,$2=$I45,OUT=$I7,$4=VSS,$5=VDD) XINV2 $10 (IN=$I7,$2=$I46,OUT=$I8,$4=VSS,$5=VDD) Circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5): - DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125] - DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875] - DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125] - DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875] + DPMOS $1 (S=$2,G=IN,D=$5) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5] + DPMOS $2 (S=$5,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95] + DNMOS $3 (S=$2,G=IN,D=$4) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5] + DNMOS $4 (S=$4,G=$2,D=OUT) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95] XTRANS $1 ($1=$2,$2=$4,$3=IN) XTRANS $2 ($1=$2,$2=$5,$3=IN) XTRANS $3 ($1=$5,$2=OUT,$3=$2) @@ -390,10 +390,10 @@ Circuit INV2PAIR (BULK=BULK,$2=$I8,$3=$I6,$4=$I5,$5=$I3,$6=$I2,$7=$I1): XINV2 $1 ($1=$I1,IN=$I3,$3=$I7,OUT=$I4,VSS=$I5,VDD=$I6,BULK=BULK) XINV2 $2 ($1=$I1,IN=$I4,$3=$I8,OUT=$I2,VSS=$I5,VDD=$I6,BULK=BULK) Circuit INV2 ($1=$1,IN=IN,$3=$3,OUT=OUT,VSS=VSS,VDD=VDD,BULK=BULK): - DPMOS $1 (S=$3,G=IN,D=VDD,B=$1) [L=0.25,W=0.95,AS=0.49875,AD=0.26125] - DPMOS $2 (S=VDD,G=$3,D=OUT,B=$1) [L=0.25,W=0.95,AS=0.26125,AD=0.49875] - DNMOS $3 (S=$3,G=IN,D=VSS,B=BULK) [L=0.25,W=0.95,AS=0.49875,AD=0.26125] - DNMOS $4 (S=VSS,G=$3,D=OUT,B=BULK) [L=0.25,W=0.95,AS=0.26125,AD=0.49875] + DPMOS $1 (S=$3,G=IN,D=VDD,B=$1) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5] + DPMOS $2 (S=VDD,G=$3,D=OUT,B=$1) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95] + DNMOS $3 (S=$3,G=IN,D=VSS,B=BULK) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5] + DNMOS $4 (S=VSS,G=$3,D=OUT,B=BULK) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95] XTRANS $1 ($1=$3,$2=VSS,$3=IN) XTRANS $2 ($1=$3,$2=VDD,$3=IN) XTRANS $3 ($1=VDD,$2=OUT,$3=$3) @@ -416,10 +416,10 @@ Circuit INV2PAIR (BULK=BULK,$2=$I8,$3=$I6,$4=$I5,$5=$I3,$6=$I2,$7=$I1): XINV2 $1 ($1=$I1,IN=$I3,$3=(null),OUT=$I4,VSS=$I5,VDD=$I6,BULK=BULK) XINV2 $2 ($1=$I1,IN=$I4,$3=$I8,OUT=$I2,VSS=$I5,VDD=$I6,BULK=BULK) Circuit INV2 ($1=$1,IN=IN,$3=$3,OUT=OUT,VSS=VSS,VDD=VDD,BULK=BULK): - DPMOS $1 (S=$3,G=IN,D=VDD,B=$1) [L=0.25,W=0.95,AS=0.49875,AD=0.26125] - DPMOS $2 (S=VDD,G=$3,D=OUT,B=$1) [L=0.25,W=0.95,AS=0.26125,AD=0.49875] - DNMOS $3 (S=$3,G=IN,D=VSS,B=BULK) [L=0.25,W=0.95,AS=0.49875,AD=0.26125] - DNMOS $4 (S=VSS,G=$3,D=OUT,B=BULK) [L=0.25,W=0.95,AS=0.26125,AD=0.49875] + DPMOS $1 (S=$3,G=IN,D=VDD,B=$1) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5] + DPMOS $2 (S=VDD,G=$3,D=OUT,B=$1) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95] + DNMOS $3 (S=$3,G=IN,D=VSS,B=BULK) [L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5] + DNMOS $4 (S=VSS,G=$3,D=OUT,B=BULK) [L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95] END # cleanup now diff --git a/testdata/ruby/dbNetlistDeviceClasses.rb b/testdata/ruby/dbNetlistDeviceClasses.rb index 5f64ff810..7eefab84d 100644 --- a/testdata/ruby/dbNetlistDeviceClasses.rb +++ b/testdata/ruby/dbNetlistDeviceClasses.rb @@ -222,11 +222,15 @@ END d1.set_parameter(RBA::DeviceClassMOS3Transistor::PARAM_W, 2.0) d1.set_parameter(RBA::DeviceClassMOS3Transistor::PARAM_AS, 3.0) d1.set_parameter(RBA::DeviceClassMOS3Transistor::PARAM_AD, 4.0) + d1.set_parameter(RBA::DeviceClassMOS3Transistor::PARAM_PS, 13.0) + d1.set_parameter(RBA::DeviceClassMOS3Transistor::PARAM_PD, 14.0) d2 = circuit.create_device(cls, "d2") d2.set_parameter("L", 1.0) d2.set_parameter("W", 3.0) d2.set_parameter("AS", 4.0) d2.set_parameter("AD", 5.0) + d2.set_parameter("PS", 14.0) + d2.set_parameter("PD", 15.0) pin_a = circuit.create_pin ("A") pin_b = circuit.create_pin ("B") @@ -249,8 +253,8 @@ END assert_equal(nl.to_s, <