From c7e883cdb26ec96979867e14af0d08e0aac3af23 Mon Sep 17 00:00:00 2001 From: Matthias Koefferlein Date: Fri, 12 Jul 2019 19:00:27 +0200 Subject: [PATCH] SPICE reader now assigned net names as pin names. --- src/db/db/dbNetlistCompare.cc | 76 ++++++++++++++-- src/db/db/dbNetlistSpiceReader.cc | 4 +- src/db/unit_tests/dbNetlistReaderTests.cc | 88 +++++++++---------- testdata/algo/lvs_test1_au.lvsdb | 34 +++---- testdata/algo/lvs_test1b_au.lvsdb | 34 +++---- testdata/algo/lvs_test2_au.lvsdb | 48 +++++----- testdata/algo/lvs_test2b_au.lvsdb | 48 +++++----- testdata/lvs/inv.lvsdb | 16 ++-- testdata/lvs/inv2.lvsdb | 10 +-- testdata/lvs/ringo_simple.lvsdb | 36 ++++---- testdata/lvs/ringo_simple_blackboxing.lvsdb | 58 ++++++------ .../ringo_simple_implicit_connections.lvsdb | 36 ++++---- testdata/lvs/ringo_simple_io.lvsdb | 36 ++++---- testdata/lvs/ringo_simple_io2.lvsdb | 36 ++++---- ...o_simple_net_and_circuit_equivalence.lvsdb | 36 ++++---- testdata/lvs/ringo_simple_pin_swapping.lvsdb | 36 ++++---- .../ringo_simple_same_device_classes.lvsdb | 36 ++++---- .../lvs/ringo_simple_simplification.lvsdb | 48 +++++----- testdata/ruby/dbNetlistReaderTests.rb | 4 +- 19 files changed, 391 insertions(+), 329 deletions(-) diff --git a/src/db/db/dbNetlistCompare.cc b/src/db/db/dbNetlistCompare.cc index d99311ccc..f1e1921f4 100644 --- a/src/db/db/dbNetlistCompare.cc +++ b/src/db/db/dbNetlistCompare.cc @@ -28,6 +28,8 @@ #include "tlEquivalenceClusters.h" #include "tlLog.h" +#include + // verbose debug output // TODO: make this a feature? // #define PRINT_DEBUG_NETCOMPARE @@ -43,6 +45,31 @@ namespace db { +// -------------------------------------------------------------------------------------------------------------------- +// A generic string compare + +static int name_compare (const std::string &n1, const std::string &n2) +{ + // TODO: unicode support? +#if defined(COMPARE_CASE_INSENSITIVE) + return strcasecmp (n1.c_str (), n2.c_str ()); +#else + return strcmp (n1.c_str (), n2.c_str ()); +#endif +} + +#if defined(COMPARE_CASE_INSENSITIVE) +static std::string normalize_name (const std::string &n) +{ + return tl::to_upper_case (n); +} +#else +static inline const std::string &normalize_name (const std::string &n) +{ + return n; +} +#endif + // -------------------------------------------------------------------------------------------------------------------- // DeviceCompare definition and implementation @@ -344,10 +371,7 @@ public: if (m_with_name) { - std::string cls_name = cls->name (); -#if defined(COMPARE_CASE_INSENSITIVE) - cls_name = tl::to_upper_case (cls_name); -#endif + std::string cls_name = normalize_name (cls->name ()); std::map::const_iterator c = m_cat_by_name.find (cls_name); if (c != m_cat_by_name.end ()) { @@ -1270,7 +1294,7 @@ NetGraphNode::edge_less (const db::Net *a, const db::Net *b) const std::string &pna = a->begin_pins ()->pin ()->name (); const std::string &pnb = b->begin_pins ()->pin ()->name (); if (! pna.empty () && ! pnb.empty ()) { - return pna < pnb; + return name_compare (pna, pnb) < 0; } } return false; @@ -1293,7 +1317,7 @@ NetGraphNode::edge_equal (const db::Net *a, const db::Net *b) const std::string &pna = a->begin_pins ()->pin ()->name (); const std::string &pnb = b->begin_pins ()->pin ()->name (); if (! pna.empty () && ! pnb.empty ()) { - return pna == pnb; + return name_compare (pna, pnb) == 0; } } return true; @@ -2535,13 +2559,38 @@ NetlistComparer::compare_circuits (const db::Circuit *c1, const db::Circuit *c2, if (c1->pin_count () > 0 && c2->pin_count () > 0) { + // try to assign floating pins by name with higher prio + std::map > floating_pins_by_name; + + for (db::Circuit::const_pin_iterator p = c2->begin_pins (); p != c2->end_pins (); ++p) { + const db::Net *net = c2->net_for_pin (p->id ()); + if (!net && !p->name ().empty ()) { + floating_pins_by_name.insert (std::make_pair (normalize_name (p->name ()), std::make_pair ((const db::Pin *) 0, (const db::Pin *) 0))).first->second.second = p.operator-> (); + } + } + + for (db::Circuit::const_pin_iterator p = c1->begin_pins (); p != c1->end_pins (); ++p) { + const db::Net *net = c1->net_for_pin (p->id ()); + if (!net && !p->name ().empty ()) { + floating_pins_by_name.insert (std::make_pair (normalize_name (p->name ()), std::make_pair ((const db::Pin *) 0, (const db::Pin *) 0))).first->second.first = p.operator-> (); + } + } + + std::map floating_pin_name_mapping; + for (std::map >::const_iterator i = floating_pins_by_name.begin (); i != floating_pins_by_name.end (); ++i) { + if (i->second.first && i->second.second) { + floating_pin_name_mapping [i->second.first] = i->second.second; + floating_pin_name_mapping [i->second.second] = i->second.first; + } + } + std::vector floating_pins; std::multimap net2pin; for (db::Circuit::const_pin_iterator p = c2->begin_pins (); p != c2->end_pins (); ++p) { const db::Net *net = c2->net_for_pin (p->id ()); if (net) { net2pin.insert (std::make_pair (g2.node_index_for_net (net), p.operator-> ())); - } else { + } else if (floating_pin_name_mapping.find (p.operator-> ()) == floating_pin_name_mapping.end ()) { floating_pins.push_back (p.operator-> ()); } } @@ -2560,7 +2609,18 @@ NetlistComparer::compare_circuits (const db::Circuit *c1, const db::Circuit *c2, const db::Net *net = c1->net_for_pin (p->id ()); if (! net) { - if (next_float != floating_pins.end ()) { + std::map::const_iterator fp = floating_pin_name_mapping.find (p.operator-> ()); + if (fp != floating_pin_name_mapping.end ()) { + + // assign a floating pin - this is a dummy assignment which is mitigated + // by declaring the pins equivalent in derive_pin_equivalence + if (mp_logger) { + mp_logger->match_pins (p.operator-> (), fp->second); + } + c12_pin_mapping.map_pin (p->id (), fp->second->id ()); + c22_pin_mapping.map_pin (fp->second->id (), p->id ()); + + } else if (next_float != floating_pins.end ()) { // assign a floating pin - this is a dummy assignment which is mitigated // by declaring the pins equivalent in derive_pin_equivalence diff --git a/src/db/db/dbNetlistSpiceReader.cc b/src/db/db/dbNetlistSpiceReader.cc index b517acc60..199d640c1 100644 --- a/src/db/db/dbNetlistSpiceReader.cc +++ b/src/db/db/dbNetlistSpiceReader.cc @@ -809,7 +809,9 @@ void NetlistSpiceReader::read_circuit (tl::Extractor &ex, const std::string &nc) for (std::vector::const_iterator i = nn.begin (); i != nn.end (); ++i) { db::Net *net = make_net (*i); // use the net name to name the pin (otherwise SPICE pins are always unnamed) - // @@@ mp_circuit->rename_pin (i - nn.begin (), net->name ()); + if (! i->empty ()) { + mp_circuit->rename_pin (i - nn.begin (), net->name ()); + } mp_circuit->connect_pin (i - nn.begin (), net); } diff --git a/src/db/unit_tests/dbNetlistReaderTests.cc b/src/db/unit_tests/dbNetlistReaderTests.cc index 4817ebc37..9a1da190e 100644 --- a/src/db/unit_tests/dbNetlistReaderTests.cc +++ b/src/db/unit_tests/dbNetlistReaderTests.cc @@ -39,7 +39,7 @@ TEST(1_BasicReader) reader.read (is, nl); EXPECT_EQ (nl.to_string (), - "circuit TOP ($1='1',$2='2',$3='4',$4='7');\n" + "circuit TOP ('1'='1','2'='2','4'='4','7'='7');\n" " device RES $1 (A='6',B='1') (R=7650,L=0,W=0,A=0,P=0);\n" " device RES $2 (A='3',B='1') (R=7650,L=0,W=0,A=0,P=0);\n" " device RES $3 (A='3',B='2') (R=2670,L=0,W=0,A=0,P=0);\n" @@ -59,27 +59,27 @@ TEST(2_ReaderWithSubcircuits) reader.read (is, nl); EXPECT_EQ (nl.to_string (), - "circuit RINGO ($1='11',$2='12',$3='13',$4='14',$5='15');\n" - " subcircuit ND2X1 $1 ($1='12',$2='1',$3='15',$4='12',$5='11',$6='14',$7='15');\n" - " subcircuit INVX1 $2 ($1='12',$2='2',$3='15',$4='12',$5='1',$6='15');\n" - " subcircuit INVX1 $3 ($1='12',$2='3',$3='15',$4='12',$5='2',$6='15');\n" - " subcircuit INVX1 $4 ($1='12',$2='4',$3='15',$4='12',$5='3',$6='15');\n" - " subcircuit INVX1 $5 ($1='12',$2='5',$3='15',$4='12',$5='4',$6='15');\n" - " subcircuit INVX1 $6 ($1='12',$2='6',$3='15',$4='12',$5='5',$6='15');\n" - " subcircuit INVX1 $7 ($1='12',$2='7',$3='15',$4='12',$5='6',$6='15');\n" - " subcircuit INVX1 $8 ($1='12',$2='8',$3='15',$4='12',$5='7',$6='15');\n" - " subcircuit INVX1 $9 ($1='12',$2='9',$3='15',$4='12',$5='8',$6='15');\n" - " subcircuit INVX1 $10 ($1='12',$2='10',$3='15',$4='12',$5='9',$6='15');\n" - " subcircuit INVX1 $11 ($1='12',$2='11',$3='15',$4='12',$5='10',$6='15');\n" - " subcircuit INVX1 $12 ($1='12',$2='13',$3='15',$4='12',$5='11',$6='15');\n" + "circuit RINGO ('11'='11','12'='12','13'='13','14'='14','15'='15');\n" + " subcircuit ND2X1 $1 ('1'='12','2'='1','3'='15','4'='12','5'='11','6'='14','7'='15');\n" + " subcircuit INVX1 $2 ('1'='12','2'='2','3'='15','4'='12','5'='1','6'='15');\n" + " subcircuit INVX1 $3 ('1'='12','2'='3','3'='15','4'='12','5'='2','6'='15');\n" + " subcircuit INVX1 $4 ('1'='12','2'='4','3'='15','4'='12','5'='3','6'='15');\n" + " subcircuit INVX1 $5 ('1'='12','2'='5','3'='15','4'='12','5'='4','6'='15');\n" + " subcircuit INVX1 $6 ('1'='12','2'='6','3'='15','4'='12','5'='5','6'='15');\n" + " subcircuit INVX1 $7 ('1'='12','2'='7','3'='15','4'='12','5'='6','6'='15');\n" + " subcircuit INVX1 $8 ('1'='12','2'='8','3'='15','4'='12','5'='7','6'='15');\n" + " subcircuit INVX1 $9 ('1'='12','2'='9','3'='15','4'='12','5'='8','6'='15');\n" + " subcircuit INVX1 $10 ('1'='12','2'='10','3'='15','4'='12','5'='9','6'='15');\n" + " subcircuit INVX1 $11 ('1'='12','2'='11','3'='15','4'='12','5'='10','6'='15');\n" + " subcircuit INVX1 $12 ('1'='12','2'='13','3'='15','4'='12','5'='11','6'='15');\n" "end;\n" - "circuit ND2X1 ($1='1',$2='2',$3='3',$4='4',$5='5',$6='6',$7='7');\n" + "circuit ND2X1 ('1'='1','2'='2','3'='3','4'='4','5'='5','6'='6','7'='7');\n" " device MLVPMOS $1 (S='2',G='6',D='1',B='4') (L=0.25,W=1.5,AS=0.6375,AD=0.3375,PS=3.85,PD=1.95);\n" " device MLVPMOS $2 (S='1',G='5',D='2',B='4') (L=0.25,W=1.5,AS=0.3375,AD=0.6375,PS=1.95,PD=3.85);\n" " device MLVNMOS $3 (S='3',G='6',D='8',B='7') (L=0.25,W=0.95,AS=0.40375,AD=0.21375,PS=2.75,PD=1.4);\n" " device MLVNMOS $4 (S='8',G='5',D='2',B='7') (L=0.25,W=0.95,AS=0.21375,AD=0.40375,PS=1.4,PD=2.75);\n" "end;\n" - "circuit INVX1 ($1='1',$2='2',$3='3',$4='4',$5='5',$6='6');\n" + "circuit INVX1 ('1'='1','2'='2','3'='3','4'='4','5'='5','6'='6');\n" " device MLVPMOS $1 (S='1',G='5',D='2',B='4') (L=0.25,W=1.5,AS=0.6375,AD=0.6375,PS=3.85,PD=3.85);\n" " device MLVNMOS $2 (S='3',G='5',D='2',B='6') (L=0.25,W=0.95,AS=0.40375,AD=0.40375,PS=2.75,PD=2.75);\n" "end;\n" @@ -97,29 +97,29 @@ TEST(3_ReaderWithSubcircuitsAltOrder) reader.read (is, nl); EXPECT_EQ (nl.to_string (), - "circuit INVX1 ($1='1',$2='2',$3='3',$4='4',$5='5',$6='6');\n" + "circuit INVX1 ('1'='1','2'='2','3'='3','4'='4','5'='5','6'='6');\n" " device MLVPMOS $1 (S='1',G='5',D='2',B='4') (L=0.25,W=1.5,AS=0,AD=0,PS=0,PD=0);\n" " device MLVNMOS $2 (S='3',G='5',D='2',B='6') (L=0.25,W=0.95,AS=0,AD=0,PS=0,PD=0);\n" "end;\n" - "circuit ND2X1 ($1='1',$2='2',$3='3',$4='4',$5='5',$6='6',$7='7');\n" + "circuit ND2X1 ('1'='1','2'='2','3'='3','4'='4','5'='5','6'='6','7'='7');\n" " device MLVPMOS $1 (S='2',G='6',D='1',B='4') (L=0.25,W=1.5,AS=0,AD=0,PS=0,PD=0);\n" " device MLVPMOS $2 (S='1',G='5',D='2',B='4') (L=0.25,W=1.5,AS=0,AD=0,PS=0,PD=0);\n" " device MLVNMOS $3 (S='3',G='6',D='8',B='7') (L=0.25,W=0.95,AS=0,AD=0,PS=0,PD=0);\n" " device MLVNMOS $4 (S='8',G='5',D='2',B='7') (L=0.25,W=0.95,AS=0,AD=0,PS=0,PD=0);\n" "end;\n" - "circuit RINGO ($1='11',$2='12',$3='13',$4='14',$5='15');\n" - " subcircuit ND2X1 $1 ($1='12',$2='1',$3='15',$4='12',$5='11',$6='14',$7='15');\n" - " subcircuit INVX1 $2 ($1='12',$2='2',$3='15',$4='12',$5='1',$6='15');\n" - " subcircuit INVX1 $3 ($1='12',$2='3',$3='15',$4='12',$5='2',$6='15');\n" - " subcircuit INVX1 $4 ($1='12',$2='4',$3='15',$4='12',$5='3',$6='15');\n" - " subcircuit INVX1 $5 ($1='12',$2='5',$3='15',$4='12',$5='4',$6='15');\n" - " subcircuit INVX1 $6 ($1='12',$2='6',$3='15',$4='12',$5='5',$6='15');\n" - " subcircuit INVX1 $7 ($1='12',$2='7',$3='15',$4='12',$5='6',$6='15');\n" - " subcircuit INVX1 $8 ($1='12',$2='8',$3='15',$4='12',$5='7',$6='15');\n" - " subcircuit INVX1 $9 ($1='12',$2='9',$3='15',$4='12',$5='8',$6='15');\n" - " subcircuit INVX1 $10 ($1='12',$2='10',$3='15',$4='12',$5='9',$6='15');\n" - " subcircuit INVX1 $11 ($1='12',$2='11',$3='15',$4='12',$5='10',$6='15');\n" - " subcircuit INVX1 $12 ($1='12',$2='13',$3='15',$4='12',$5='11',$6='15');\n" + "circuit RINGO ('11'='11','12'='12','13'='13','14'='14','15'='15');\n" + " subcircuit ND2X1 $1 ('1'='12','2'='1','3'='15','4'='12','5'='11','6'='14','7'='15');\n" + " subcircuit INVX1 $2 ('1'='12','2'='2','3'='15','4'='12','5'='1','6'='15');\n" + " subcircuit INVX1 $3 ('1'='12','2'='3','3'='15','4'='12','5'='2','6'='15');\n" + " subcircuit INVX1 $4 ('1'='12','2'='4','3'='15','4'='12','5'='3','6'='15');\n" + " subcircuit INVX1 $5 ('1'='12','2'='5','3'='15','4'='12','5'='4','6'='15');\n" + " subcircuit INVX1 $6 ('1'='12','2'='6','3'='15','4'='12','5'='5','6'='15');\n" + " subcircuit INVX1 $7 ('1'='12','2'='7','3'='15','4'='12','5'='6','6'='15');\n" + " subcircuit INVX1 $8 ('1'='12','2'='8','3'='15','4'='12','5'='7','6'='15');\n" + " subcircuit INVX1 $9 ('1'='12','2'='9','3'='15','4'='12','5'='8','6'='15');\n" + " subcircuit INVX1 $10 ('1'='12','2'='10','3'='15','4'='12','5'='9','6'='15');\n" + " subcircuit INVX1 $11 ('1'='12','2'='11','3'='15','4'='12','5'='10','6'='15');\n" + " subcircuit INVX1 $12 ('1'='12','2'='13','3'='15','4'='12','5'='11','6'='15');\n" "end;\n" ); } @@ -135,18 +135,18 @@ TEST(4_ReaderWithUnconnectedPins) reader.read (is, nl); EXPECT_EQ (nl.to_string (), - "circuit RINGO ($1='1',$2='2',$3='3',$4='4');\n" - " subcircuit INV2PAIR $1 ($1='4',$2='3',$3='4',$4='1',$5='6',$6='2',$7='3');\n" - " subcircuit INV2PAIR $2 ($1='4',$2='3',$3='4',$4=(null),$5='1',$6='5',$7='3');\n" - " subcircuit INV2PAIR $3 ($1='4',$2='3',$3='4',$4=(null),$5='5',$6='8',$7='3');\n" - " subcircuit INV2PAIR $4 ($1='4',$2='3',$3='4',$4=(null),$5='8',$6='7',$7='3');\n" - " subcircuit INV2PAIR $5 ($1='4',$2='3',$3='4',$4=(null),$5='7',$6='6',$7='3');\n" + "circuit RINGO ('1'='1','2'='2','3'='3','4'='4');\n" + " subcircuit INV2PAIR $1 ('1'='4','2'='3','3'='4','4'='1','5'='6','6'='2','7'='3');\n" + " subcircuit INV2PAIR $2 ('1'='4','2'='3','3'='4','4'=(null),'5'='1','6'='5','7'='3');\n" + " subcircuit INV2PAIR $3 ('1'='4','2'='3','3'='4','4'=(null),'5'='5','6'='8','7'='3');\n" + " subcircuit INV2PAIR $4 ('1'='4','2'='3','3'='4','4'=(null),'5'='8','6'='7','7'='3');\n" + " subcircuit INV2PAIR $5 ('1'='4','2'='3','3'='4','4'=(null),'5'='7','6'='6','7'='3');\n" "end;\n" - "circuit INV2PAIR ($1='1',$2='2',$3='3',$4='4',$5='5',$6='6',$7='7');\n" - " subcircuit INV2 $1 ($1='7',$2='5',$3='4',$4='3',$5='2',$6='1');\n" - " subcircuit INV2 $2 ($1='7',$2='4',$3='6',$4='3',$5='2',$6='1');\n" + "circuit INV2PAIR ('1'='1','2'='2','3'='3','4'='4','5'='5','6'='6','7'='7');\n" + " subcircuit INV2 $1 ('1'='7','2'='5','3'='4','4'='3','5'='2','6'='1');\n" + " subcircuit INV2 $2 ('1'='7','2'='4','3'='6','4'='3','5'='2','6'='1');\n" "end;\n" - "circuit INV2 ($1='1',$2='2',$3='3',$4='4',$5='5',$6='6');\n" + "circuit INV2 ('1'='1','2'='2','3'='3','4'='4','5'='5','6'='6');\n" " device PMOS $1 (S='3',G='2',D='5',B='1') (L=0.25,W=3.5,AS=1.4,AD=1.4,PS=6.85,PD=6.85);\n" " device NMOS $3 (S='3',G='2',D='4',B='6') (L=0.25,W=3.5,AS=1.4,AD=1.4,PS=6.85,PD=6.85);\n" "end;\n" @@ -164,7 +164,7 @@ TEST(5_CircuitParameters) reader.read (is, nl); EXPECT_EQ (nl.to_string (), - "circuit SUBCKT ($1=$1,$2=A,$3='V42(%)',$4=Z,$5=GND,$6=GND$1);\n" + "circuit SUBCKT ($1=$1,A=A,'V42(%)'='V42(%)',Z=Z,GND=GND,GND$1=GND$1);\n" " subcircuit HVPMOS D_$1 ($1='V42(%)',$2=$3,$3=Z,$4=$1);\n" " subcircuit HVPMOS D_$2 ($1='V42(%)',$2=A,$3=$3,$4=$1);\n" " subcircuit HVNMOS D_$3 ($1=GND,$2=$3,$3=GND,$4=GND$1);\n" @@ -242,7 +242,7 @@ TEST(6_ReaderWithDelegate) reader.read (is, nl); EXPECT_EQ (nl.to_string (), - "circuit SUBCKT ($1=$1,$2=A,$3=VDD,$4=Z,$5=GND,$6=GND$1);\n" + "circuit SUBCKT ($1=$1,A=A,VDD=VDD,Z=Z,GND=GND,GND$1=GND$1);\n" " device HVPMOS $1 (S=VDD,G=$3,D=Z,B=$1) (L=0.3,W=1.5,AS=0.27,AD=0.27,PS=3.24,PD=3.24);\n" " device HVPMOS $2 (S=VDD,G=A,D=$3,B=$1) (L=0.3,W=1.5,AS=0.27,AD=0.27,PS=3.24,PD=3.24);\n" " device HVNMOS $3 (S=GND,G=$3,D=GND,B=GND$1) (L=1.695,W=3.18,AS=0,AD=0,PS=9,PD=9);\n" @@ -251,7 +251,7 @@ TEST(6_ReaderWithDelegate) " device RES $1 (A=A,B=Z) (R=100000,L=0,W=0,A=0,P=0);\n" "end;\n" "circuit .TOP ();\n" - " subcircuit SUBCKT SUBCKT ($1=(null),$2=(null),$3=(null),$4=(null),$5=VSS,$6=VSS);\n" + " subcircuit SUBCKT SUBCKT ($1=(null),A=(null),VDD=(null),Z=(null),GND=VSS,GND$1=VSS);\n" "end;\n" ); } diff --git a/testdata/algo/lvs_test1_au.lvsdb b/testdata/algo/lvs_test1_au.lvsdb index e7277ae3d..b20b9b77b 100644 --- a/testdata/algo/lvs_test1_au.lvsdb +++ b/testdata/algo/lvs_test1_au.lvsdb @@ -799,12 +799,12 @@ reference( net(6 name('6')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(5 name('5')) + pin(6 name('6')) # Devices and their connections device(1 PMOS @@ -847,13 +847,13 @@ reference( net(7 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) - pin(7) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(5 name('5')) + pin(6 name('6')) + pin(7 name('7')) # Subcircuits and their connections circuit(1 INV2 name($1) @@ -887,10 +887,10 @@ reference( net(8 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) # Subcircuits and their connections circuit(1 INV2PAIR name($1) diff --git a/testdata/algo/lvs_test1b_au.lvsdb b/testdata/algo/lvs_test1b_au.lvsdb index 858b8a2da..58faa611b 100644 --- a/testdata/algo/lvs_test1b_au.lvsdb +++ b/testdata/algo/lvs_test1b_au.lvsdb @@ -799,12 +799,12 @@ reference( net(6 name('6')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(5 name('5')) + pin(6 name('6')) # Devices and their connections device(1 PMOS @@ -847,13 +847,13 @@ reference( net(7 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) - pin(7) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(5 name('5')) + pin(6 name('6')) + pin(7 name('7')) # Subcircuits and their connections circuit(1 INV2 name($1) @@ -887,10 +887,10 @@ reference( net(8 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) # Subcircuits and their connections circuit(1 INV2PAIR name($1) diff --git a/testdata/algo/lvs_test2_au.lvsdb b/testdata/algo/lvs_test2_au.lvsdb index dfc0ece2b..7e3552182 100644 --- a/testdata/algo/lvs_test2_au.lvsdb +++ b/testdata/algo/lvs_test2_au.lvsdb @@ -799,12 +799,12 @@ reference( net(6 name('6')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(5 name('5')) + pin(6 name('6')) # Devices and their connections device(1 PMOS @@ -846,13 +846,13 @@ reference( net(6 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin() - pin(5) - pin(6) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(name('5')) + pin(5 name('6')) + pin(6 name('7')) # Subcircuits and their connections circuit(1 INV2 name($2) @@ -878,10 +878,10 @@ reference( net(8 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) # Subcircuits and their connections circuit(1 INV2PAIR name($1) @@ -939,13 +939,13 @@ reference( net(6 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin() - pin(5) - pin(6) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(name('5')) + pin(5 name('6')) + pin(6 name('7')) # Subcircuits and their connections circuit(1 INV2 name($2) diff --git a/testdata/algo/lvs_test2b_au.lvsdb b/testdata/algo/lvs_test2b_au.lvsdb index e7fe45287..e1a8825f8 100644 --- a/testdata/algo/lvs_test2b_au.lvsdb +++ b/testdata/algo/lvs_test2b_au.lvsdb @@ -799,12 +799,12 @@ reference( net(6 name('6')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(5 name('5')) + pin(6 name('6')) # Devices and their connections device(1 PMOS @@ -846,13 +846,13 @@ reference( net(6 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin() - pin(5) - pin(6) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(name('5')) + pin(5 name('6')) + pin(6 name('7')) # Subcircuits and their connections circuit(1 INV2 name($2) @@ -878,10 +878,10 @@ reference( net(8 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) # Subcircuits and their connections circuit(1 INV2PAIR name($1) @@ -939,13 +939,13 @@ reference( net(6 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin() - pin(5) - pin(6) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(name('5')) + pin(5 name('6')) + pin(6 name('7')) # Subcircuits and their connections circuit(1 INV2 name($2) diff --git a/testdata/lvs/inv.lvsdb b/testdata/lvs/inv.lvsdb index 1e96ba514..33c6d5e86 100644 --- a/testdata/lvs/inv.lvsdb +++ b/testdata/lvs/inv.lvsdb @@ -181,12 +181,12 @@ reference( net(6 name(VDD)) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name(VSS)) + pin(2 name(IN)) + pin(3 name(OUT)) + pin(4 name(NWELL)) + pin(5 name(SUBSTRATE)) + pin(6 name(VDD)) # Devices and their connections device(1 PMOS @@ -229,12 +229,12 @@ xref( net(6 5 match) net(3 6 match) net(2 1 match) - pin(() 0 match) pin(() 1 match) - pin(() 2 match) pin(() 3 match) + pin(() 2 match) pin(() 4 match) pin(() 5 match) + pin(() 0 match) device(2 2 match) device(1 1 match) ) diff --git a/testdata/lvs/inv2.lvsdb b/testdata/lvs/inv2.lvsdb index 568a79d1b..594a5e685 100644 --- a/testdata/lvs/inv2.lvsdb +++ b/testdata/lvs/inv2.lvsdb @@ -151,10 +151,10 @@ H( N(2 I(IN)) N(3 I(OUT)) N(4 I(VDD)) - P(1) - P(2) - P(3) - P(4) + P(1 I(VSS)) + P(2 I(IN)) + P(3 I(OUT)) + P(4 I(VDD)) D(1 PMOS I(P) E(L 0.25) @@ -190,10 +190,10 @@ Z( N(3 3 1) N(2 4 1) N(4 1 1) - P(() 0 1) P(() 1 1) P(() 2 1) P(() 3 1) + P(() 0 1) D(2 2 1) D(1 1 1) ) diff --git a/testdata/lvs/ringo_simple.lvsdb b/testdata/lvs/ringo_simple.lvsdb index 5e05088fb..9ed4f2480 100644 --- a/testdata/lvs/ringo_simple.lvsdb +++ b/testdata/lvs/ringo_simple.lvsdb @@ -651,13 +651,13 @@ reference( net(8 name('1')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) - pin(7) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(B)) + pin(6 name(A)) + pin(7 name(BULK)) # Devices and their connections device(1 PMOS @@ -725,12 +725,12 @@ reference( net(6 name(BULK)) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(IN)) + pin(6 name(BULK)) # Devices and their connections device(1 PMOS @@ -781,11 +781,11 @@ reference( net(15 name('10')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) + pin(1 name(VSS)) + pin(2 name(VDD)) + pin(3 name(FB)) + pin(4 name(ENABLE)) + pin(5 name(OUT)) # Subcircuits and their connections circuit(1 ND2X1 name($1) diff --git a/testdata/lvs/ringo_simple_blackboxing.lvsdb b/testdata/lvs/ringo_simple_blackboxing.lvsdb index 2a5a511ed..172b60755 100644 --- a/testdata/lvs/ringo_simple_blackboxing.lvsdb +++ b/testdata/lvs/ringo_simple_blackboxing.lvsdb @@ -311,35 +311,35 @@ reference( circuit(ND2X1 # Outgoing pins and their connections to nets - pin() - pin() - pin() - pin() - pin() - pin() - pin() + pin(name(VDD)) + pin(name(OUT)) + pin(name(VSS)) + pin(name(NWELL)) + pin(name(B)) + pin(name(A)) + pin(name(BULK)) ) circuit(INVX1 # Outgoing pins and their connections to nets - pin() - pin() - pin() - pin() - pin() - pin() + pin(name(VDD)) + pin(name(OUT)) + pin(name(VSS)) + pin(name(NWELL)) + pin(name(IN)) + pin(name(BULK)) ) circuit(INVX2 # Outgoing pins and their connections to nets - pin() - pin() - pin() - pin() - pin() - pin() + pin(name(VDD)) + pin(name(OUT)) + pin(name(VSS)) + pin(name(NWELL)) + pin(name(IN)) + pin(name(BULK)) ) circuit(RINGO @@ -362,11 +362,11 @@ reference( net(15 name('10')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) + pin(1 name(VSS)) + pin(2 name(VDD)) + pin(3 name(FB)) + pin(4 name(ENABLE)) + pin(5 name(OUT)) # Subcircuits and their connections circuit(1 ND2X1 name($1) @@ -484,12 +484,12 @@ xref( ) circuit(INVX2 INVX2 match xref( - pin(4 4 match) + pin(4 3 match) pin(5 5 match) - pin(0 0 match) - pin(2 2 match) - pin(1 1 match) - pin(3 3 match) + pin(0 4 match) + pin(2 1 match) + pin(1 0 match) + pin(3 2 match) ) ) circuit(ND2X1 ND2X1 match diff --git a/testdata/lvs/ringo_simple_implicit_connections.lvsdb b/testdata/lvs/ringo_simple_implicit_connections.lvsdb index 17d5a4237..8fc6d3364 100644 --- a/testdata/lvs/ringo_simple_implicit_connections.lvsdb +++ b/testdata/lvs/ringo_simple_implicit_connections.lvsdb @@ -670,13 +670,13 @@ reference( net(8 name('1')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) - pin(7) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(B)) + pin(6 name(A)) + pin(7 name(BULK)) # Devices and their connections device(1 PMOS @@ -744,12 +744,12 @@ reference( net(6 name(BULK)) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(IN)) + pin(6 name(BULK)) # Devices and their connections device(1 PMOS @@ -800,11 +800,11 @@ reference( net(15 name('10')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) + pin(1 name(VSS)) + pin(2 name(VDD)) + pin(3 name(FB)) + pin(4 name(ENABLE)) + pin(5 name(OUT)) # Subcircuits and their connections circuit(1 ND2X1 name($1) diff --git a/testdata/lvs/ringo_simple_io.lvsdb b/testdata/lvs/ringo_simple_io.lvsdb index 9d2257420..bff5f1a20 100644 --- a/testdata/lvs/ringo_simple_io.lvsdb +++ b/testdata/lvs/ringo_simple_io.lvsdb @@ -590,13 +590,13 @@ H( N(6 I(A)) N(7 I(BULK)) N(8 I('1')) - P(1) - P(2) - P(3) - P(4) - P(5) - P(6) - P(7) + P(1 I(VDD)) + P(2 I(OUT)) + P(3 I(VSS)) + P(4 I(NWELL)) + P(5 I(B)) + P(6 I(A)) + P(7 I(BULK)) D(1 PMOS I($1) E(L 0.25) @@ -657,12 +657,12 @@ H( N(4 I(NWELL)) N(5 I(IN)) N(6 I(BULK)) - P(1) - P(2) - P(3) - P(4) - P(5) - P(6) + P(1 I(VDD)) + P(2 I(OUT)) + P(3 I(VSS)) + P(4 I(NWELL)) + P(5 I(IN)) + P(6 I(BULK)) D(1 PMOS I($1) E(L 0.25) @@ -706,11 +706,11 @@ H( N(13 I('8')) N(14 I('9')) N(15 I('10')) - P(1) - P(2) - P(3) - P(4) - P(5) + P(1 I(VSS)) + P(2 I(VDD)) + P(3 I(FB)) + P(4 I(ENABLE)) + P(5 I(OUT)) X(1 ND2X1 I($1) P(0 2) P(1 6) diff --git a/testdata/lvs/ringo_simple_io2.lvsdb b/testdata/lvs/ringo_simple_io2.lvsdb index 5e05088fb..9ed4f2480 100644 --- a/testdata/lvs/ringo_simple_io2.lvsdb +++ b/testdata/lvs/ringo_simple_io2.lvsdb @@ -651,13 +651,13 @@ reference( net(8 name('1')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) - pin(7) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(B)) + pin(6 name(A)) + pin(7 name(BULK)) # Devices and their connections device(1 PMOS @@ -725,12 +725,12 @@ reference( net(6 name(BULK)) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(IN)) + pin(6 name(BULK)) # Devices and their connections device(1 PMOS @@ -781,11 +781,11 @@ reference( net(15 name('10')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) + pin(1 name(VSS)) + pin(2 name(VDD)) + pin(3 name(FB)) + pin(4 name(ENABLE)) + pin(5 name(OUT)) # Subcircuits and their connections circuit(1 ND2X1 name($1) diff --git a/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb b/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb index 034c13b0a..925edd988 100644 --- a/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb +++ b/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb @@ -651,13 +651,13 @@ reference( net(8 name('1')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) - pin(7) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(B)) + pin(6 name(A)) + pin(7 name(BULK)) # Devices and their connections device(1 PMOS @@ -725,12 +725,12 @@ reference( net(6 name(BULK)) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(IN)) + pin(6 name(BULK)) # Devices and their connections device(1 PMOS @@ -781,11 +781,11 @@ reference( net(15 name('10')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) + pin(1 name(VSS)) + pin(2 name(VDD)) + pin(3 name(FB)) + pin(4 name(ENABLE)) + pin(5 name(OUT)) # Subcircuits and their connections circuit(1 ND2X1 name($1) diff --git a/testdata/lvs/ringo_simple_pin_swapping.lvsdb b/testdata/lvs/ringo_simple_pin_swapping.lvsdb index 72ef443bd..2315835c9 100644 --- a/testdata/lvs/ringo_simple_pin_swapping.lvsdb +++ b/testdata/lvs/ringo_simple_pin_swapping.lvsdb @@ -651,13 +651,13 @@ reference( net(8 name('1')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) - pin(7) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(A)) + pin(6 name(B)) + pin(7 name(BULK)) # Devices and their connections device(1 PMOS @@ -725,12 +725,12 @@ reference( net(6 name(BULK)) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(IN)) + pin(6 name(BULK)) # Devices and their connections device(1 PMOS @@ -781,11 +781,11 @@ reference( net(15 name('10')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) + pin(1 name(VSS)) + pin(2 name(VDD)) + pin(3 name(FB)) + pin(4 name(ENABLE)) + pin(5 name(OUT)) # Subcircuits and their connections circuit(1 ND2X1 name($1) diff --git a/testdata/lvs/ringo_simple_same_device_classes.lvsdb b/testdata/lvs/ringo_simple_same_device_classes.lvsdb index e174f0c0a..8027c048c 100644 --- a/testdata/lvs/ringo_simple_same_device_classes.lvsdb +++ b/testdata/lvs/ringo_simple_same_device_classes.lvsdb @@ -651,13 +651,13 @@ reference( net(8 name('1')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) - pin(7) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(B)) + pin(6 name(A)) + pin(7 name(BULK)) # Devices and their connections device(1 PMOS @@ -725,12 +725,12 @@ reference( net(6 name(BULK)) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(IN)) + pin(6 name(BULK)) # Devices and their connections device(1 PMOS @@ -781,11 +781,11 @@ reference( net(15 name('10')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) + pin(1 name(VSS)) + pin(2 name(VDD)) + pin(3 name(FB)) + pin(4 name(ENABLE)) + pin(5 name(OUT)) # Subcircuits and their connections circuit(1 ND2X1 name($1) diff --git a/testdata/lvs/ringo_simple_simplification.lvsdb b/testdata/lvs/ringo_simple_simplification.lvsdb index d7c91d5dc..278aa58a8 100644 --- a/testdata/lvs/ringo_simple_simplification.lvsdb +++ b/testdata/lvs/ringo_simple_simplification.lvsdb @@ -757,13 +757,13 @@ reference( net(8 name('1')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) - pin(7) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(B)) + pin(6 name(A)) + pin(7 name(BULK)) # Devices and their connections device(1 PMOS @@ -831,12 +831,12 @@ reference( net(6 name(BULK)) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(IN)) + pin(6 name(BULK)) # Devices and their connections device(1 PMOS @@ -878,12 +878,12 @@ reference( net(6 name(BULK)) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(IN)) + pin(6 name(BULK)) # Devices and their connections device(1 PMOS @@ -934,11 +934,11 @@ reference( net(15 name('10')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) + pin(1 name(VSS)) + pin(2 name(VDD)) + pin(3 name(FB)) + pin(4 name(ENABLE)) + pin(5 name(OUT)) # Subcircuits and their connections circuit(1 ND2X1 name($1) diff --git a/testdata/ruby/dbNetlistReaderTests.rb b/testdata/ruby/dbNetlistReaderTests.rb index 3e138d288..75ae49365 100644 --- a/testdata/ruby/dbNetlistReaderTests.rb +++ b/testdata/ruby/dbNetlistReaderTests.rb @@ -92,7 +92,7 @@ class DBNetlistReaderTests_TestClass < TestBase assert_equal(nl.description, "Read by MyDelegate (sucessfully)") assert_equal(nl.to_s, <<"END") -circuit SUBCKT ($1=$1,$2=A,$3=VDD,$4=Z,$5=GND,$6=GND$1); +circuit SUBCKT ($1=$1,A=A,VDD=VDD,Z=Z,GND=GND,GND$1=GND$1); device HVPMOS $1 (S=VDD,G=$3,D=Z,B=$1) (L=0.3,W=1.5,AS=0.27,AD=0.27,PS=3.24,PD=3.24); device HVPMOS $2 (S=VDD,G=A,D=$3,B=$1) (L=0.3,W=1.5,AS=0.27,AD=0.27,PS=3.24,PD=3.24); device HVNMOS $3 (S=GND,G=$3,D=GND,B=GND$1) (L=1.695,W=3.18,AS=0,AD=0,PS=9,PD=9); @@ -101,7 +101,7 @@ circuit SUBCKT ($1=$1,$2=A,$3=VDD,$4=Z,$5=GND,$6=GND$1); device RES $1 (A=A,B=Z) (R=100000,L=0,W=0,A=0,P=0); end; circuit .TOP (); - subcircuit SUBCKT SUBCKT ($1=(null),$2=(null),$3=(null),$4=(null),$5=VSS,$6=VSS); + subcircuit SUBCKT SUBCKT ($1=(null),A=(null),VDD=(null),Z=(null),GND=VSS,GND$1=VSS); end; END