From a5a4ae511d2d4c2d105b8e259164bd30049c9fd7 Mon Sep 17 00:00:00 2001 From: Matthias Koefferlein Date: Fri, 28 Feb 2020 23:19:27 +0100 Subject: [PATCH] Some more tests, a (unlikely) segfault fixed --- src/db/db/dbNetlistCompare.cc | 4 ++ src/db/unit_tests/dbNetlistCompareTests.cc | 45 ++++++++++++++++++++-- 2 files changed, 46 insertions(+), 3 deletions(-) diff --git a/src/db/db/dbNetlistCompare.cc b/src/db/db/dbNetlistCompare.cc index 99c3cec22..3b423f2d1 100644 --- a/src/db/db/dbNetlistCompare.cc +++ b/src/db/db/dbNetlistCompare.cc @@ -3714,6 +3714,10 @@ static bool derive_symmetry_groups (const db::NetGraph &graph, const tl::equival void NetlistComparer::join_symmetric_nets (db::Circuit *circuit) { + if (! circuit) { + return; + } + tl::SelfTimer timer (tl::verbosity () >= 21, tl::to_string (tr ("Join symmetric nodes for circuit: ")) + circuit->name ()); db::DeviceFilter device_filter (m_cap_threshold, m_res_threshold); diff --git a/src/db/unit_tests/dbNetlistCompareTests.cc b/src/db/unit_tests/dbNetlistCompareTests.cc index fe6749094..6f0a259ed 100644 --- a/src/db/unit_tests/dbNetlistCompareTests.cc +++ b/src/db/unit_tests/dbNetlistCompareTests.cc @@ -3739,7 +3739,7 @@ TEST(25_JoinSymmetricNets) TEST(25b_JoinSymmetricNetsMultiple) { const char *nls = - "circuit NAND2 (A=A,B=B,OUT=OUT,VSS=VSS,VDD=VDD);\n" + "circuit NAND3 (A=A,B=B,C=C,OUT=OUT,VSS=VSS,VDD=VDD);\n" " device PMOS $1 (S=OUT,G=A,D=VDD) (L=0.25,W=1);\n" " device PMOS $2 (S=VDD,G=B,D=OUT) (L=0.25,W=1);\n" " device PMOS $3 (S=VDD,G=C,D=OUT) (L=0.25,W=1);\n" @@ -3759,13 +3759,13 @@ TEST(25b_JoinSymmetricNetsMultiple) prep_nl (nl, nls); db::NetlistComparer comp; - comp.join_symmetric_nets (nl.circuit_by_name ("NAND2")); + comp.join_symmetric_nets (nl.circuit_by_name ("NAND3")); nl.combine_devices (); // NOTE $1 and $2 are joined because they are symmetric EXPECT_EQ (nl.to_string (), - "circuit NAND2 (A=A,B=B,OUT=OUT,VSS=VSS,VDD=VDD);\n" + "circuit NAND3 (A=A,B=B,C=C,OUT=OUT,VSS=VSS,VDD=VDD);\n" " device PMOS $1 (S=OUT,G=A,D=VDD) (L=0.25,W=1,AS=0,AD=0,PS=0,PD=0);\n" " device PMOS $2 (S=VDD,G=B,D=OUT) (L=0.25,W=1,AS=0,AD=0,PS=0,PD=0);\n" " device PMOS $3 (S=VDD,G=C,D=OUT) (L=0.25,W=1,AS=0,AD=0,PS=0,PD=0);\n" @@ -3776,6 +3776,45 @@ TEST(25b_JoinSymmetricNetsMultiple) ) } +TEST(25c_JoinSymmetricNetsMultipleMessedUp) +{ + const char *nls = + "circuit NOR3 (A=A,C=C,B=B,OUT=OUT,VSS=VSS,VDD=VDD);\n" + " device PMOS $9 (S=$6,G=B,D=$3) (L=0.27,W=1.1);\n" + " device NMOS $1 (S=OUT,G=A,D=VSS) (L=0.23,W=2.05);\n" + " device PMOS $5 (S=$2,G=A,D=OUT) (L=0.27,W=1.1);\n" + " device NMOS $2 (S=OUT,G=B,D=VSS) (L=0.23,W=2.05);\n" + " device PMOS $8 (S=$2,G=B,D=$5) (L=0.27,W=1.1);\n" + " device PMOS $4 (S=$21,G=A,D=OUT) (L=0.27,W=1.1);\n" + " device PMOS $7 (S=$21,G=B,D=$4) (L=0.27,W=1.1);\n" + " device PMOS $12 (S=VDD,G=C,D=$6) (L=0.27,W=1.1);\n" + " device PMOS $10 (S=$4,G=C,D=VDD) (L=0.27,W=1.1);\n" + " device PMOS $6 (S=$3,G=A,D=OUT) (L=0.27,W=1.1);\n" + " device PMOS $11 (S=VDD,G=C,D=$5) (L=0.27,W=1.1);\n" + " device NMOS $3 (S=VSS,G=C,D=OUT) (L=0.23,W=2.05);\n" + "end;\n"; + + db::Netlist nl; + prep_nl (nl, nls); + + db::NetlistComparer comp; + comp.join_symmetric_nets (nl.circuit_by_name ("NOR3")); + + nl.combine_devices (); + + // NOTE $1 and $2 are joined because they are symmetric + EXPECT_EQ (nl.to_string (), + "circuit NOR3 (A=A,C=C,B=B,OUT=OUT,VSS=VSS,VDD=VDD);\n" + " device PMOS $1 (S=$5,G=B,D=$3) (L=0.27,W=3.3,AS=0,AD=0,PS=0,PD=0);\n" + " device NMOS $2 (S=OUT,G=A,D=VSS) (L=0.23,W=2.05,AS=0,AD=0,PS=0,PD=0);\n" + " device PMOS $3 (S=$3,G=A,D=OUT) (L=0.27,W=3.3,AS=0,AD=0,PS=0,PD=0);\n" + " device NMOS $4 (S=OUT,G=B,D=VSS) (L=0.23,W=2.05,AS=0,AD=0,PS=0,PD=0);\n" + " device PMOS $8 (S=VDD,G=C,D=$5) (L=0.27,W=3.3,AS=0,AD=0,PS=0,PD=0);\n" + " device NMOS $12 (S=VSS,G=C,D=OUT) (L=0.23,W=2.05,AS=0,AD=0,PS=0,PD=0);\n" + "end;\n" + ) +} + TEST(26_JoinSymmetricNets) { const char *nls =