From 9fa561803413d91c5a97887ed624203478fe847e Mon Sep 17 00:00:00 2001
From: Matthias Koefferlein <matthias@koefferlein.de>
Date: Tue, 8 Jan 2019 23:49:12 +0100
Subject: [PATCH] Added test for device combination.

---
 src/db/unit_tests/dbLayoutToNetlistTests.cc   | 279 +++++++++++++++++-
 .../algo/device_extract_au5_with_rec_nets.gds | Bin 0 -> 73106 bytes
 testdata/algo/device_extract_l5.gds           | Bin 0 -> 4934 bytes
 testdata/ruby/dbLayoutToNetlist.rb            |   1 -
 4 files changed, 273 insertions(+), 7 deletions(-)
 create mode 100644 testdata/algo/device_extract_au5_with_rec_nets.gds
 create mode 100644 testdata/algo/device_extract_l5.gds

diff --git a/src/db/unit_tests/dbLayoutToNetlistTests.cc b/src/db/unit_tests/dbLayoutToNetlistTests.cc
index 91ccde1fe..250b91ac0 100644
--- a/src/db/unit_tests/dbLayoutToNetlistTests.cc
+++ b/src/db/unit_tests/dbLayoutToNetlistTests.cc
@@ -40,6 +40,11 @@
 namespace
 {
 
+static std::string qnet_name (const db::Net *net)
+{
+  return net ? net->qname () : "(null)";
+}
+
 static std::string device_name (const db::Device &device)
 {
   if (device.name ().empty ()) {
@@ -202,12 +207,6 @@ static void dump_recursive_nets_to_layout (const db::LayoutToNetlist &l2n, db::L
   }
 }
 
-//  TODO: may be useful elsewhere?
-static std::string qnet_name (const db::Net *net)
-{
-  return net ? net->qname () : "(null)";
-}
-
 static unsigned int define_layer (db::Layout &ly, db::LayerMap &lmap, int gds_layer, int gds_datatype = 0)
 {
   unsigned int lid = ly.insert_layer (db::LayerProperties (gds_layer, gds_datatype));
@@ -1358,3 +1357,271 @@ TEST(4_GlobalNetDeviceExtraction)
   EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (2.6, 1.0))), "INV2PAIR:$I8");
   EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (6.4, 1.0))), "INV2PAIR:$I4");
 }
+
+TEST(5_DeviceExtractionWithDeviceCombination)
+{
+  db::Layout ly;
+  db::LayerMap lmap;
+
+  unsigned int nwell      = define_layer (ly, lmap, 1);
+  unsigned int active     = define_layer (ly, lmap, 2);
+  unsigned int pplus      = define_layer (ly, lmap, 10);
+  unsigned int nplus      = define_layer (ly, lmap, 11);
+  unsigned int poly       = define_layer (ly, lmap, 3);
+  unsigned int poly_lbl   = define_layer (ly, lmap, 3, 1);
+  unsigned int diff_cont  = define_layer (ly, lmap, 4);
+  unsigned int poly_cont  = define_layer (ly, lmap, 5);
+  unsigned int metal1     = define_layer (ly, lmap, 6);
+  unsigned int metal1_lbl = define_layer (ly, lmap, 6, 1);
+  unsigned int via1       = define_layer (ly, lmap, 7);
+  unsigned int metal2     = define_layer (ly, lmap, 8);
+  unsigned int metal2_lbl = define_layer (ly, lmap, 8, 1);
+
+  {
+    db::LoadLayoutOptions options;
+    options.get_options<db::CommonReaderOptions> ().layer_map = lmap;
+    options.get_options<db::CommonReaderOptions> ().create_other_layers = false;
+
+    std::string fn (tl::testsrc ());
+    fn = tl::combine_path (fn, "testdata");
+    fn = tl::combine_path (fn, "algo");
+    fn = tl::combine_path (fn, "device_extract_l5.gds");
+
+    tl::InputStream stream (fn);
+    db::Reader reader (stream);
+    reader.read (ly, options);
+  }
+
+  db::Cell &tc = ly.cell (*ly.begin_top_down ());
+  db::LayoutToNetlist l2n (db::RecursiveShapeIterator (ly, tc, std::set<unsigned int> ()));
+
+  std::auto_ptr<db::Region> rbulk (l2n.make_layer (ly.insert_layer ()));
+  std::auto_ptr<db::Region> rnwell (l2n.make_layer (nwell));
+  std::auto_ptr<db::Region> ractive (l2n.make_layer (active));
+  std::auto_ptr<db::Region> rpplus (l2n.make_layer (pplus));
+  std::auto_ptr<db::Region> rnplus (l2n.make_layer (nplus));
+  std::auto_ptr<db::Region> rpoly (l2n.make_polygon_layer (poly));
+  std::auto_ptr<db::Region> rpoly_lbl (l2n.make_text_layer (poly_lbl));
+  std::auto_ptr<db::Region> rdiff_cont (l2n.make_polygon_layer (diff_cont));
+  std::auto_ptr<db::Region> rpoly_cont (l2n.make_polygon_layer (poly_cont));
+  std::auto_ptr<db::Region> rmetal1 (l2n.make_polygon_layer (metal1));
+  std::auto_ptr<db::Region> rmetal1_lbl (l2n.make_text_layer (metal1_lbl));
+  std::auto_ptr<db::Region> rvia1 (l2n.make_polygon_layer (via1));
+  std::auto_ptr<db::Region> rmetal2 (l2n.make_polygon_layer (metal2));
+  std::auto_ptr<db::Region> rmetal2_lbl (l2n.make_text_layer (metal2_lbl));
+
+  //  derived regions
+
+  db::Region ractive_in_nwell = *ractive & *rnwell;
+  db::Region rpactive = ractive_in_nwell & *rpplus;
+  db::Region rntie    = ractive_in_nwell & *rnplus;
+  db::Region rpgate   = rpactive & *rpoly;
+  db::Region rpsd     = rpactive - rpgate;
+
+  db::Region ractive_outside_nwell = *ractive - *rnwell;
+  db::Region rnactive = ractive_outside_nwell & *rnplus;
+  db::Region rptie    = ractive_outside_nwell & *rpplus;
+  db::Region rngate   = rnactive & *rpoly;
+  db::Region rnsd     = rnactive - rngate;
+
+  //  return the computed layers into the original layout and write it for debugging purposes
+
+  unsigned int lgate  = ly.insert_layer (db::LayerProperties (20, 0));      // 20/0 -> Gate
+  unsigned int lsd    = ly.insert_layer (db::LayerProperties (21, 0));      // 21/0 -> Source/Drain
+  unsigned int lpdiff = ly.insert_layer (db::LayerProperties (22, 0));      // 22/0 -> P Diffusion
+  unsigned int lndiff = ly.insert_layer (db::LayerProperties (23, 0));      // 23/0 -> N Diffusion
+  unsigned int lptie  = ly.insert_layer (db::LayerProperties (24, 0));      // 24/0 -> P Tie
+  unsigned int lntie  = ly.insert_layer (db::LayerProperties (25, 0));      // 25/0 -> N Tie
+
+  rpgate.insert_into (&ly, tc.cell_index (), lgate);
+  rngate.insert_into (&ly, tc.cell_index (), lgate);
+  rpsd.insert_into (&ly, tc.cell_index (), lsd);
+  rnsd.insert_into (&ly, tc.cell_index (), lsd);
+  rpsd.insert_into (&ly, tc.cell_index (), lpdiff);
+  rnsd.insert_into (&ly, tc.cell_index (), lndiff);
+  rpsd.insert_into (&ly, tc.cell_index (), lptie);
+  rnsd.insert_into (&ly, tc.cell_index (), lntie);
+
+  //  NOTE: the device extractor will add more debug layers for the transistors:
+  //    20/0 -> Diffusion
+  //    21/0 -> Gate
+  MOSFET4Extractor pmos_ex ("PMOS", &ly);
+  MOSFET4Extractor nmos_ex ("NMOS", &ly);
+
+  //  device extraction
+
+  db::NetlistDeviceExtractor::input_layers dl;
+
+  dl["SD"] = &rpsd;
+  dl["G"] = &rpgate;
+  dl["P"] = rpoly.get ();  //  not needed for extraction but to return terminal shapes
+  dl["W"] = rnwell.get ();
+  l2n.extract_devices (pmos_ex, dl);
+
+  dl["SD"] = &rnsd;
+  dl["G"] = &rngate;
+  dl["P"] = rpoly.get ();  //  not needed for extraction but to return terminal shapes
+  dl["W"] = rbulk.get ();
+  l2n.extract_devices (nmos_ex, dl);
+
+  //  net extraction
+
+  //  Intra-layer
+  l2n.connect (rpsd);
+  l2n.connect (rnsd);
+  l2n.connect (*rnwell);
+  l2n.connect (*rpoly);
+  l2n.connect (*rdiff_cont);
+  l2n.connect (*rpoly_cont);
+  l2n.connect (*rmetal1);
+  l2n.connect (*rvia1);
+  l2n.connect (*rmetal2);
+  l2n.connect (rptie);
+  l2n.connect (rntie);
+  //  Inter-layer
+  l2n.connect (rpsd,        *rdiff_cont);
+  l2n.connect (rnsd,        *rdiff_cont);
+  l2n.connect (*rpoly,      *rpoly_cont);
+  l2n.connect (*rpoly_cont, *rmetal1);
+  l2n.connect (*rdiff_cont, *rmetal1);
+  l2n.connect (*rdiff_cont, rptie);
+  l2n.connect (*rdiff_cont, rntie);
+  l2n.connect (*rnwell,     rntie);
+  l2n.connect (*rmetal1,    *rvia1);
+  l2n.connect (*rvia1,      *rmetal2);
+  l2n.connect (*rpoly,      *rpoly_lbl);     //  attaches labels
+  l2n.connect (*rmetal1,    *rmetal1_lbl);   //  attaches labels
+  l2n.connect (*rmetal2,    *rmetal2_lbl);   //  attaches labels
+  //  Global
+  l2n.connect_global (rptie, "BULK");
+  l2n.connect_global (*rbulk, "BULK");
+
+  //  create some mess - we have to keep references to the layers to make them not disappear
+  rmetal1_lbl.reset (0);
+  rmetal2_lbl.reset (0);
+  rpoly_lbl.reset (0);
+
+  l2n.extract_netlist ();
+
+  //  debug layers produced for nets
+  //    201/0 -> Well
+  //    203/0 -> Poly
+  //    204/0 -> Diffusion contacts
+  //    205/0 -> Poly contacts
+  //    206/0 -> Metal1
+  //    207/0 -> Via1
+  //    208/0 -> Metal2
+  //    210/0 -> N source/drain
+  //    211/0 -> P source/drain
+  //    212/0 -> N tie
+  //    213/0 -> P tie
+  std::map<const db::Region *, unsigned int> dump_map;
+  dump_map [&rpsd            ] = ly.insert_layer (db::LayerProperties (210, 0));
+  dump_map [&rnsd            ] = ly.insert_layer (db::LayerProperties (211, 0));
+  dump_map [&rptie           ] = ly.insert_layer (db::LayerProperties (212, 0));
+  dump_map [&rntie           ] = ly.insert_layer (db::LayerProperties (213, 0));
+  dump_map [rbulk.get ()     ] = ly.insert_layer (db::LayerProperties (214, 0));
+  dump_map [rnwell.get ()    ] = ly.insert_layer (db::LayerProperties (201, 0));
+  dump_map [rpoly.get ()     ] = ly.insert_layer (db::LayerProperties (203, 0));
+  dump_map [rdiff_cont.get ()] = ly.insert_layer (db::LayerProperties (204, 0));
+  dump_map [rpoly_cont.get ()] = ly.insert_layer (db::LayerProperties (205, 0));
+  dump_map [rmetal1.get ()   ] = ly.insert_layer (db::LayerProperties (206, 0));
+  dump_map [rvia1.get ()     ] = ly.insert_layer (db::LayerProperties (207, 0));
+  dump_map [rmetal2.get ()   ] = ly.insert_layer (db::LayerProperties (208, 0));
+
+  //  write nets to layout
+  db::CellMapping cm = l2n.cell_mapping_into (ly, tc);
+  dump_nets_to_layout (l2n, ly, dump_map, cm);
+
+  dump_map.clear ();
+  dump_map [&rpsd            ] = ly.insert_layer (db::LayerProperties (310, 0));
+  dump_map [&rnsd            ] = ly.insert_layer (db::LayerProperties (311, 0));
+  dump_map [&rptie           ] = ly.insert_layer (db::LayerProperties (312, 0));
+  dump_map [&rntie           ] = ly.insert_layer (db::LayerProperties (313, 0));
+  dump_map [rbulk.get ()     ] = ly.insert_layer (db::LayerProperties (314, 0));
+  dump_map [rnwell.get ()    ] = ly.insert_layer (db::LayerProperties (301, 0));
+  dump_map [rpoly.get ()     ] = ly.insert_layer (db::LayerProperties (303, 0));
+  dump_map [rdiff_cont.get ()] = ly.insert_layer (db::LayerProperties (304, 0));
+  dump_map [rpoly_cont.get ()] = ly.insert_layer (db::LayerProperties (305, 0));
+  dump_map [rmetal1.get ()   ] = ly.insert_layer (db::LayerProperties (306, 0));
+  dump_map [rvia1.get ()     ] = ly.insert_layer (db::LayerProperties (307, 0));
+  dump_map [rmetal2.get ()   ] = ly.insert_layer (db::LayerProperties (308, 0));
+
+  dump_recursive_nets_to_layout (l2n, ly, dump_map, cm);
+
+  //  compare netlist as string
+  EXPECT_EQ (l2n.netlist ()->to_string (),
+    "Circuit RINGO ():\n"
+    "  XINV2PAIR $1 (BULK='BULK,VSS',$2=VDD,$3='BULK,VSS',$4=FB,$5=$I7,$6=OSC,$7=VDD)\n"
+    "  XINV2PAIR $2 (BULK='BULK,VSS',$2=VDD,$3='BULK,VSS',$4=$I22,$5=FB,$6=$I13,$7=VDD)\n"
+    "  XINV2PAIR $3 (BULK='BULK,VSS',$2=VDD,$3='BULK,VSS',$4=$I23,$5=$I13,$6=$I5,$7=VDD)\n"
+    "  XINV2PAIR $4 (BULK='BULK,VSS',$2=VDD,$3='BULK,VSS',$4=$I24,$5=$I5,$6=$I6,$7=VDD)\n"
+    "  XINV2PAIR $5 (BULK='BULK,VSS',$2=VDD,$3='BULK,VSS',$4=$I25,$5=$I6,$6=$I7,$7=VDD)\n"
+    "Circuit INV2PAIR (BULK=BULK,$2=$I6,$3=$I5,$4=$I4,$5=$I3,$6=$I2,$7=$I1):\n"
+    "  XINV2 $1 ($1=$I1,IN=$I3,OUT=$I4,VSS=$I5,VDD=$I6,BULK=BULK)\n"
+    "  XINV2 $2 ($1=$I1,IN=$I4,OUT=$I2,VSS=$I5,VDD=$I6,BULK=BULK)\n"
+    "Circuit INV2 ($1=$1,IN=IN,OUT=OUT,VSS=VSS,VDD=VDD,BULK=BULK):\n"
+    "  DPMOS $1 (S=OUT,G=IN,D=VDD,B=$1) [L=0.25,W=1.75,AS=0.91875,AD=0.48125]\n"
+    "  DPMOS $2 (S=VDD,G=IN,D=OUT,B=$1) [L=0.25,W=1.75,AS=0.48125,AD=0.91875]\n"
+    "  DNMOS $3 (S=OUT,G=IN,D=VSS,B=BULK) [L=0.25,W=1.75,AS=0.91875,AD=0.48125]\n"
+    "  DNMOS $4 (S=VSS,G=IN,D=OUT,B=BULK) [L=0.25,W=1.75,AS=0.48125,AD=0.91875]\n"
+    "  XTRANS $1 ($1=OUT,$2=VSS,$3=IN)\n"
+    "  XTRANS $2 ($1=OUT,$2=VDD,$3=IN)\n"
+    "  XTRANS $3 ($1=OUT,$2=VSS,$3=IN)\n"
+    "  XTRANS $4 ($1=OUT,$2=VDD,$3=IN)\n"
+    "Circuit TRANS ($1=$1,$2=$2,$3=$3):\n"
+  );
+
+  //  compare the collected test data
+
+  std::string au = tl::testsrc ();
+  au = tl::combine_path (au, "testdata");
+  au = tl::combine_path (au, "algo");
+  au = tl::combine_path (au, "device_extract_au5_with_rec_nets.gds");
+
+  db::compare_layouts (_this, ly, au);
+
+  //  do some probing before purging
+
+  //  top level
+  EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal2, db::DPoint (0.0, 1.8))), "RINGO:FB");
+  EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal2, db::Point (0, 1800))), "RINGO:FB");
+  EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal2, db::DPoint (-2.0, 1.8))), "(null)");
+  EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (-1.5, 1.8))), "RINGO:FB");
+  EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (24.5, 1.8))), "RINGO:OSC");
+  EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (5.3, 0.0))), "RINGO:BULK,VSS");
+
+  // doesn't do anything here, but we test that this does not destroy anything:
+  l2n.netlist ()->combine_devices ();
+
+  //  make pins for named nets of top-level circuits - this way they are not purged
+  l2n.netlist ()->make_top_level_pins ();
+  l2n.netlist ()->purge ();
+
+  //  compare netlist as string
+  EXPECT_EQ (l2n.netlist ()->to_string (),
+    "Circuit RINGO (FB=FB,OSC=OSC,VDD=VDD,'BULK,VSS'='BULK,VSS'):\n"
+    "  XINV2PAIR $1 (BULK='BULK,VSS',$2=VDD,$3='BULK,VSS',$4=FB,$5=$I7,$6=OSC,$7=VDD)\n"
+    "  XINV2PAIR $2 (BULK='BULK,VSS',$2=VDD,$3='BULK,VSS',$4=(null),$5=FB,$6=$I13,$7=VDD)\n"
+    "  XINV2PAIR $3 (BULK='BULK,VSS',$2=VDD,$3='BULK,VSS',$4=(null),$5=$I13,$6=$I5,$7=VDD)\n"
+    "  XINV2PAIR $4 (BULK='BULK,VSS',$2=VDD,$3='BULK,VSS',$4=(null),$5=$I5,$6=$I6,$7=VDD)\n"
+    "  XINV2PAIR $5 (BULK='BULK,VSS',$2=VDD,$3='BULK,VSS',$4=(null),$5=$I6,$6=$I7,$7=VDD)\n"
+    "Circuit INV2PAIR (BULK=BULK,$2=$I6,$3=$I5,$4=$I4,$5=$I3,$6=$I2,$7=$I1):\n"
+    "  XINV2 $1 ($1=$I1,IN=$I3,OUT=$I4,VSS=$I5,VDD=$I6,BULK=BULK)\n"
+    "  XINV2 $2 ($1=$I1,IN=$I4,OUT=$I2,VSS=$I5,VDD=$I6,BULK=BULK)\n"
+    "Circuit INV2 ($1=$1,IN=IN,OUT=OUT,VSS=VSS,VDD=VDD,BULK=BULK):\n"
+    "  DPMOS $1 (S=OUT,G=IN,D=VDD,B=$1) [L=0.25,W=3.5,AS=1.4,AD=1.4]\n"
+    "  DNMOS $3 (S=OUT,G=IN,D=VSS,B=BULK) [L=0.25,W=3.5,AS=1.4,AD=1.4]\n"
+  );
+
+  //  do some probing after purging
+
+  //  top level
+  EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal2, db::DPoint (0.0, 1.8))), "RINGO:FB");
+  EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal2, db::Point (0, 1800))), "RINGO:FB");
+  EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal2, db::DPoint (-2.0, 1.8))), "(null)");
+  EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (-1.5, 1.8))), "RINGO:FB");
+  EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (24.5, 1.8))), "RINGO:OSC");
+  //  the transistor which supplies this probe target has been optimized away by "purge".
+  EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (5.3, 0.0))), "(null)");
+}
diff --git a/testdata/algo/device_extract_au5_with_rec_nets.gds b/testdata/algo/device_extract_au5_with_rec_nets.gds
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literal 0
HcmV?d00001

diff --git a/testdata/algo/device_extract_l5.gds b/testdata/algo/device_extract_l5.gds
new file mode 100644
index 0000000000000000000000000000000000000000..e5a038cdb69ca4dd14ef4baf5e8d0c6daee06bb2
GIT binary patch
literal 4934
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zz5eEQ^-21jqmK0Ba<9MbxcVgh?e`q%$K_ss_ign_`u!b_^y6}`KisB1Nq^snBmKBM
z>8IYaliP8Mcj24`%fE^Y9dfjI(3Lv>628d()%2D04_sBBwD=r9^`4yk3iVDQKUhA2
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literal 0
HcmV?d00001

diff --git a/testdata/ruby/dbLayoutToNetlist.rb b/testdata/ruby/dbLayoutToNetlist.rb
index 6029a064c..9ee4ab918 100644
--- a/testdata/ruby/dbLayoutToNetlist.rb
+++ b/testdata/ruby/dbLayoutToNetlist.rb
@@ -395,7 +395,6 @@ END
     l2n.netlist.make_top_level_pins
     l2n.netlist.purge
 
-    puts l2n.netlist.to_s
     assert_equal(l2n.netlist.to_s, <<END)
 Circuit RINGO (FB=FB,OSC=OSC,VDD=VDD,'BULK,VSS'='BULK,VSS'):
   XINV2PAIR $1 (BULK='BULK,VSS',$2=FB,$3=VDD,$4='BULK,VSS',$5=$I7,$6=OSC,$7=VDD)