diff --git a/src/db/db/dbNetlist.cc b/src/db/db/dbNetlist.cc
index 8e13ab793..fbe959837 100644
--- a/src/db/db/dbNetlist.cc
+++ b/src/db/db/dbNetlist.cc
@@ -626,7 +626,26 @@ void Netlist::purge_devices ()
   }
 }
 
-void Netlist::make_top_level_pins ()
+namespace {
+
+  struct CompareNetByName
+  {
+    CompareNetByName (const db::Netlist *netlist)
+      : mp_netlist (netlist)
+    { }
+
+    bool operator() (const db::Net *a, const db::Net *b)
+    {
+      return mp_netlist->normalize_name (a->name ()) < mp_netlist->normalize_name (b->name ());
+    }
+
+  private:
+    const db::Netlist *mp_netlist;
+  };
+
+}
+
+void Netlist::make_top_level_pins (bool sort_by_name)
 {
   size_t ntop = top_circuit_count ();
   for (top_down_circuit_iterator c = begin_top_down (); c != end_top_down () && ntop > 0; ++c, --ntop) {
@@ -635,14 +654,25 @@ void Netlist::make_top_level_pins ()
 
     if (circuit->pin_count () == 0) {
 
+      std::vector<db::Net *> nets_for_pins;
+
       //  create pins for the named nets and connect them
       for (Circuit::net_iterator n = circuit->begin_nets (); n != circuit->end_nets (); ++n) {
         if (! n->name ().empty () && n->terminal_count () + n->subcircuit_pin_count () > 0) {
-          Pin pin = circuit->add_pin (n->name ());
-          circuit->connect_pin (pin.id (), n.operator-> ());
+          nets_for_pins.push_back (n.operator-> ());
         }
       }
 
+      if (sort_by_name) {
+        std::stable_sort (nets_for_pins.begin (), nets_for_pins.end (), CompareNetByName (this));
+      }
+
+      //  create pins for the named nets and connect them
+      for (auto n = nets_for_pins.begin (); n != nets_for_pins.end (); ++n) {
+        Pin pin = circuit->add_pin ((*n)->name ());
+        circuit->connect_pin (pin.id (), *n);
+      }
+
     }
 
   }
diff --git a/src/db/db/dbNetlist.h b/src/db/db/dbNetlist.h
index 958df8b38..73848ec92 100644
--- a/src/db/db/dbNetlist.h
+++ b/src/db/db/dbNetlist.h
@@ -523,7 +523,7 @@ public:
    *  referenced by subcircuits) into pins. This method can be used before purge to
    *  avoid that purge will remove nets which are directly connecting to subcircuits.
    */
-  void make_top_level_pins ();
+  void make_top_level_pins (bool sort_by_name = true);
 
   /**
    *  @brief Purge unused nets, circuits and subcircuits
diff --git a/src/db/db/gsiDeclDbNetlist.cc b/src/db/db/gsiDeclDbNetlist.cc
index b297e004b..f5e1ee291 100644
--- a/src/db/db/gsiDeclDbNetlist.cc
+++ b/src/db/db/gsiDeclDbNetlist.cc
@@ -2240,11 +2240,14 @@ Class<db::Netlist> decl_dbNetlist ("db", "Netlist",
     "For example, serial or parallel resistors can be combined into "
     "a single resistor.\n"
   ) +
-  gsi::method ("make_top_level_pins", &db::Netlist::make_top_level_pins,
+  gsi::method ("make_top_level_pins", &db::Netlist::make_top_level_pins, gsi::arg ("sorted_by_name", true),
     "@brief Creates pins for top-level circuits.\n"
     "This method will turn all named nets of top-level circuits (such that are not "
     "referenced by subcircuits) into pins. This method can be used before purge to "
-    "avoid that purge will remove nets which are directly connecting to subcircuits."
+    "avoid that purge will remove nets which are directly connecting to subcircuits.\n"
+    "\n"
+    "Starting from version 0.30.9, the pins will be sorted by name by default. Sorting can be "
+    "disabled by setting \\sorted_by_name to false for backward compatibility."
   ) +
   gsi::method ("purge", &db::Netlist::purge,
     "@brief Purge unused nets, circuits and subcircuits.\n"
diff --git a/src/db/unit_tests/dbLayoutToNetlistWriterTests.cc b/src/db/unit_tests/dbLayoutToNetlistWriterTests.cc
index 5c9ea6012..67648a5b0 100644
--- a/src/db/unit_tests/dbLayoutToNetlistWriterTests.cc
+++ b/src/db/unit_tests/dbLayoutToNetlistWriterTests.cc
@@ -163,7 +163,7 @@ TEST(1_WriterBasic)
   rpoly_lbl.reset (0);
 
   l2n.extract_netlist ();
-  l2n.netlist ()->make_top_level_pins ();
+  l2n.netlist ()->make_top_level_pins (false);
   l2n.netlist ()->purge ();
 
   std::string path = tmp_file ("tmp_l2nwriter_1.txt");
diff --git a/testdata/lvs/bbdevices1b.lvs b/testdata/lvs/bbdevices1b.lvs
index cba829291..3c8ff0e32 100644
--- a/testdata/lvs/bbdevices1b.lvs
+++ b/testdata/lvs/bbdevices1b.lvs
@@ -70,6 +70,7 @@ connect(layer.btp, layer.bm1)
 connect(layer.bdpPad, layer.bm1)
 
 blank_circuit("*TEST")
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/bbdevices2b.lvs b/testdata/lvs/bbdevices2b.lvs
index cba829291..3c8ff0e32 100644
--- a/testdata/lvs/bbdevices2b.lvs
+++ b/testdata/lvs/bbdevices2b.lvs
@@ -70,6 +70,7 @@ connect(layer.btp, layer.bm1)
 connect(layer.bdpPad, layer.bm1)
 
 blank_circuit("*TEST")
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/bbdevices4b.lvs b/testdata/lvs/bbdevices4b.lvs
index cba829291..3c8ff0e32 100644
--- a/testdata/lvs/bbdevices4b.lvs
+++ b/testdata/lvs/bbdevices4b.lvs
@@ -70,6 +70,7 @@ connect(layer.btp, layer.bm1)
 connect(layer.bdpPad, layer.bm1)
 
 blank_circuit("*TEST")
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/bbdevices5b.lvs b/testdata/lvs/bbdevices5b.lvs
index cba829291..3c8ff0e32 100644
--- a/testdata/lvs/bbdevices5b.lvs
+++ b/testdata/lvs/bbdevices5b.lvs
@@ -70,6 +70,7 @@ connect(layer.btp, layer.bm1)
 connect(layer.bdpPad, layer.bm1)
 
 blank_circuit("*TEST")
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/bbdevices6b.lvs b/testdata/lvs/bbdevices6b.lvs
index cba829291..3c8ff0e32 100644
--- a/testdata/lvs/bbdevices6b.lvs
+++ b/testdata/lvs/bbdevices6b.lvs
@@ -70,6 +70,7 @@ connect(layer.btp, layer.bm1)
 connect(layer.bdpPad, layer.bm1)
 
 blank_circuit("*TEST")
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/custom_compare.lvs b/testdata/lvs/custom_compare.lvs
index 25e60364c..9b58b6bd0 100644
--- a/testdata/lvs/custom_compare.lvs
+++ b/testdata/lvs/custom_compare.lvs
@@ -63,6 +63,7 @@ end
 netlist.device_class_by_name("RES").equal_parameters = ResistorComparator::new()
 
 # Netlist normalization
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 # Hierarchy alignment (flatten out unmatched cells)
diff --git a/testdata/lvs/double_height.cir b/testdata/lvs/double_height.cir
index 6c6f92e17..1e727a252 100644
--- a/testdata/lvs/double_height.cir
+++ b/testdata/lvs/double_height.cir
@@ -1,6 +1,6 @@
 * Extracted by KLayout
 
-.SUBCKT INVCHAIN IN OUT VSS VDD
+.SUBCKT INVCHAIN IN OUT VDD VSS
 X$1 VDD IN \$1 \$1 OUT VSS INV2
 .ENDS INVCHAIN
 
diff --git a/testdata/lvs/double_height.lvs b/testdata/lvs/double_height.lvs
index ec154d59f..eb5e89129 100644
--- a/testdata/lvs/double_height.lvs
+++ b/testdata/lvs/double_height.lvs
@@ -123,6 +123,7 @@ connect_implicit("INV2", "VSS")
 
 # Compare section
 
+# NOTE: indirectly tests "make_top_level_pins" with name sorting (#2360)
 netlist.simplify
 align
 
diff --git a/testdata/lvs/double_height.lvsdb b/testdata/lvs/double_height.lvsdb
index f9b66a23d..849f93776 100644
--- a/testdata/lvs/double_height.lvsdb
+++ b/testdata/lvs/double_height.lvsdb
@@ -185,8 +185,8 @@ J(
   )
   P(2 I(IN))
   P(3 I(OUT))
-  P(4 I(VSS))
   P(5 I(VDD))
+  P(4 I(VSS))
   X(1 INV2 Y(0 0)
    P(0 5)
    P(1 2)
@@ -318,8 +318,8 @@ Z(
    N(4 2 1)
    P(0 () 1)
    P(1 () 1)
-   P(3 () 1)
    P(2 () 1)
+   P(3 () 1)
    X(1 1 1)
   )
  )
diff --git a/testdata/lvs/double_height2.lvs b/testdata/lvs/double_height2.lvs
index 71e32a05c..1060dec05 100644
--- a/testdata/lvs/double_height2.lvs
+++ b/testdata/lvs/double_height2.lvs
@@ -130,6 +130,7 @@ connect_implicit("DOESNOTEXIST", "DOESNOTEXIST")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 align
 
diff --git a/testdata/lvs/double_height2_texts.lvs b/testdata/lvs/double_height2_texts.lvs
index c3d169a9d..a2882395e 100644
--- a/testdata/lvs/double_height2_texts.lvs
+++ b/testdata/lvs/double_height2_texts.lvs
@@ -130,6 +130,7 @@ connect_implicit("DOESNOTEXIST", "DOESNOTEXIST")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 align
 
diff --git a/testdata/lvs/enable_wl1.lvs b/testdata/lvs/enable_wl1.lvs
index a58903723..c97bbda95 100644
--- a/testdata/lvs/enable_wl1.lvs
+++ b/testdata/lvs/enable_wl1.lvs
@@ -47,6 +47,7 @@ connect(contact, metal1_not_res)
 connect(metal1_not_res, metal1_lbl)
 
 align
+netlist.make_top_level_pins(false)
 netlist.simplify
 compare
 
diff --git a/testdata/lvs/enable_wl2.lvs b/testdata/lvs/enable_wl2.lvs
index 945a89294..7ca716ee3 100644
--- a/testdata/lvs/enable_wl2.lvs
+++ b/testdata/lvs/enable_wl2.lvs
@@ -28,6 +28,7 @@ connect(contact, metal1_not_res)
 connect(metal1_not_res, metal1_lbl)
 
 align
+netlist.make_top_level_pins(false)
 netlist.simplify
 compare
 
diff --git a/testdata/lvs/enable_wl3.lvs b/testdata/lvs/enable_wl3.lvs
index 8f5405307..552524f62 100644
--- a/testdata/lvs/enable_wl3.lvs
+++ b/testdata/lvs/enable_wl3.lvs
@@ -28,6 +28,7 @@ connect(contact, metal1_not_res)
 connect(metal1_not_res, metal1_lbl)
 
 align
+netlist.make_top_level_pins(false)
 netlist.simplify
 compare
 
diff --git a/testdata/lvs/flag_missing_ports.lvs b/testdata/lvs/flag_missing_ports.lvs
index 4c35142a3..cf98f6dd7 100644
--- a/testdata/lvs/flag_missing_ports.lvs
+++ b/testdata/lvs/flag_missing_ports.lvs
@@ -68,6 +68,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/floating.lvs b/testdata/lvs/floating.lvs
index 8a3c6417e..d0e6c1e09 100644
--- a/testdata/lvs/floating.lvs
+++ b/testdata/lvs/floating.lvs
@@ -68,6 +68,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 align
 
diff --git a/testdata/lvs/invchain_cheat.lvs b/testdata/lvs/invchain_cheat.lvs
index 93c6206e7..379a0c601 100644
--- a/testdata/lvs/invchain_cheat.lvs
+++ b/testdata/lvs/invchain_cheat.lvs
@@ -123,6 +123,7 @@ connect_global(bulk, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 align
 
diff --git a/testdata/lvs/layer_names.lvs b/testdata/lvs/layer_names.lvs
index 9ea2cf9ca..071e511fd 100644
--- a/testdata/lvs/layer_names.lvs
+++ b/testdata/lvs/layer_names.lvs
@@ -96,6 +96,7 @@ ok || raise("ptie layer already used - this is an error")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 align
 
diff --git a/testdata/lvs/must_connect1.lvs b/testdata/lvs/must_connect1.lvs
index 799fa0364..0981cde4c 100644
--- a/testdata/lvs/must_connect1.lvs
+++ b/testdata/lvs/must_connect1.lvs
@@ -132,6 +132,7 @@ connect_implicit("INVCHAIN", "VDD")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 align
 
diff --git a/testdata/lvs/must_connect1_tl.lvs b/testdata/lvs/must_connect1_tl.lvs
index 4e9cc35ed..60379dc81 100644
--- a/testdata/lvs/must_connect1_tl.lvs
+++ b/testdata/lvs/must_connect1_tl.lvs
@@ -136,6 +136,7 @@ connect_implicit("INVCHAIN", "VDD")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 align
 
diff --git a/testdata/lvs/must_connect2.lvs b/testdata/lvs/must_connect2.lvs
index ac34742e7..22ead7473 100644
--- a/testdata/lvs/must_connect2.lvs
+++ b/testdata/lvs/must_connect2.lvs
@@ -134,6 +134,7 @@ connect_global(bulk, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 align
 
diff --git a/testdata/lvs/must_connect3.lvs b/testdata/lvs/must_connect3.lvs
index ac34742e7..22ead7473 100644
--- a/testdata/lvs/must_connect3.lvs
+++ b/testdata/lvs/must_connect3.lvs
@@ -134,6 +134,7 @@ connect_global(bulk, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 align
 
diff --git a/testdata/lvs/nand2_split_gate.lvs b/testdata/lvs/nand2_split_gate.lvs
index 1c4a795bf..ca4ce42f6 100644
--- a/testdata/lvs/nand2_split_gate.lvs
+++ b/testdata/lvs/nand2_split_gate.lvs
@@ -76,6 +76,7 @@ connect_global(ptie, "SUBSTRATE")
 
 netlist
 join_symmetric_nets("*")
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 # Compare section
diff --git a/testdata/lvs/nand2_split_gate_early.lvs b/testdata/lvs/nand2_split_gate_early.lvs
index bf48ae960..e128d1693 100644
--- a/testdata/lvs/nand2_split_gate_early.lvs
+++ b/testdata/lvs/nand2_split_gate_early.lvs
@@ -77,6 +77,7 @@ connect_global(ptie, "SUBSTRATE")
 # Extract, simplify
 
 netlist
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 # Compare section
diff --git a/testdata/lvs/res_combine1.lvs b/testdata/lvs/res_combine1.lvs
index 3dba3b639..db30261d1 100644
--- a/testdata/lvs/res_combine1.lvs
+++ b/testdata/lvs/res_combine1.lvs
@@ -93,6 +93,7 @@ schematic.simplify
 
 # Netlist vs. netlist
 align
+netlist.make_top_level_pins(false)
 netlist.simplify
 no_lvs_hints
 compare
diff --git a/testdata/lvs/res_combine2.lvs b/testdata/lvs/res_combine2.lvs
index 395f84765..012d2b4cf 100644
--- a/testdata/lvs/res_combine2.lvs
+++ b/testdata/lvs/res_combine2.lvs
@@ -92,6 +92,7 @@ schematic.simplify
 
 # Netlist vs. netlist
 align
+netlist.make_top_level_pins(false)
 netlist.simplify
 no_lvs_hints
 compare
diff --git a/testdata/lvs/res_combine3.lvs b/testdata/lvs/res_combine3.lvs
index c609c0824..0aabff3ab 100644
--- a/testdata/lvs/res_combine3.lvs
+++ b/testdata/lvs/res_combine3.lvs
@@ -87,6 +87,7 @@ schematic.simplify
 
 # Netlist vs. netlist
 align
+netlist.make_top_level_pins(false)
 netlist.simplify
 no_lvs_hints
 compare
diff --git a/testdata/lvs/ringo_device_subcircuits.lvs b/testdata/lvs/ringo_device_subcircuits.lvs
index f12f62d8d..8a9f32ecb 100644
--- a/testdata/lvs/ringo_device_subcircuits.lvs
+++ b/testdata/lvs/ringo_device_subcircuits.lvs
@@ -120,6 +120,7 @@ same_device_classes("PMOS", $change_case ? "xpMos" : "XPMOS")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_layout_var.lvs b/testdata/lvs/ringo_layout_var.lvs
index afe79c3e2..ca04cf5fd 100644
--- a/testdata/lvs/ringo_layout_var.lvs
+++ b/testdata/lvs/ringo_layout_var.lvs
@@ -72,6 +72,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_mixed_hierarchy.lvs b/testdata/lvs/ringo_mixed_hierarchy.lvs
index cba9caa86..c1149c265 100644
--- a/testdata/lvs/ringo_mixed_hierarchy.lvs
+++ b/testdata/lvs/ringo_mixed_hierarchy.lvs
@@ -68,6 +68,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 align
diff --git a/testdata/lvs/ringo_simple.lvs b/testdata/lvs/ringo_simple.lvs
index 057f39c25..44b535f51 100644
--- a/testdata/lvs/ringo_simple.lvs
+++ b/testdata/lvs/ringo_simple.lvs
@@ -68,6 +68,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_simple_blackboxing.lvs b/testdata/lvs/ringo_simple_blackboxing.lvs
index 2fe02fd83..e464f5c00 100644
--- a/testdata/lvs/ringo_simple_blackboxing.lvs
+++ b/testdata/lvs/ringo_simple_blackboxing.lvs
@@ -78,7 +78,7 @@ schematic.blank_circuit("INVX1")
 schematic.blank_circuit("INVX2")
 schematic.blank_circuit("ND2X1")
 
-netlist.make_top_level_pins
+netlist.make_top_level_pins(false)
 netlist.purge
 netlist.combine_devices
 netlist.purge_nets
diff --git a/testdata/lvs/ringo_simple_blackboxing_netter.lvs b/testdata/lvs/ringo_simple_blackboxing_netter.lvs
index 4cbbc0591..55f4d4fd5 100644
--- a/testdata/lvs/ringo_simple_blackboxing_netter.lvs
+++ b/testdata/lvs/ringo_simple_blackboxing_netter.lvs
@@ -76,7 +76,7 @@ connect_global(ptie, "SUBSTRATE")
 
 netlist.flatten_circuit("INVCHAIN")
 
-netlist.make_top_level_pins
+netlist.make_top_level_pins(false)
 netlist.purge
 netlist.combine_devices
 netlist.purge_nets
diff --git a/testdata/lvs/ringo_simple_compare2.lvs b/testdata/lvs/ringo_simple_compare2.lvs
index abaeaff92..1b56db53f 100644
--- a/testdata/lvs/ringo_simple_compare2.lvs
+++ b/testdata/lvs/ringo_simple_compare2.lvs
@@ -68,6 +68,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_simple_device_scaling.lvs b/testdata/lvs/ringo_simple_device_scaling.lvs
index afb3caebb..e248bcd12 100644
--- a/testdata/lvs/ringo_simple_device_scaling.lvs
+++ b/testdata/lvs/ringo_simple_device_scaling.lvs
@@ -70,6 +70,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_simple_dmos.lvs b/testdata/lvs/ringo_simple_dmos.lvs
index 0879f5e1b..1af75b266 100644
--- a/testdata/lvs/ringo_simple_dmos.lvs
+++ b/testdata/lvs/ringo_simple_dmos.lvs
@@ -75,6 +75,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_simple_dmos_fixed.lvs b/testdata/lvs/ringo_simple_dmos_fixed.lvs
index 5f375e95f..279ee200e 100644
--- a/testdata/lvs/ringo_simple_dmos_fixed.lvs
+++ b/testdata/lvs/ringo_simple_dmos_fixed.lvs
@@ -77,6 +77,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_simple_dummy_device.lvs b/testdata/lvs/ringo_simple_dummy_device.lvs
index a33340a2d..9c1219cd4 100644
--- a/testdata/lvs/ringo_simple_dummy_device.lvs
+++ b/testdata/lvs/ringo_simple_dummy_device.lvs
@@ -68,6 +68,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_simple_implicit_connections.lvs b/testdata/lvs/ringo_simple_implicit_connections.lvs
index 056cf97d8..4e583d46c 100644
--- a/testdata/lvs/ringo_simple_implicit_connections.lvs
+++ b/testdata/lvs/ringo_simple_implicit_connections.lvs
@@ -72,6 +72,7 @@ connect_implicit("VDD")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_simple_io.lvs b/testdata/lvs/ringo_simple_io.lvs
index 215b556ce..92a30d54b 100644
--- a/testdata/lvs/ringo_simple_io.lvs
+++ b/testdata/lvs/ringo_simple_io.lvs
@@ -69,6 +69,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_simple_io2.lvs b/testdata/lvs/ringo_simple_io2.lvs
index bea93496f..8042382aa 100644
--- a/testdata/lvs/ringo_simple_io2.lvs
+++ b/testdata/lvs/ringo_simple_io2.lvs
@@ -102,6 +102,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvs b/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvs
index 02724522a..0e8e2d201 100644
--- a/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvs
+++ b/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvs
@@ -76,6 +76,7 @@ same_circuits("INV", $change_case ? "invX1" : "INVX1")
 same_circuits("DOESNOTEXIST", "DOESNOTEXIST2")
 same_nets("DOESNOTEXIST", "ENABLE", "DOESNOTEXIST2", "ENABLE")
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_simple_pin_swapping.lvs b/testdata/lvs/ringo_simple_pin_swapping.lvs
index 166fa320f..4b9fd5a04 100644
--- a/testdata/lvs/ringo_simple_pin_swapping.lvs
+++ b/testdata/lvs/ringo_simple_pin_swapping.lvs
@@ -73,6 +73,7 @@ connect_global(ptie, "SUBSTRATE")
 
 equivalent_pins("DOESNOTEXIST", 4, 5)
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_simple_same_device_classes.lvs b/testdata/lvs/ringo_simple_same_device_classes.lvs
index 8005d70cc..b2d0c4053 100644
--- a/testdata/lvs/ringo_simple_same_device_classes.lvs
+++ b/testdata/lvs/ringo_simple_same_device_classes.lvs
@@ -91,6 +91,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 same_device_classes("NM", "NMOS")
diff --git a/testdata/lvs/ringo_simple_simplification.lvs b/testdata/lvs/ringo_simple_simplification.lvs
index 9579e11cd..1833b7a87 100644
--- a/testdata/lvs/ringo_simple_simplification.lvs
+++ b/testdata/lvs/ringo_simple_simplification.lvs
@@ -70,7 +70,7 @@ connect_global(ptie, "SUBSTRATE")
 
 netlist.flatten_circuit("INVCHAIN")
 
-netlist.make_top_level_pins
+netlist.make_top_level_pins(false)
 netlist.purge
 netlist.combine_devices
 netlist.purge_nets
diff --git a/testdata/lvs/ringo_simple_simplification_with_align.lvs b/testdata/lvs/ringo_simple_simplification_with_align.lvs
index 4591cf3e6..73ae01353 100644
--- a/testdata/lvs/ringo_simple_simplification_with_align.lvs
+++ b/testdata/lvs/ringo_simple_simplification_with_align.lvs
@@ -70,6 +70,7 @@ connect_global(ptie, "SUBSTRATE")
 
 align
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_simple_with_tol.lvs b/testdata/lvs/ringo_simple_with_tol.lvs
index 5b2f6dcbd..0d234e6b9 100644
--- a/testdata/lvs/ringo_simple_with_tol.lvs
+++ b/testdata/lvs/ringo_simple_with_tol.lvs
@@ -73,6 +73,7 @@ tolerance("PMOS", "W", 0.01, 0.1) # relative + absolute
 tolerance("NMOS", "L", :absolute => 0.01)
 tolerance("NMOS", "W", :relative => 0.07)
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/ringo_simple_with_tol_early.lvs b/testdata/lvs/ringo_simple_with_tol_early.lvs
index 7f8fcef72..25b79e53a 100644
--- a/testdata/lvs/ringo_simple_with_tol_early.lvs
+++ b/testdata/lvs/ringo_simple_with_tol_early.lvs
@@ -73,6 +73,7 @@ connect_global(ptie, "SUBSTRATE")
 
 # Compare section
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 compare
diff --git a/testdata/lvs/soft_connect1.lvs b/testdata/lvs/soft_connect1.lvs
index a4ed6551d..b41b177b8 100644
--- a/testdata/lvs/soft_connect1.lvs
+++ b/testdata/lvs/soft_connect1.lvs
@@ -87,6 +87,7 @@ soft_connect_global(ptie, "SUBSTRATE")
 # Netlist section (NOTE: we only check log here)
 netlist
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 
diff --git a/testdata/lvs/soft_connect1a.lvs b/testdata/lvs/soft_connect1a.lvs
index 4063000dc..9b490f4fe 100644
--- a/testdata/lvs/soft_connect1a.lvs
+++ b/testdata/lvs/soft_connect1a.lvs
@@ -87,6 +87,7 @@ soft_connect_global(ptie, "SUBSTRATE")
 # Netlist section (NOTE: we only check log here)
 netlist
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 
diff --git a/testdata/lvs/soft_connect2.lvs b/testdata/lvs/soft_connect2.lvs
index a4ed6551d..b41b177b8 100644
--- a/testdata/lvs/soft_connect2.lvs
+++ b/testdata/lvs/soft_connect2.lvs
@@ -87,6 +87,7 @@ soft_connect_global(ptie, "SUBSTRATE")
 # Netlist section (NOTE: we only check log here)
 netlist
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 
diff --git a/testdata/lvs/soft_connect3.lvs b/testdata/lvs/soft_connect3.lvs
index a4ed6551d..b41b177b8 100644
--- a/testdata/lvs/soft_connect3.lvs
+++ b/testdata/lvs/soft_connect3.lvs
@@ -87,6 +87,7 @@ soft_connect_global(ptie, "SUBSTRATE")
 # Netlist section (NOTE: we only check log here)
 netlist
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 
diff --git a/testdata/lvs/soft_connect4.lvs b/testdata/lvs/soft_connect4.lvs
index fcf0d3d22..ca1a4fa64 100644
--- a/testdata/lvs/soft_connect4.lvs
+++ b/testdata/lvs/soft_connect4.lvs
@@ -88,6 +88,7 @@ soft_connect_global(ptie, "SUBSTRATE")
 # for debugging: _make_soft_connection_diodes(true)
 netlist
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 
diff --git a/testdata/lvs/soft_connect5.lvs b/testdata/lvs/soft_connect5.lvs
index fcf0d3d22..ca1a4fa64 100644
--- a/testdata/lvs/soft_connect5.lvs
+++ b/testdata/lvs/soft_connect5.lvs
@@ -88,6 +88,7 @@ soft_connect_global(ptie, "SUBSTRATE")
 # for debugging: _make_soft_connection_diodes(true)
 netlist
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 
diff --git a/testdata/lvs/soft_connect6.lvs b/testdata/lvs/soft_connect6.lvs
index fcf0d3d22..ca1a4fa64 100644
--- a/testdata/lvs/soft_connect6.lvs
+++ b/testdata/lvs/soft_connect6.lvs
@@ -88,6 +88,7 @@ soft_connect_global(ptie, "SUBSTRATE")
 # for debugging: _make_soft_connection_diodes(true)
 netlist
 
+netlist.make_top_level_pins(false)
 netlist.simplify
 
 
diff --git a/testdata/lvs/split_substrate.lvs b/testdata/lvs/split_substrate.lvs
index 43204067d..2bf709152 100644
--- a/testdata/lvs/split_substrate.lvs
+++ b/testdata/lvs/split_substrate.lvs
@@ -102,6 +102,7 @@ connect_global(iosub, "IOSUB")
 # for debugging: _make_soft_connection_diodes(true)
 netlist
 
+netlist.make_top_level_pins(false)
 netlist.simplify