From 7910ddc6a339f0846074429440c2c0bf7cce96e7 Mon Sep 17 00:00:00 2001
From: Matthias Koefferlein <matthias@koefferlein.de>
Date: Sat, 2 Nov 2019 20:39:59 +0100
Subject: [PATCH] Fixed a compiler warning, testcase update (part 1)

---
 src/db/db/dbLibrary.cc                        |   2 +-
 ...act_au10.gds => device_extract_au10.gds.1} | Bin
 testdata/algo/device_extract_au10.gds.2       | Bin 0 -> 8894 bytes
 testdata/lvs/invchain_cheat.cir.1             |  30 +++++++++++++
 testdata/lvs/invchain_cheat.cir.2             |  30 +++++++++++++
 .../lvs/ringo_simple_dummy_device.lvsdb.2     |  12 ++---
 .../lvs/ringo_simple_simplification.lvsdb.2   |  22 ++++-----
 ...o_simple_simplification_with_align.lvsdb.2 |  42 +++++++++---------
 8 files changed, 99 insertions(+), 39 deletions(-)
 rename testdata/algo/{device_extract_au10.gds => device_extract_au10.gds.1} (100%)
 create mode 100644 testdata/algo/device_extract_au10.gds.2
 create mode 100644 testdata/lvs/invchain_cheat.cir.1
 create mode 100644 testdata/lvs/invchain_cheat.cir.2

diff --git a/src/db/db/dbLibrary.cc b/src/db/db/dbLibrary.cc
index 71989274e..008af5085 100644
--- a/src/db/db/dbLibrary.cc
+++ b/src/db/db/dbLibrary.cc
@@ -36,7 +36,7 @@ Library::Library()
 }
 
 Library::Library(const Library &d)
-  : gsi::ObjectBase (), m_name (d.m_name), m_description (d.m_description), m_id (0), m_layout (d.m_layout)
+  : gsi::ObjectBase (), tl::Object (), m_name (d.m_name), m_description (d.m_description), m_id (0), m_layout (d.m_layout)
 {
   // .. nothing yet ..
 }
diff --git a/testdata/algo/device_extract_au10.gds b/testdata/algo/device_extract_au10.gds.1
similarity index 100%
rename from testdata/algo/device_extract_au10.gds
rename to testdata/algo/device_extract_au10.gds.1
diff --git a/testdata/algo/device_extract_au10.gds.2 b/testdata/algo/device_extract_au10.gds.2
new file mode 100644
index 0000000000000000000000000000000000000000..6b279ff1937d3fc78bccf465b7163456ca82f615
GIT binary patch
literal 8894
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z?M}WTJ30Ki?4%%gM$TB++dlU~6pED%oL9aV1R*nW#=_d%t&rGBUY&Q0k#{ioz@f@h
zvHjW4gvti+KS8bmn;(L|-l58Y{;kl(U-yjgTf2m>sB)ms|HbK#qT4uC!`lQ~pAyw^
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literal 0
HcmV?d00001

diff --git a/testdata/lvs/invchain_cheat.cir.1 b/testdata/lvs/invchain_cheat.cir.1
new file mode 100644
index 000000000..ebb1e0e31
--- /dev/null
+++ b/testdata/lvs/invchain_cheat.cir.1
@@ -0,0 +1,30 @@
+* Extracted by KLayout
+
+.SUBCKT INVCHAIN
+X$1 \$7 \$1 \$9 \$8 \$6 \$9 \$5 \$5 \$3 \$2 \$I2 \$I1 INV3
+X$2 \$8 \$11 \$9 \$10 \$8 \$11 \$2 \$I3 \$2 \$I3 \$5 \$4 \$I2 \$I1 INV2
+X$3 \$I1 \$I2 \$11 \$I3 \$4 \$4 \$10 \$10 INV
+.ENDS INVCHAIN
+
+.SUBCKT INV3 \$I18 \$I17 \$I15 \$I14 \$I13 \$I11 \$I10 \$I8 \$I7 \$I5 \$I4 \$I2
+X$1 \$I2 \$I4 \$I13 \$I17 \$I7 \$I7 \$I18 \$I18 INV
+X$2 \$I2 \$I4 \$I18 \$I7 \$I17 \$I17 \$I13 \$I13 INV
+X$3 \$I2 \$I4 \$I14 \$I5 \$I8 \$I10 \$I15 \$I11 INV
+.ENDS INV3
+
+.SUBCKT INV2 \$I16 \$I15 \$I14 \$I13 \$I12 \$I11 \$I10 \$I9 \$I8 \$I7 \$I6 \$I5
++ \$I4 \$I2
+X$1 \$I2 \$I4 \$I14 \$I6 \$I8 \$I10 \$I16 \$I12 INV
+X$2 \$I2 \$I4 \$I13 \$I5 \$I7 \$I9 \$I15 \$I11 INV
+.ENDS INV2
+
+.SUBCKT INV \$1 \$2 \$3 \$4 \$5 \$9 \$I8 \$I7
+M$1 \$4 \$3 \$2 \$4 PMOS L=0.25U W=0.95U AS=0.79325P AD=0.26125P PS=3.57U
++ PD=1.5U
+M$2 \$2 \$I8 \$5 \$2 PMOS L=0.25U W=0.95U AS=0.26125P AD=0.03325P PS=1.5U
++ PD=1.97U
+M$3 \$4 \$3 \$1 \$4 NMOS L=0.25U W=0.95U AS=0.79325P AD=0.26125P PS=3.57U
++ PD=1.5U
+M$4 \$1 \$I7 \$9 \$1 NMOS L=0.25U W=0.95U AS=0.26125P AD=0.03325P PS=1.5U
++ PD=1.97U
+.ENDS INV
diff --git a/testdata/lvs/invchain_cheat.cir.2 b/testdata/lvs/invchain_cheat.cir.2
new file mode 100644
index 000000000..559a90f2a
--- /dev/null
+++ b/testdata/lvs/invchain_cheat.cir.2
@@ -0,0 +1,30 @@
+* Extracted by KLayout
+
+.SUBCKT INVCHAIN
+X$1 \$7 \$1 \$9 \$8 \$6 \$9 \$5 \$5 \$3 \$2 \$I2 \$I1 INV3
+X$2 \$8 \$11 \$9 \$10 \$8 \$11 \$2 \$I3 \$2 \$I3 \$5 \$4 \$I2 \$I1 INV2
+X$3 \$I1 \$I2 \$11 \$I3 \$4 \$4 \$10 \$10 INV
+.ENDS INVCHAIN
+
+.SUBCKT INV3 \$I18 \$I17 \$I15 \$I14 \$I13 \$I11 \$I10 \$I8 \$I7 \$I5 \$I4 \$I2
+X$1 \$I2 \$I4 \$I13 \$I17 \$I7 \$I7 \$I18 \$I18 INV
+X$2 \$I2 \$I4 \$I18 \$I7 \$I17 \$I17 \$I13 \$I13 INV
+X$3 \$I2 \$I4 \$I14 \$I5 \$I8 \$I10 \$I15 \$I11 INV
+.ENDS INV3
+
+.SUBCKT INV2 \$I16 \$I15 \$I14 \$I13 \$I12 \$I11 \$I10 \$I9 \$I8 \$I7 \$I6 \$I5
++ \$I4 \$I2
+X$1 \$I2 \$I4 \$I14 \$I6 \$I8 \$I10 \$I16 \$I12 INV
+X$2 \$I2 \$I4 \$I13 \$I5 \$I7 \$I9 \$I15 \$I11 INV
+.ENDS INV2
+
+.SUBCKT INV \$1 \$2 \$3 \$4 \$5 \$8 \$I8 \$I7
+M$1 \$4 \$3 \$2 \$4 PMOS L=0.25U W=0.95U AS=0.79325P AD=0.26125P PS=3.57U
++ PD=1.5U
+M$2 \$2 \$I8 \$5 \$2 PMOS L=0.25U W=0.95U AS=0.26125P AD=0.03325P PS=1.5U
++ PD=1.97U
+M$3 \$4 \$3 \$1 \$4 NMOS L=0.25U W=0.95U AS=0.79325P AD=0.26125P PS=3.57U
++ PD=1.5U
+M$4 \$1 \$I7 \$8 \$1 NMOS L=0.25U W=0.95U AS=0.26125P AD=0.03325P PS=1.5U
++ PD=1.97U
+.ENDS INV
diff --git a/testdata/lvs/ringo_simple_dummy_device.lvsdb.2 b/testdata/lvs/ringo_simple_dummy_device.lvsdb.2
index f4780ff2d..3c0b06564 100644
--- a/testdata/lvs/ringo_simple_dummy_device.lvsdb.2
+++ b/testdata/lvs/ringo_simple_dummy_device.lvsdb.2
@@ -163,9 +163,9 @@ layout(
    rect(l11 (-1751 1099) (300 1400))
    rect(l11 (1100 -1700) (300 300))
    rect(l11 (-300 0) (300 1400))
-   rect(l2 (-375 -1450) (425 1500))
-   rect(l2 (-1800 -1500) (425 1500))
-   rect(l6 (950 -4890) (425 950))
+   rect(l2 (-1750 -1450) (425 1500))
+   rect(l2 (950 -1500) (425 1500))
+   rect(l6 (-425 -4890) (425 950))
   )
   net(3 name(VSS)
    rect(l8 (410 1770) (180 180))
@@ -371,9 +371,9 @@ layout(
   net(2
    rect(l8 (4710 3010) (180 180))
    rect(l11 (-850 -240) (610 300))
-   rect(l2 (-1175 1800) (425 1500))
-   rect(l2 (-1800 -1500) (425 1500))
-   rect(l6 (950 -4890) (425 950))
+   rect(l2 (-2550 1800) (425 1500))
+   rect(l2 (950 -1500) (425 1500))
+   rect(l6 (-425 -4890) (425 950))
   )
   net(3
    rect(l8 (6510 3010) (180 180))
diff --git a/testdata/lvs/ringo_simple_simplification.lvsdb.2 b/testdata/lvs/ringo_simple_simplification.lvsdb.2
index 2492067a3..77e688c6e 100644
--- a/testdata/lvs/ringo_simple_simplification.lvsdb.2
+++ b/testdata/lvs/ringo_simple_simplification.lvsdb.2
@@ -163,9 +163,9 @@ layout(
    rect(l11 (-1751 1099) (300 1400))
    rect(l11 (1100 -1700) (300 300))
    rect(l11 (-300 0) (300 1400))
-   rect(l2 (-375 -1450) (425 1500))
-   rect(l2 (-1800 -1500) (425 1500))
-   rect(l6 (950 -4890) (425 950))
+   rect(l2 (-1750 -1450) (425 1500))
+   rect(l2 (950 -1500) (425 1500))
+   rect(l6 (-425 -4890) (425 950))
   )
   net(3 name(VSS)
    rect(l8 (410 1770) (180 180))
@@ -389,8 +389,8 @@ layout(
    rect(l11 (1100 -300) (300 300))
    rect(l11 (-1101 399) (2 2))
    rect(l11 (799 -2101) (300 1400))
-   rect(l2 (-375 -1450) (425 1500))
-   rect(l2 (-1800 -1500) (425 1500))
+   rect(l2 (-1750 -1450) (425 1500))
+   rect(l2 (950 -1500) (425 1500))
   )
   net(3 name(OUT)
    rect(l8 (1110 5160) (180 180))
@@ -486,9 +486,9 @@ layout(
   net(1
    rect(l8 (4710 3010) (180 180))
    rect(l11 (-850 -240) (610 300))
-   rect(l2 (-1175 1800) (425 1500))
-   rect(l2 (-1800 -1500) (425 1500))
-   rect(l6 (950 -4890) (425 950))
+   rect(l2 (-2550 1800) (425 1500))
+   rect(l2 (950 -1500) (425 1500))
+   rect(l6 (-425 -4890) (425 950))
   )
   net(2
    rect(l8 (6510 3010) (180 180))
@@ -554,9 +554,9 @@ layout(
    rect(l2 (1375 -1500) (425 1500))
    rect(l2 (1375 -1500) (425 1500))
    rect(l2 (1375 -1500) (425 1500))
-   rect(l2 (4550 -1500) (425 1500))
-   rect(l2 (-1800 -1500) (425 1500))
-   rect(l2 (-2225 -1500) (425 1500))
+   rect(l2 (3175 -1500) (425 1500))
+   rect(l2 (950 -1500) (425 1500))
+   rect(l2 (-3600 -1500) (425 1500))
    rect(l9 (-19575 -450) (500 1500))
    rect(l9 (22900 -1500) (500 1500))
   )
diff --git a/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.2 b/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.2
index 2492067a3..909c14e3d 100644
--- a/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.2
+++ b/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.2
@@ -163,9 +163,9 @@ layout(
    rect(l11 (-1751 1099) (300 1400))
    rect(l11 (1100 -1700) (300 300))
    rect(l11 (-300 0) (300 1400))
-   rect(l2 (-375 -1450) (425 1500))
-   rect(l2 (-1800 -1500) (425 1500))
-   rect(l6 (950 -4890) (425 950))
+   rect(l2 (-1750 -1450) (425 1500))
+   rect(l2 (950 -1500) (425 1500))
+   rect(l6 (-425 -4890) (425 950))
   )
   net(3 name(VSS)
    rect(l8 (410 1770) (180 180))
@@ -389,8 +389,8 @@ layout(
    rect(l11 (1100 -300) (300 300))
    rect(l11 (-1101 399) (2 2))
    rect(l11 (799 -2101) (300 1400))
-   rect(l2 (-375 -1450) (425 1500))
-   rect(l2 (-1800 -1500) (425 1500))
+   rect(l2 (-1750 -1450) (425 1500))
+   rect(l2 (950 -1500) (425 1500))
   )
   net(3 name(OUT)
    rect(l8 (1110 5160) (180 180))
@@ -486,9 +486,9 @@ layout(
   net(1
    rect(l8 (4710 3010) (180 180))
    rect(l11 (-850 -240) (610 300))
-   rect(l2 (-1175 1800) (425 1500))
-   rect(l2 (-1800 -1500) (425 1500))
-   rect(l6 (950 -4890) (425 950))
+   rect(l2 (-2550 1800) (425 1500))
+   rect(l2 (950 -1500) (425 1500))
+   rect(l6 (-425 -4890) (425 950))
   )
   net(2
    rect(l8 (6510 3010) (180 180))
@@ -554,9 +554,9 @@ layout(
    rect(l2 (1375 -1500) (425 1500))
    rect(l2 (1375 -1500) (425 1500))
    rect(l2 (1375 -1500) (425 1500))
-   rect(l2 (4550 -1500) (425 1500))
-   rect(l2 (-1800 -1500) (425 1500))
-   rect(l2 (-2225 -1500) (425 1500))
+   rect(l2 (3175 -1500) (425 1500))
+   rect(l2 (950 -1500) (425 1500))
+   rect(l2 (-3600 -1500) (425 1500))
    rect(l9 (-19575 -450) (500 1500))
    rect(l9 (22900 -1500) (500 1500))
   )
@@ -711,7 +711,7 @@ layout(
    pin(4 6)
    pin(5 9)
   )
-  circuit(17 INVX1 location(7800 0)
+  circuit(13 INVX1 location(7800 0)
    pin(0 6)
    pin(1 12)
    pin(2 9)
@@ -719,7 +719,7 @@ layout(
    pin(4 10)
    pin(5 9)
   )
-  circuit(18 INVX1 location(9600 0)
+  circuit(14 INVX1 location(9600 0)
    pin(0 6)
    pin(1 13)
    pin(2 9)
@@ -727,7 +727,7 @@ layout(
    pin(4 12)
    pin(5 9)
   )
-  circuit(19 INVX1 location(11400 0)
+  circuit(15 INVX1 location(11400 0)
    pin(0 6)
    pin(1 14)
    pin(2 9)
@@ -735,7 +735,7 @@ layout(
    pin(4 13)
    pin(5 9)
   )
-  circuit(20 INVX1 location(13200 0)
+  circuit(16 INVX1 location(13200 0)
    pin(0 6)
    pin(1 15)
    pin(2 9)
@@ -743,7 +743,7 @@ layout(
    pin(4 14)
    pin(5 9)
   )
-  circuit(21 INVX1 location(15000 0)
+  circuit(17 INVX1 location(15000 0)
    pin(0 6)
    pin(1 11)
    pin(2 9)
@@ -1147,11 +1147,11 @@ xref(
    pin(4 0 match)
    circuit(2 2 match)
    circuit(3 3 match)
-   circuit(17 4 match)
-   circuit(18 5 match)
-   circuit(19 6 match)
-   circuit(20 7 match)
-   circuit(21 8 match)
+   circuit(13 4 match)
+   circuit(14 5 match)
+   circuit(15 6 match)
+   circuit(16 7 match)
+   circuit(17 8 match)
    circuit(4 9 match)
    circuit(5 10 match)
    circuit(6 11 match)