diff --git a/src/drc/drc/built-in-macros/_drc_engine.rb b/src/drc/drc/built-in-macros/_drc_engine.rb index 617f5aa76..099062b27 100644 --- a/src/drc/drc/built-in-macros/_drc_engine.rb +++ b/src/drc/drc/built-in-macros/_drc_engine.rb @@ -141,7 +141,7 @@ module DRC # @brief Supplies the MOS3 transistor extractor class # @name mos3 # @synopsis mos3(name) - # Use this class with \device_extract to specify extraction of a + # Use this class with \extract_devices to specify extraction of a # three-terminal MOS transistor def mos3(name) @@ -152,7 +152,7 @@ module DRC # @brief Supplies the MOS4 transistor extractor class # @name mos4 # @synopsis mos4(name) - # Use this class with \device_extract to specify extraction of a + # Use this class with \extract_devices to specify extraction of a # four-terminal MOS transistor def mos4(name) @@ -163,7 +163,7 @@ module DRC # @brief Supplies the BJT3 transistor extractor class # @name bjt3 # @synopsis bjt3(name) - # Use this class with \device_extract to specify extraction of a + # Use this class with \extract_devices to specify extraction of a # bipolar junction transistor def bjt3(name) @@ -174,7 +174,7 @@ module DRC # @brief Supplies the BJT4 transistor extractor class # @name bjt4 # @synopsis bjt4(name) - # Use this class with \device_extract to specify extraction of a + # Use this class with \extract_devices to specify extraction of a # bipolar junction transistor with a substrate terminal def bjt4(name) @@ -185,7 +185,7 @@ module DRC # @brief Supplies the diode extractor class # @name diode # @synopsis diode(name) - # Use this class with \device_extract to specify extraction of a + # Use this class with \extract_devices to specify extraction of a # planar diode def diode(name) @@ -196,7 +196,7 @@ module DRC # @brief Supplies the resistor extractor class # @name resistor # @synopsis resistor(name, sheet_rho) - # Use this class with \device_extract to specify extraction of a resistor. + # Use this class with \extract_devices to specify extraction of a resistor. # The sheet_rho value is the sheet resistance in ohms/square. def resistor(name, sheet_rho) @@ -207,7 +207,7 @@ module DRC # @brief Supplies the resistor extractor class that includes a bulk terminal # @name resistor_with_bulk # @synopsis resistor_with_bulk(name, sheet_rho) - # Use this class with \device_extract to specify extraction of a resistor + # Use this class with \extract_devices to specify extraction of a resistor # with a bulk terminal. # The sheet_rho value is the sheet resistance in ohms/square. @@ -219,7 +219,7 @@ module DRC # @brief Supplies the capacitor extractor class # @name capacitor # @synopsis capacitor(name, area_cap) - # Use this class with \device_extract to specify extraction of a capacitor. + # Use this class with \extract_devices to specify extraction of a capacitor. # The area_cap argument is the capacitance in Farad per square micrometer. def capacitor(name, area_cap) @@ -230,7 +230,7 @@ module DRC # @brief Supplies the capacitor extractor class that includes a bulk terminal # @name capacitor_with_bulk # @synopsis capacitor_with_bulk(name, area_cap) - # Use this class with \device_extract to specify extraction of a capacitor + # Use this class with \extract_devices to specify extraction of a capacitor # with a bulk terminal. # The area_cap argument is the capacitance in Farad per square micrometer. diff --git a/src/drc/drc/built-in-macros/_drc_netter.rb b/src/drc/drc/built-in-macros/_drc_netter.rb index 8f333b0c9..aa86fe84e 100644 --- a/src/drc/drc/built-in-macros/_drc_netter.rb +++ b/src/drc/drc/built-in-macros/_drc_netter.rb @@ -65,7 +65,7 @@ module DRC def initialize(engine) @engine = engine @netlisted = false - @connect_implicit = "" + @connect_implicit = [] @l2n = nil end @@ -186,7 +186,7 @@ module DRC def clear_connections @netlisted = false - @connect_implicit = "" + @connect_implicit = [] _clear_data end @@ -194,34 +194,21 @@ module DRC # @name connect_implicit # @brief Specifies a search pattern for labels which create implicit net connections # @synopsis connect_implicit(label_pattern) - # Use this method to supply a glob pattern for labels which create implicit net connections + # Use this method to supply label strings which create implicit net connections # on the top level circuit. This feature is useful to connect identically labelled nets - # while a component isn't integrated yet. If the component is integrated, net may be connected + # while a component isn't integrated yet. If the component is integrated, nets may be connected # on a higher hierarchy level - e.g. by a power mesh. Inside the component this net consists # of individual islands. To properly perform netlist extraction and comparison, these islands # need to be connected even though there isn't a physical connection. "connect_implicit" can # achive this if these islands are labelled with the same text on the top level of the # component. # - # Glob pattern are used which resemble shell file pattern: "*" is for all labels, "VDD" - # for all "VDD" labels (pattern act case sensitive). "VDD*" is for all labels beginning - # with "VDD" (still different labels will be connected to different nets!). "{VDD,VSS}" - # is either "VDD" or "VSS". - # - # The search pattern is applied on the next net extraction. The search pattern is cleared + # The implicit connections are applied on the next net extraction and cleared # on "clear_connections". def connect_implicit(arg) - cleanup - - if arg != @connect_implicit - if @connect_implicit != "" && arg != "" - raise("connect_implicit can only be used once") - end - @connect_implicit = arg - end - + @connect_implicit << arg end # %DRC% @@ -338,7 +325,14 @@ module DRC # run extraction in a timed environment if ! @netlisted - @engine._cmd(@l2n, :extract_netlist, @connect_implicit) + # build a glob expression from the parts + exprs = @connect_implicit.collect { |c| c.gsub(/\?\*\[\]\{\},\(\)\\/) { |x| "\\" + x } } + if exprs.size > 1 + expr = "{" + exprs.join(",") + "}" + else + expr = exprs[0] || "" + end + @engine._cmd(@l2n, :extract_netlist, expr) @netlisted = true end diff --git a/src/lay/lay/doc/manual/lvs_connect.xml b/src/lay/lay/doc/manual/lvs_connect.xml new file mode 100644 index 000000000..96151e5f5 --- /dev/null +++ b/src/lay/lay/doc/manual/lvs_connect.xml @@ -0,0 +1,15 @@ + + + + + + LVS Connectivity + + + + + +

+

+ +
diff --git a/src/lay/lay/doc/manual/metal_connections.png b/src/lay/lay/doc/manual/metal_connections.png new file mode 100644 index 000000000..a5e184dfd Binary files /dev/null and b/src/lay/lay/doc/manual/metal_connections.png differ