From 66a9fa41e7927bf02a6ef72e4b2aaf1e69df863f Mon Sep 17 00:00:00 2001
From: Matthias Koefferlein <matthias@koefferlein.de>
Date: Tue, 2 Jul 2019 21:09:32 +0200
Subject: [PATCH] WIP: added more docs, confine BJT combination to emitter
 parameters.

---
 src/db/db/dbNetlistDeviceClasses.cc           |   6 +-
 src/lay/lay/doc/manual/bjt3_schematic.png     | Bin 0 -> 3931 bytes
 src/lay/lay/doc/manual/bjt4_schematic.png     | Bin 0 -> 4945 bytes
 src/lay/lay/doc/manual/cap_schematic.png      | Bin 0 -> 3419 bytes
 .../doc/manual/cap_with_bulk_schematic.png    | Bin 0 -> 5000 bytes
 src/lay/lay/doc/manual/diode_schematic.png    | Bin 0 -> 3135 bytes
 src/lay/lay/doc/manual/lvs.xml                |   2 +-
 src/lay/lay/doc/manual/lvs_devices.xml        | 243 ++++++++++++++++++
 src/lay/lay/doc/manual/lvs_intro.xml          |   2 +-
 src/lay/lay/doc/manual/mos3_schematic.png     | Bin 0 -> 3907 bytes
 src/lay/lay/doc/manual/mos4_schematic.png     | Bin 0 -> 4342 bytes
 src/lay/lay/doc/manual/res_schematic.png      | Bin 0 -> 3194 bytes
 .../doc/manual/res_with_bulk_schematic.png    | Bin 0 -> 4729 bytes
 src/lay/lay/layHelpResources.qrc              |  10 +
 14 files changed, 258 insertions(+), 5 deletions(-)
 create mode 100644 src/lay/lay/doc/manual/bjt3_schematic.png
 create mode 100644 src/lay/lay/doc/manual/bjt4_schematic.png
 create mode 100644 src/lay/lay/doc/manual/cap_schematic.png
 create mode 100644 src/lay/lay/doc/manual/cap_with_bulk_schematic.png
 create mode 100644 src/lay/lay/doc/manual/diode_schematic.png
 create mode 100644 src/lay/lay/doc/manual/lvs_devices.xml
 create mode 100644 src/lay/lay/doc/manual/mos3_schematic.png
 create mode 100644 src/lay/lay/doc/manual/mos4_schematic.png
 create mode 100644 src/lay/lay/doc/manual/res_schematic.png
 create mode 100644 src/lay/lay/doc/manual/res_with_bulk_schematic.png

diff --git a/src/db/db/dbNetlistDeviceClasses.cc b/src/db/db/dbNetlistDeviceClasses.cc
index 360eae9b0..d86e3672e 100644
--- a/src/db/db/dbNetlistDeviceClasses.cc
+++ b/src/db/db/dbNetlistDeviceClasses.cc
@@ -532,9 +532,9 @@ bool DeviceClassBJT3Transistor::combine_devices (Device *a, Device *b) const
 
 void DeviceClassBJT3Transistor::combine_parameters (Device *a, Device *b) const
 {
-  for (size_t i = 0; i < 7; ++i) {
-    a->set_parameter_value (i, a->parameter_value (i) + b->parameter_value (i));
-  }
+  a->set_parameter_value (param_id_AE, a->parameter_value (param_id_AE) + b->parameter_value (param_id_AE));
+  a->set_parameter_value (param_id_PE, a->parameter_value (param_id_PE) + b->parameter_value (param_id_PE));
+  a->set_parameter_value (param_id_NE, a->parameter_value (param_id_NE) + b->parameter_value (param_id_NE));
 }
 
 // ------------------------------------------------------------------------------------
diff --git a/src/lay/lay/doc/manual/bjt3_schematic.png b/src/lay/lay/doc/manual/bjt3_schematic.png
new file mode 100644
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diff --git a/src/lay/lay/doc/manual/lvs.xml b/src/lay/lay/doc/manual/lvs.xml
index 8be12c7ae..2cbfdc05f 100644
--- a/src/lay/lay/doc/manual/lvs.xml
+++ b/src/lay/lay/doc/manual/lvs.xml
@@ -13,10 +13,10 @@
   <topics>
     <topic href="/manual/lvs_overview.xml"/>
     <topic href="/manual/lvs_intro.xml"/>
+    <topic href="/manual/lvs_devices.xml"/>
 
     <!--
     <topic href="/manual/lvs_hierarchy.xml"/>
-    <topic href="/manual/lvs_devices.xml"/>
     <topic href="/manual/lvs_connect.xml"/>
     <topic href="/manual/lvs_reference.xml"/>
     <topic href="/manual/lvs_compare.xml"/>
diff --git a/src/lay/lay/doc/manual/lvs_devices.xml b/src/lay/lay/doc/manual/lvs_devices.xml
new file mode 100644
index 000000000..af838a24a
--- /dev/null
+++ b/src/lay/lay/doc/manual/lvs_devices.xml
@@ -0,0 +1,243 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE language SYSTEM "klayout_doc.dtd">
+
+<doc>
+
+  <title>LVS Devices</title>
+  <keyword name="LVS"/>
+  <keyword name="LVS Devices"/>
+
+  <h2-index/>
+
+  <h2>Device extractors and device classes</h2>
+
+  <p>
+  KLayout provides two concepts for handling device variety: 
+  </p>
+  
+  <ul>
+    <li><b>Device classes</b> are device categories. There are general categories such as
+    resistors or MOS transistors. Specific categories can be created to represent specific
+    incarnations - e.g. NMOS and PMOS devices. Device classes also determine how devices
+    combine.</li>
+    <li><b>Device extractors</b> are objects that analyze layout and produce devices. As for
+    device classes, there are general device extractors. Each device extractor produces
+    devices from a specific class.</li>
+  </ul>
+
+  <h2>Device classes</h2>
+
+  <h3>Resistor (<class_doc href="DeviceClassResistor"/>)</h3>
+
+  <p>
+  <img src="/manual/res_schematic.png"/>
+  </p>
+
+  <p>
+  The plain resistor has two terminals, A and B. It features the following
+  parameters:
+  </p>
+
+  <ul>
+    <li><b><tt>R</tt></b>: The resistance value in Ohm</li>
+    <li><b><tt>L</tt></b>: The length in µm</li>
+    <li><b><tt>W</tt></b>: The width in µm</li>
+    <li><b><tt>A</tt></b>: The area of the resistor area in µm²</li>
+    <li><b><tt>P</tt></b>: The perimeter of the resistor area in µm</li>
+  </ul>
+
+  <p>
+  Resistors can combine in parallel or serial fashion.
+  </p>
+
+  <p>
+  In SPICE, plain resistors are represented by the "R" element.
+  </p>
+
+  <h3>Resistor with bulk terminal (<class_doc href="DeviceClassResistorWithBulk"/>)</h3>
+
+  <p>
+  <img src="/manual/res_with_bulk_schematic.png"/>
+  </p>
+
+  <p>
+  The resistor with bulk terminal is an extension of the plain resistor.
+  If has the same parameters, but one additional terminal (W) which connects to 
+  the area the resistor sits in (e.g. well or substrate).
+  </p>
+
+  <p>
+  Resistors with bulk can combine in parallel or serial fashion if their
+  bulk terminals are connected to the same net.
+  </p>
+
+  <h3>Capacitor (<class_doc href="DeviceClassCapacitor"/>)</h3>
+
+  <p>
+  <img src="/manual/cap_schematic.png"/>
+  </p>
+
+  <p>
+  The plain capacitor has two terminals, A and B. It features the following
+  parameters:
+  </p>
+
+  <ul>
+    <li><b><tt>C</tt></b>: The capacitance value in Farad</li>
+    <li><b><tt>A</tt></b>: The area of the capacitor area in µm²</li>
+    <li><b><tt>P</tt></b>: The perimeter of the capacitor area in µm</li>
+  </ul>
+
+  <p>
+  In SPICE, plain capacitors are represented by the "C" element.
+  </p>
+
+  <h3>Capacitor with bulk terminal (<class_doc href="DeviceClassCapacitorWithBulk"/>)</h3>
+
+  <p>
+  <img src="/manual/cap_with_bulk_schematic.png"/>
+  </p>
+
+  <p>
+  The capacitor with bulk terminal is an extension of the plain capacitor.
+  If has the same parameters, but one additional terminal (W) which connects to 
+  the area the capacitor sits in (e.g. well or substrate).
+  </p>
+
+  <p>
+  Capacitors with bulk can combine in parallel or serial fashion if their
+  bulk terminals are connected to the same net.
+  </p>
+
+  <h3>Diode (<class_doc href="DeviceClassDiode"/>)</h3>
+
+  <p>
+  <img src="/manual/diode_schematic.png"/>
+  </p>
+
+  <p>
+  Diodes have two terminals, A and C for anode and cathode. Diodes 
+  feature the following parameters:
+  </p>
+
+  <ul>
+    <li><b><tt>A</tt></b>: The area of the diode in µm²</li>
+    <li><b><tt>P</tt></b>: The perimeter of the diode in µm</li>
+  </ul>
+
+  <p>
+  Diodes combine in parallel (A to A and C to C). In this case
+  their areas and perimeters will add.
+  </p>
+
+  <p>
+  In SPICE, diodes are represented by the "D" element using the 
+  device class name as the model name.
+  </p>
+
+  <h3>MOS transistor (<class_doc href="DeviceClassMOS3"/>)</h3>
+
+  <p>
+  <img src="/manual/mos3_schematic.png"/>
+  </p>
+
+  <p>
+  Three-terminal MOS transistors have terminals S, G and D for source, gate and drain.
+  S and D are commutable. They feature the following parameters:
+  </p>
+
+  <ul>
+    <li><b><tt>W</tt></b>: The gate width in µm</li>
+    <li><b><tt>L</tt></b>: The gate (channel) length in µm</li>
+    <li><b><tt>AS</tt></b>: The source area in µm²</li>
+    <li><b><tt>PS</tt></b>: The source perimeter in µm</li>
+    <li><b><tt>AD</tt></b>: The drain area in µm²</li>
+    <li><b><tt>PD</tt></b>: The drain perimeter in µm</li>
+  </ul>
+
+  <p>
+  MOS3 transistors combine in parallel when the source/drains and gates are connected
+  and their gate lengths are identical.
+  In this case their widths, areas and perimeters will add.
+  </p>
+
+  <h3>MOS transistor with bulk (<class_doc href="DeviceClassMOS4"/>)</h3>
+
+  <p>
+  <img src="/manual/mos4_schematic.png"/>
+  </p>
+
+  <p>
+  The four-terminal transistor is an extension of the three-terminal one and
+  offers an additional bulk terminal (B). It is probably the most prominent 
+  transistor device as the four-terminal version is compatible with the SPICE
+  "M" element.
+  </p>
+
+  <p>
+  MOS transistors with bulk can combine in parallel the same way the three-terminal
+  versions do if their bulk terminals are connected to the same net.
+  </p>
+
+  <p>
+  In SPICE, MOS4 devices are represented by the "M" element with the
+  device class name as the model name.
+  </p>
+
+  <h3>Bipolar transistor (<class_doc href="DeviceClassBJT3"/>)</h3>
+
+  <p>
+  <img src="/manual/bjt3_schematic.png"/>
+  </p>
+
+  <p>
+  The three-terminal bipolar transistor can be either NPN or PNP type. 
+  In KLayout, this device type can represent both lateral and vertical
+  types. 
+  The parameters are:
+  </p>
+
+  <ul>
+    <li><b><tt>AE</tt></b>: The emitter area in µm²</li>
+    <li><b><tt>PE</tt></b>: The emitter perimeter in µm</li>
+    <li><b><tt>NE</tt></b>: The emitter count (initially 1)</li>
+    <li><b><tt>AB</tt></b>: The base area in µm²</li>
+    <li><b><tt>PB</tt></b>: The base perimeter in µm</li>
+    <li><b><tt>AC</tt></b>: The collector area in µm²</li>
+    <li><b><tt>PC</tt></b>: The collector perimeter in µm</li>
+  </ul>
+
+  <p>
+  Upon extraction, multi-emitter versions are extracted as multiple devices - one
+  for each emitter area - and NE = 1. Bipolar transistors combine when in parallel.
+  In this case, their emitter parameters AE, PE and NE are added.
+  </p>
+
+  <p>
+  In SPICE, BJT3 devices are represented by the "Q" element with the
+  device class name as the model name.
+  </p>
+
+  <h3>Bipolar transistor with substrate (<class_doc href="DeviceClassBJT4"/>)</h3>
+
+  <p>
+  <img src="/manual/bjt4_schematic.png"/>
+  </p>
+
+  <p>
+  The four-terminal transistor is an extension of the three-terminal one and
+  offers an additional bulk terminal (S).
+  </p>
+
+  <p>
+  Bipolar transistors with bulk can combine in parallel the same way the three-terminal
+  versions do if their bulk terminals are connected to the same net.
+  </p>
+
+  <p>
+  In SPICE, BJT4 devices are represented by the "Q" element with four nodes and the
+  device class name as the model name.
+  </p>
+
+</doc>
+
diff --git a/src/lay/lay/doc/manual/lvs_intro.xml b/src/lay/lay/doc/manual/lvs_intro.xml
index d8a0ecc7e..bc67d05a3 100644
--- a/src/lay/lay/doc/manual/lvs_intro.xml
+++ b/src/lay/lay/doc/manual/lvs_intro.xml
@@ -3,7 +3,7 @@
 
 <doc>
 
-  <title>Layout vs. Schematic (LVS) Introduction</title>
+  <title>LVS Introduction</title>
   <keyword name="LVS"/>
   <keyword name="LVS introduction"/>
 
diff --git a/src/lay/lay/doc/manual/mos3_schematic.png b/src/lay/lay/doc/manual/mos3_schematic.png
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diff --git a/src/lay/lay/layHelpResources.qrc b/src/lay/lay/layHelpResources.qrc
index 8deb781e2..3bb34f248 100644
--- a/src/lay/lay/layHelpResources.qrc
+++ b/src/lay/lay/layHelpResources.qrc
@@ -173,12 +173,22 @@
         <file alias="lvs_overview.xml">doc/manual/lvs_overview.xml</file>
         <file alias="lvs_intro.xml">doc/manual/lvs_intro.xml</file>
         <file alias="lvs_browser.png">doc/manual/lvs_browser.png</file>
+        <file alias="lvs_devices.xml">doc/manual/lvs_devices.xml</file>
         <file alias="inv.png">doc/manual/inv.png</file>
         <file alias="inv_no_transistors.png">doc/manual/inv_no_transistors.png</file>
         <file alias="inv_transistors.png">doc/manual/inv_transistors.png</file>
         <file alias="inv_with_diodes.png">doc/manual/inv_with_diodes.png</file>
         <file alias="inv_schematic.png">doc/manual/inv_schematic.png</file>
         <file alias="inv_schematic2.png">doc/manual/inv_schematic2.png</file>
+        <file alias="bjt3_schematic.png">doc/manual/bjt3_schematic.png</file>
+        <file alias="bjt4_schematic.png">doc/manual/bjt4_schematic.png</file>
+        <file alias="mos3_schematic.png">doc/manual/mos3_schematic.png</file>
+        <file alias="mos4_schematic.png">doc/manual/mos4_schematic.png</file>
+        <file alias="diode_schematic.png">doc/manual/diode_schematic.png</file>
+        <file alias="res_schematic.png">doc/manual/res_schematic.png</file>
+        <file alias="res_with_bulk_schematic.png">doc/manual/res_with_bulk_schematic.png</file>
+        <file alias="cap_schematic.png">doc/manual/cap_schematic.png</file>
+        <file alias="cap_with_bulk_schematic.png">doc/manual/cap_with_bulk_schematic.png</file>
         <file alias="edit_mode.xml">doc/manual/edit_mode.xml</file>
         <file alias="editor_advanced.xml">doc/manual/editor_advanced.xml</file>
         <file alias="editor_basics.xml">doc/manual/editor_basics.xml</file>