From 6412c534b8272bab09c488f4cd31dd270bd5e7bd Mon Sep 17 00:00:00 2001 From: Matthias Koefferlein Date: Sun, 24 Sep 2023 19:01:30 +0200 Subject: [PATCH] Updated tests --- src/db/db/dbLayoutToNetlist.cc | 4 ++-- src/db/db/dbLayoutToNetlistWriter.cc | 4 ++-- src/db/db/dbLayoutVsSchematicWriter.cc | 12 ++++++++---- src/db/db/dbLog.cc | 8 +++++--- testdata/lvs/double_height2.lvsdb | 6 +++--- testdata/lvs/double_height2_texts.lvsdb | 6 +++--- .../lvs/ringo_simple_implicit_connections.lvsdb.1 | 2 +- testdata/lvs/test_22a.lvsdb.1 | 2 +- testdata/lvs/test_22a.lvsdb.2 | 2 +- testdata/lvs/test_22b.lvsdb.1 | 2 +- testdata/lvs/test_22b.lvsdb.2 | 2 +- testdata/lvs/test_22c.lvsdb.1 | 2 +- testdata/lvs/test_22c.lvsdb.2 | 2 +- testdata/lvs/test_22d.lvsdb.1 | 2 +- testdata/ruby/dbNetlist.rb | 10 +++++----- testdata/ruby/dbNetlistDeviceExtractors.rb | 2 +- 16 files changed, 37 insertions(+), 31 deletions(-) diff --git a/src/db/db/dbLayoutToNetlist.cc b/src/db/db/dbLayoutToNetlist.cc index d70d3c04b..0ba3b4cab 100644 --- a/src/db/db/dbLayoutToNetlist.cc +++ b/src/db/db/dbLayoutToNetlist.cc @@ -476,11 +476,11 @@ void LayoutToNetlist::check_must_connect (const db::Circuit &c, const db::Net &a } } else { if (a.expanded_name () == b.expanded_name ()) { - db::LogEntryData warn (db::Warning, tl::sprintf (tl::to_string (tr ("Must-connect nets %s must be connected further up in the hierarchy. This is an error at the chip top level.")), a.expanded_name ())); + db::LogEntryData warn (db::Warning, tl::sprintf (tl::to_string (tr ("Must-connect nets %s must be connected further up in the hierarchy - this is an error at the chip top level")), a.expanded_name ())); warn.set_cell_name (c.name ()); log_entry (warn); } else { - db::LogEntryData warn (db::Warning, tl::sprintf (tl::to_string (tr ("Must-connect nets %s and %s must be connected further up in the hierarchy. This is an error at the chip top level.")), a.expanded_name (), b.expanded_name ())); + db::LogEntryData warn (db::Warning, tl::sprintf (tl::to_string (tr ("Must-connect nets %s and %s must be connected further up in the hierarchy - this is an error at the chip top level")), a.expanded_name (), b.expanded_name ())); warn.set_cell_name (c.name ()); log_entry (warn); } diff --git a/src/db/db/dbLayoutToNetlistWriter.cc b/src/db/db/dbLayoutToNetlistWriter.cc index 3b2c2754c..b188d7876 100644 --- a/src/db/db/dbLayoutToNetlistWriter.cc +++ b/src/db/db/dbLayoutToNetlistWriter.cc @@ -205,7 +205,7 @@ template void std_writer_impl::write_log_entry (TokenizedOutput &stream, const LogEntryData &le) { stream << severity_to_s (le.severity ()); - stream << message_to_s (le.to_string ()); + stream << message_to_s (le.message ()); if (! le.cell_name ().empty ()) { TokenizedOutput (stream, Keys::cell_key, true) << tl::to_word_or_quoted_string (le.cell_name ()); @@ -220,7 +220,7 @@ void std_writer_impl::write_log_entry (TokenizedOutput &stream, const LogE } if (le.geometry () != db::DPolygon ()) { - TokenizedOutput o (stream, Keys::polygon_key); + TokenizedOutput o (stream, Keys::polygon_key, true); o << tl::to_word_or_quoted_string (le.geometry ().to_string ()); } } diff --git a/src/db/db/dbLayoutVsSchematicWriter.cc b/src/db/db/dbLayoutVsSchematicWriter.cc index f51bd291f..9c100da4f 100644 --- a/src/db/db/dbLayoutVsSchematicWriter.cc +++ b/src/db/db/dbLayoutVsSchematicWriter.cc @@ -203,8 +203,10 @@ void std_writer_impl::write (TokenizedOutput &stream, const db::NetlistCro o << endl; for (auto l = xref->other_log_entries ().begin (); l != xref->other_log_entries ().end (); ++l) { - TokenizedOutput to (o, Keys::log_entry_key, true); - this->write_log_entry (to, *l); + { + TokenizedOutput to (o, Keys::log_entry_key, true); + this->write_log_entry (to, *l); + } o << endl; } @@ -225,8 +227,10 @@ void std_writer_impl::write (TokenizedOutput &stream, const db::NetlistCro o << endl; for (auto l = pcd->log_entries.begin (); l != pcd->log_entries.end (); ++l) { - TokenizedOutput to (o, Keys::log_entry_key, true); - this->write_log_entry (to, *l); + { + TokenizedOutput to (o, Keys::log_entry_key, true); + this->write_log_entry (to, *l); + } o << endl; } diff --git a/src/db/db/dbLog.cc b/src/db/db/dbLog.cc index 3d423a50b..2f504cd7f 100644 --- a/src/db/db/dbLog.cc +++ b/src/db/db/dbLog.cc @@ -170,12 +170,14 @@ LogEntryData::to_string () const } } - res += message (); - if (m_cell_name != 0) { - res += tl::to_string (tr (", in cell: ")) + cell_name (); + res += tl::to_string (tr ("In cell ")); + res += cell_name (); + res += ": "; } + res += message (); + if (! m_geometry.box ().empty ()) { res += tl::to_string (tr (", shape: ")) + m_geometry.to_string (); } diff --git a/testdata/lvs/double_height2.lvsdb b/testdata/lvs/double_height2.lvsdb index 41231a058..784d0a7bd 100644 --- a/testdata/lvs/double_height2.lvsdb +++ b/testdata/lvs/double_height2.lvsdb @@ -27,9 +27,9 @@ J( C(l2 l6 l2) C(l5 l6 l5) G(l14 SUBSTRATE) - H(W B('Must-connect nets GND from circuit INVCHAIN must be connected further up in the hierarchy. This is an error at the chip top level.')) - H(W B('Must-connect nets R from circuit INVCHAIN must be connected further up in the hierarchy. This is an error at the chip top level.')) - H(E B('Must-connect nets R from circuit INV2 are not connected in INVCHAIN')) + H(W B('Must-connect nets GND must be connected further up in the hierarchy - this is an error at the chip top level') C(INVCHAIN)) + H(W B('Must-connect nets R must be connected further up in the hierarchy - this is an error at the chip top level') C(INVCHAIN)) + H(E B('Must-connect nets R are not connected in INVCHAIN') C(INV2)) K(PMOS MOS3) K(NMOS MOS3) D(D$PMOS PMOS diff --git a/testdata/lvs/double_height2_texts.lvsdb b/testdata/lvs/double_height2_texts.lvsdb index d99bb36e5..9314d3a8f 100644 --- a/testdata/lvs/double_height2_texts.lvsdb +++ b/testdata/lvs/double_height2_texts.lvsdb @@ -27,9 +27,9 @@ J( C(l2 l6 l2) C(l5 l6 l5) G(l14 SUBSTRATE) - H(W B('Must-connect nets GND from circuit INVCHAIN must be connected further up in the hierarchy. This is an error at the chip top level.')) - H(W B('Must-connect nets R from circuit INVCHAIN must be connected further up in the hierarchy. This is an error at the chip top level.')) - H(E B('Must-connect nets R from circuit INV2 are not connected in INVCHAIN')) + H(W B('Must-connect nets GND must be connected further up in the hierarchy - this is an error at the chip top level') C(INVCHAIN)) + H(W B('Must-connect nets R must be connected further up in the hierarchy - this is an error at the chip top level') C(INVCHAIN)) + H(E B('Must-connect nets R are not connected in INVCHAIN') C(INV2)) K(PMOS MOS3) K(NMOS MOS3) D(D$PMOS PMOS diff --git a/testdata/lvs/ringo_simple_implicit_connections.lvsdb.1 b/testdata/lvs/ringo_simple_implicit_connections.lvsdb.1 index b8db0187d..dfe2f524b 100644 --- a/testdata/lvs/ringo_simple_implicit_connections.lvsdb.1 +++ b/testdata/lvs/ringo_simple_implicit_connections.lvsdb.1 @@ -39,7 +39,7 @@ layout( global(l10 SUBSTRATE) # Log entries - message(warning description('Must-connect nets VDD from circuit RINGO must be connected further up in the hierarchy. This is an error at the chip top level.')) + message(warning description('Must-connect nets VDD must be connected further up in the hierarchy - this is an error at the chip top level') cell(RINGO)) # Device class section class(PMOS MOS4) diff --git a/testdata/lvs/test_22a.lvsdb.1 b/testdata/lvs/test_22a.lvsdb.1 index 0c615c0a6..3b03a7008 100644 --- a/testdata/lvs/test_22a.lvsdb.1 +++ b/testdata/lvs/test_22a.lvsdb.1 @@ -71,7 +71,7 @@ layout( global(l6 vss) # Log entries - message(warning description('Must-connect nets vdd from circuit SP6TArray_2X4 must be connected further up in the hierarchy. This is an error at the chip top level.')) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22a.lvsdb.2 b/testdata/lvs/test_22a.lvsdb.2 index db581b3ce..7b3f46cb7 100644 --- a/testdata/lvs/test_22a.lvsdb.2 +++ b/testdata/lvs/test_22a.lvsdb.2 @@ -71,7 +71,7 @@ layout( global(l6 vss) # Log entries - message(warning description('Must-connect nets vdd from circuit SP6TArray_2X4 must be connected further up in the hierarchy. This is an error at the chip top level.')) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22b.lvsdb.1 b/testdata/lvs/test_22b.lvsdb.1 index adae1c5b2..0ba4a5715 100644 --- a/testdata/lvs/test_22b.lvsdb.1 +++ b/testdata/lvs/test_22b.lvsdb.1 @@ -71,7 +71,7 @@ layout( global(l6 vss) # Log entries - message(warning description('Must-connect nets vdd from circuit SP6TArray_2X4 must be connected further up in the hierarchy. This is an error at the chip top level.')) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22b.lvsdb.2 b/testdata/lvs/test_22b.lvsdb.2 index 780f9903e..8143cde2e 100644 --- a/testdata/lvs/test_22b.lvsdb.2 +++ b/testdata/lvs/test_22b.lvsdb.2 @@ -71,7 +71,7 @@ layout( global(l6 vss) # Log entries - message(warning description('Must-connect nets vdd from circuit SP6TArray_2X4 must be connected further up in the hierarchy. This is an error at the chip top level.')) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22c.lvsdb.1 b/testdata/lvs/test_22c.lvsdb.1 index 1dde5fe1e..dc8c9a02b 100644 --- a/testdata/lvs/test_22c.lvsdb.1 +++ b/testdata/lvs/test_22c.lvsdb.1 @@ -71,7 +71,7 @@ layout( global(l1 vss) # Log entries - message(warning description('Must-connect nets vdd from circuit SP6TArray_2X4 must be connected further up in the hierarchy. This is an error at the chip top level.')) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22c.lvsdb.2 b/testdata/lvs/test_22c.lvsdb.2 index 4b291a048..041d90937 100644 --- a/testdata/lvs/test_22c.lvsdb.2 +++ b/testdata/lvs/test_22c.lvsdb.2 @@ -71,7 +71,7 @@ layout( global(l1 vss) # Log entries - message(warning description('Must-connect nets vdd from circuit SP6TArray_2X4 must be connected further up in the hierarchy. This is an error at the chip top level.')) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22d.lvsdb.1 b/testdata/lvs/test_22d.lvsdb.1 index 6c4dda0ef..a7d57594a 100644 --- a/testdata/lvs/test_22d.lvsdb.1 +++ b/testdata/lvs/test_22d.lvsdb.1 @@ -71,7 +71,7 @@ layout( global(l1 vss) # Log entries - message(warning description('Must-connect nets vdd from circuit SP6TArray_2X4 must be connected further up in the hierarchy. This is an error at the chip top level.')) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) # Device class section class(active_res RES) diff --git a/testdata/ruby/dbNetlist.rb b/testdata/ruby/dbNetlist.rb index 4c5b9fd83..738b57433 100644 --- a/testdata/ruby/dbNetlist.rb +++ b/testdata/ruby/dbNetlist.rb @@ -1120,11 +1120,11 @@ END c.join_nets(c.net_by_name("IN"), c.net_by_name("OUT")) assert_equal(nl.to_s, <<"END") -circuit INV2 (IN=IN,$2=$2,OUT=IN,$4=$4,$5=$5); - subcircuit PTRANS SC1 ($1=$5,$2=$2,$3=IN); - subcircuit NTRANS SC2 ($1=$4,$2=$2,$3=IN); - subcircuit PTRANS SC3 ($1=$5,$2=IN,$3=$2); - subcircuit NTRANS SC4 ($1=$4,$2=IN,$3=$2); +circuit INV2 ('IN,OUT'='IN,OUT',$2=$2,$3=$4,$4=$5); + subcircuit PTRANS SC1 ($1=$5,$2=$2,$3='IN,OUT'); + subcircuit NTRANS SC2 ($1=$4,$2=$2,$3='IN,OUT'); + subcircuit PTRANS SC3 ($1=$5,$2='IN,OUT',$3=$2); + subcircuit NTRANS SC4 ($1=$4,$2='IN,OUT',$3=$2); end; circuit PTRANS ($1=$1,$2=$2,$3=$3); device PMOS $1 (S=$1,G=$3,D=$2) (L=0.25,W=0.95,AS=0,AD=0,PS=0,PD=0); diff --git a/testdata/ruby/dbNetlistDeviceExtractors.rb b/testdata/ruby/dbNetlistDeviceExtractors.rb index 5caa5ff90..d4d7023a3 100644 --- a/testdata/ruby/dbNetlistDeviceExtractors.rb +++ b/testdata/ruby/dbNetlistDeviceExtractors.rb @@ -27,7 +27,7 @@ class DBNetlistExtractorTests_TestClass < TestBase def test_1_Error - err = RBA::NetlistDeviceExtractorError::new + err = RBA::LogEntryData::new err.message = "MSG" err.cell_name = "Cell"