From 45d9261ba92ee9d359b8d6843de7edbc02c9f882 Mon Sep 17 00:00:00 2001 From: Matthias Koefferlein Date: Wed, 24 Jul 2019 22:15:15 +0200 Subject: [PATCH] Updated test golden data variants for MSVC builds --- testdata/lvs/ringo_simple.lvsdb.2 | 158 +-- ...db => ringo_simple_device_scaling.lvsdb.1} | 0 .../lvs/ringo_simple_device_scaling.lvsdb.2 | 971 ++++++++++++++ .../ringo_simple_implicit_connections.lvsdb.2 | 158 +-- testdata/lvs/ringo_simple_io.lvsdb.2 | 158 +-- testdata/lvs/ringo_simple_io2.lvsdb.2 | 158 +-- ...simple_net_and_circuit_equivalence.lvsdb.2 | 158 +-- .../lvs/ringo_simple_pin_swapping.lvsdb.2 | 158 +-- .../ringo_simple_same_device_classes.lvsdb.2 | 158 +-- .../lvs/ringo_simple_simplification.lvsdb.2 | 166 +-- ..._simple_simplification_with_align.lvsdb.1} | 0 ...o_simple_simplification_with_align.lvsdb.2 | 1142 +++++++++++++++++ 12 files changed, 2749 insertions(+), 636 deletions(-) rename testdata/lvs/{ringo_simple_device_scaling.lvsdb => ringo_simple_device_scaling.lvsdb.1} (100%) create mode 100644 testdata/lvs/ringo_simple_device_scaling.lvsdb.2 rename testdata/lvs/{ringo_simple_simplification_with_align.lvsdb => ringo_simple_simplification_with_align.lvsdb.1} (100%) create mode 100644 testdata/lvs/ringo_simple_simplification_with_align.lvsdb.2 diff --git a/testdata/lvs/ringo_simple.lvsdb.2 b/testdata/lvs/ringo_simple.lvsdb.2 index 2d8585635..f2c7faaff 100644 --- a/testdata/lvs/ringo_simple.lvsdb.2 +++ b/testdata/lvs/ringo_simple.lvsdb.2 @@ -16,22 +16,22 @@ layout( layer(l12 '10/0') layer(l13 '11/0') layer(l7) - layer(l1) + layer(l2) layer(l9) - layer(l5) + layer(l6) layer(l10) # Mask layer connectivity connect(l3 l3 l9) connect(l4 l4 l8) - connect(l8 l4 l8 l11 l1 l9 l5 l10) + connect(l8 l4 l8 l11 l2 l9 l6 l10) connect(l11 l8 l11 l12) connect(l12 l11 l12 l13) connect(l13 l12 l13) connect(l7 l7) - connect(l1 l8 l1) + connect(l2 l8 l2) connect(l9 l3 l8 l9) - connect(l5 l8 l5) + connect(l6 l8 l6) connect(l10 l8 l10) # Global nets and connectivity @@ -46,13 +46,13 @@ layout( # Device abstracts list the pin shapes of the devices. device(D$PMOS PMOS terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (450 1500)) + rect(l2 (125 -750) (450 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -60,13 +60,13 @@ layout( ) device(D$PMOS$1 PMOS terminal(S - rect(l1 (-575 -750) (450 1500)) + rect(l2 (-575 -750) (450 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -74,13 +74,13 @@ layout( ) device(D$PMOS$2 PMOS terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -88,13 +88,13 @@ layout( ) device(D$NMOS NMOS terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (450 950)) + rect(l6 (125 -475) (450 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -102,13 +102,13 @@ layout( ) device(D$NMOS$1 NMOS terminal(S - rect(l5 (-575 -475) (450 950)) + rect(l6 (-575 -475) (450 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -116,13 +116,13 @@ layout( ) device(D$NMOS$2 NMOS terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l1 (-276 -2151) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) + rect(l2 (-276 -2151) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -163,9 +163,9 @@ layout( rect(l11 (-1751 1099) (300 1400)) rect(l11 (1100 -1700) (300 300)) rect(l11 (-300 0) (300 1400)) - rect(l1 (-375 -1450) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-375 -1450) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -173,7 +173,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l5 (-951 859) (425 950)) + rect(l6 (-951 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2600 3500)) @@ -200,8 +200,8 @@ layout( ) net(7 name(SUBSTRATE)) net(8 - rect(l5 (975 1660) (425 950)) - rect(l5 (-400 -950) (425 950)) + rect(l6 (975 1660) (425 950)) + rect(l6 (-400 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -282,7 +282,7 @@ layout( rect(l11 (-650 300) (1800 800)) rect(l11 (-1450 -1100) (300 300)) rect(l11 (299 399) (2 2)) - rect(l1 (-651 -2151) (425 1500)) + rect(l2 (-651 -2151) (425 1500)) ) net(2 name(OUT) rect(l8 (1110 5160) (180 180)) @@ -292,8 +292,8 @@ layout( rect(l8 (-180 370) (180 180)) rect(l11 (-240 -790) (300 4790)) rect(l11 (-151 -2501) (2 2)) - rect(l1 (-226 1049) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-226 1049) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -301,7 +301,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (1800 800)) rect(l11 (-851 -401) (2 2)) - rect(l5 (-651 859) (425 950)) + rect(l6 (-651 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2000 3500)) @@ -364,63 +364,63 @@ layout( net(1 rect(l8 (4710 3010) (180 180)) rect(l11 (-850 -240) (610 300)) - rect(l1 (-1175 1800) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-1175 1800) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(2 rect(l8 (6510 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 rect(l8 (8310 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(4 rect(l8 (10110 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(5 rect(l8 (11910 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(6 rect(l8 (13710 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(7 rect(l8 (15510 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(8 rect(l8 (17310 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(9 rect(l8 (19110 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(10 rect(l8 (20910 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(11 name(FB) rect(l8 (22710 3010) (180 180)) @@ -434,8 +434,8 @@ layout( rect(l13 (-17921 -201) (2 2)) rect(l13 (-221 -201) (400 400)) rect(l13 (17740 -400) (400 400)) - rect(l1 (-245 850) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-245 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(12 name(VDD) rect(l3 (500 4500) (1400 3500)) @@ -457,19 +457,19 @@ layout( rect(l11 (-750 -1450) (300 1400)) rect(l11 (-101 -351) (2 2)) rect(l11 (549 -401) (600 800)) - rect(l1 (-23025 -2550) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) - rect(l1 (1275 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) + rect(l2 (-23025 -2550) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + rect(l2 (1275 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) rect(l9 (-21975 -450) (500 1500)) rect(l9 (22900 -1500) (500 1500)) ) @@ -478,8 +478,8 @@ layout( rect(l12 (-260 -260) (200 200)) rect(l13 (-101 -101) (2 2)) rect(l13 (-201 -201) (400 400)) - rect(l1 (-625 850) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-625 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(14 name(ENABLE) rect(l8 (2510 3010) (180 180)) @@ -504,18 +504,18 @@ layout( rect(l11 (-750 -1450) (1200 800)) rect(l11 (-551 -401) (2 2)) rect(l11 (549 -401) (600 800)) - rect(l5 (-23700 460) (425 950)) - rect(l5 (1975 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) + rect(l6 (-23700 460) (425 950)) + rect(l6 (1975 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) rect(l10 (-21975 -2210) (500 1500)) rect(l10 (22900 -1500) (500 1500)) ) diff --git a/testdata/lvs/ringo_simple_device_scaling.lvsdb b/testdata/lvs/ringo_simple_device_scaling.lvsdb.1 similarity index 100% rename from testdata/lvs/ringo_simple_device_scaling.lvsdb rename to testdata/lvs/ringo_simple_device_scaling.lvsdb.1 diff --git a/testdata/lvs/ringo_simple_device_scaling.lvsdb.2 b/testdata/lvs/ringo_simple_device_scaling.lvsdb.2 new file mode 100644 index 000000000..39fc2c979 --- /dev/null +++ b/testdata/lvs/ringo_simple_device_scaling.lvsdb.2 @@ -0,0 +1,971 @@ +#%lvsdb-klayout + +# Layout +layout( + top(RINGO) + unit(0.001) + + # Layer section + # This section lists the mask layers (drawing or derived) and their connections. + + # Mask layers + layer(l3 '1/0') + layer(l4 '5/0') + layer(l8 '8/0') + layer(l11 '9/0') + layer(l12 '10/0') + layer(l13 '11/0') + layer(l7) + layer(l2) + layer(l9) + layer(l6) + layer(l10) + + # Mask layer connectivity + connect(l3 l3 l9) + connect(l4 l4 l8) + connect(l8 l4 l8 l11 l2 l9 l6 l10) + connect(l11 l8 l11 l12) + connect(l12 l11 l12 l13) + connect(l13 l12 l13) + connect(l7 l7) + connect(l2 l8 l2) + connect(l9 l3 l8 l9) + connect(l6 l8 l6) + connect(l10 l8 l10) + + # Global nets and connectivity + global(l7 SUBSTRATE) + global(l10 SUBSTRATE) + + # Device class section + class(PMOS MOS4) + class(NMOS MOS4) + + # Device abstracts section + # Device abstracts list the pin shapes of the devices. + device(D$PMOS PMOS + terminal(S + rect(l2 (-550 -750) (425 1500)) + ) + terminal(G + rect(l4 (-125 -750) (250 1500)) + ) + terminal(D + rect(l2 (125 -750) (450 1500)) + ) + terminal(B + rect(l3 (-125 -750) (250 1500)) + ) + ) + device(D$PMOS$1 PMOS + terminal(S + rect(l2 (-575 -750) (450 1500)) + ) + terminal(G + rect(l4 (-125 -750) (250 1500)) + ) + terminal(D + rect(l2 (125 -750) (425 1500)) + ) + terminal(B + rect(l3 (-125 -750) (250 1500)) + ) + ) + device(D$PMOS$2 PMOS + terminal(S + rect(l2 (-550 -750) (425 1500)) + ) + terminal(G + rect(l4 (-125 -750) (250 1500)) + ) + terminal(D + rect(l2 (125 -750) (425 1500)) + ) + terminal(B + rect(l3 (-125 -750) (250 1500)) + ) + ) + device(D$NMOS NMOS + terminal(S + rect(l6 (-550 -475) (425 950)) + ) + terminal(G + rect(l4 (-125 -475) (250 950)) + ) + terminal(D + rect(l6 (125 -475) (450 950)) + ) + terminal(B + rect(l7 (-125 -475) (250 950)) + ) + ) + device(D$NMOS$1 NMOS + terminal(S + rect(l6 (-575 -475) (450 950)) + ) + terminal(G + rect(l4 (-125 -475) (250 950)) + ) + terminal(D + rect(l6 (125 -475) (425 950)) + ) + terminal(B + rect(l7 (-125 -475) (250 950)) + ) + ) + device(D$NMOS$2 NMOS + terminal(S + rect(l6 (-550 -475) (425 950)) + ) + terminal(G + rect(l4 (-125 -475) (250 950)) + ) + terminal(D + rect(l6 (125 -475) (425 950)) + ) + terminal(B + rect(l7 (-125 -475) (250 950)) + ) + ) + + # Circuit section + # Circuits are the hierarchical building blocks of the netlist. + circuit(ND2X1 + + # Circuit boundary + rect((-100 400) (2600 7600)) + + # Nets with their geometries + net(1 name(VDD) + rect(l8 (1110 5160) (180 180)) + rect(l8 (-180 920) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l11 (-240 -790) (300 1700)) + rect(l11 (-1350 0) (2400 800)) + rect(l11 (-1151 -401) (2 2)) + rect(l2 (-276 -2151) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + ) + net(2 name(OUT) + rect(l8 (1810 1770) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l8 (-1580 3760) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l8 (1220 920) (180 180)) + rect(l8 (-180 -1280) (180 180)) + rect(l8 (-180 370) (180 180)) + polygon(l11 (-240 -4180) (0 1390) (490 0) (0 -300) (-190 0) (0 -1090)) + rect(l11 (-110 1390) (300 1400)) + polygon(l11 (-1890 0) (0 600) (300 0) (0 -300) (1590 0) (0 -300)) + rect(l11 (-141 -501) (2 2)) + rect(l11 (-1751 1099) (300 1400)) + rect(l11 (1100 -1700) (300 300)) + rect(l11 (-300 0) (300 1400)) + rect(l2 (-375 -1450) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) + ) + net(3 name(VSS) + rect(l8 (410 1770) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l11 (-240 -1300) (300 1360)) + rect(l11 (-650 -2160) (2400 800)) + rect(l11 (-1151 -401) (2 2)) + rect(l6 (-951 859) (425 950)) + ) + net(4 + rect(l3 (-100 4500) (2600 3500)) + ) + net(5 name(B) + rect(l4 (1425 2860) (250 1940)) + rect(l4 (-345 -950) (300 300)) + rect(l4 (-205 650) (250 2000)) + rect(l4 (-250 -2000) (250 2000)) + rect(l4 (-250 -5390) (250 1450)) + rect(l8 (-285 1050) (180 180)) + rect(l11 (-71 -91) (2 2)) + rect(l11 (-171 -151) (300 300)) + ) + net(6 name(A) + rect(l4 (725 2860) (250 1940)) + rect(l4 (-325 -1850) (300 300)) + rect(l4 (-225 1550) (250 2000)) + rect(l4 (-250 -2000) (250 2000)) + rect(l4 (-250 -5390) (250 1450)) + rect(l8 (-265 150) (180 180)) + rect(l11 (-91 -91) (2 2)) + rect(l11 (-151 -151) (300 300)) + ) + net(7 name(SUBSTRATE)) + net(8 + rect(l6 (975 1660) (425 950)) + rect(l6 (-400 -950) (425 950)) + ) + + # Outgoing pins and their connections to nets + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4) + pin(5 name(B)) + pin(6 name(A)) + pin(7 name(SUBSTRATE)) + + # Devices and their connections + device(1 D$PMOS + location(850 5800) + param(L 0.5) + param(W 3) + param(AS 2.55) + param(AD 1.35) + param(PS 7.7) + param(PD 3.9) + terminal(S 2) + terminal(G 6) + terminal(D 1) + terminal(B 4) + ) + device(2 D$PMOS$1 + location(1550 5800) + param(L 0.5) + param(W 3) + param(AS 1.35) + param(AD 2.55) + param(PS 3.9) + param(PD 7.7) + terminal(S 1) + terminal(G 5) + terminal(D 2) + terminal(B 4) + ) + device(3 D$NMOS + location(850 2135) + param(L 0.5) + param(W 1.9) + param(AS 1.615) + param(AD 0.855) + param(PS 5.5) + param(PD 2.8) + terminal(S 3) + terminal(G 6) + terminal(D 8) + terminal(B 7) + ) + device(4 D$NMOS$1 + location(1550 2135) + param(L 0.5) + param(W 1.9) + param(AS 0.855) + param(AD 1.615) + param(PS 2.8) + param(PD 5.5) + terminal(S 8) + terminal(G 5) + terminal(D 2) + terminal(B 7) + ) + + ) + circuit(INVX1 + + # Circuit boundary + rect((-100 400) (2000 7600)) + + # Nets with their geometries + net(1 name(VDD) + rect(l8 (410 6260) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l11 (-240 -240) (300 1400)) + rect(l11 (-650 300) (1800 800)) + rect(l11 (-1450 -1100) (300 300)) + rect(l11 (299 399) (2 2)) + rect(l2 (-651 -2151) (425 1500)) + ) + net(2 name(OUT) + rect(l8 (1110 5160) (180 180)) + rect(l8 (-180 920) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l8 (-180 -4120) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l11 (-240 -790) (300 4790)) + rect(l11 (-151 -2501) (2 2)) + rect(l2 (-226 1049) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(3 name(VSS) + rect(l8 (410 1770) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l11 (-240 -1300) (300 1360)) + rect(l11 (-650 -2160) (1800 800)) + rect(l11 (-851 -401) (2 2)) + rect(l6 (-651 859) (425 950)) + ) + net(4 + rect(l3 (-100 4500) (2000 3500)) + ) + net(5 name(IN) + rect(l4 (725 2860) (250 1940)) + rect(l4 (-525 -1850) (300 300)) + rect(l4 (-25 1550) (250 2000)) + rect(l4 (-250 -2000) (250 2000)) + rect(l4 (-250 -5390) (250 1450)) + rect(l8 (-465 150) (180 180)) + rect(l11 (-91 -91) (2 2)) + rect(l11 (-151 -151) (300 300)) + ) + net(6 name(SUBSTRATE)) + + # Outgoing pins and their connections to nets + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4) + pin(5 name(IN)) + pin(6 name(SUBSTRATE)) + + # Devices and their connections + device(1 D$PMOS$2 + location(850 5800) + param(L 0.5) + param(W 3) + param(AS 2.55) + param(AD 2.55) + param(PS 7.7) + param(PD 7.7) + terminal(S 1) + terminal(G 5) + terminal(D 2) + terminal(B 4) + ) + device(2 D$NMOS$2 + location(850 2135) + param(L 0.5) + param(W 1.9) + param(AS 1.615) + param(AD 1.615) + param(PS 5.5) + param(PD 5.5) + terminal(S 3) + terminal(G 5) + terminal(D 2) + terminal(B 6) + ) + + ) + circuit(RINGO + + # Circuit boundary + rect((0 350) (25800 7650)) + + # Nets with their geometries + net(1 + rect(l8 (4710 3010) (180 180)) + rect(l11 (-850 -240) (610 300)) + rect(l2 (-1175 1800) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) + ) + net(2 + rect(l8 (6510 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(3 + rect(l8 (8310 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(4 + rect(l8 (10110 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(5 + rect(l8 (11910 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(6 + rect(l8 (13710 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(7 + rect(l8 (15510 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(8 + rect(l8 (17310 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(9 + rect(l8 (19110 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(10 + rect(l8 (20910 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(11 name(FB) + rect(l8 (22710 3010) (180 180)) + rect(l8 (-19700 720) (180 180)) + rect(l11 (18380 -1140) (900 300)) + rect(l11 (-19530 590) (320 320)) + rect(l11 (17820 -320) (320 320)) + rect(l12 (-18400 -260) (200 200)) + rect(l12 (17940 -200) (200 200)) + rect(l13 (-18040 -300) (17740 400)) + rect(l13 (-17921 -201) (2 2)) + rect(l13 (-221 -201) (400 400)) + rect(l13 (17740 -400) (400 400)) + rect(l2 (-245 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(12 name(VDD) + rect(l3 (500 4500) (1400 3500)) + rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (23300 -3500) (1400 3500)) + rect(l3 (-100 -3500) (600 3500)) + rect(l8 (-24690 -1240) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l8 (-180 -1280) (180 180)) + rect(l8 (23220 370) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l8 (-180 -1280) (180 180)) + rect(l11 (-21741 859) (2 2)) + rect(l11 (-2351 -451) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-101 -351) (2 2)) + rect(l11 (-1251 -401) (600 800)) + rect(l11 (23400 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-101 -351) (2 2)) + rect(l11 (549 -401) (600 800)) + rect(l2 (-23025 -2550) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + rect(l2 (1275 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l9 (-21975 -450) (500 1500)) + rect(l9 (22900 -1500) (500 1500)) + ) + net(13 name(OUT) + rect(l11 (23440 3840) (320 320)) + rect(l12 (-260 -260) (200 200)) + rect(l13 (-101 -101) (2 2)) + rect(l13 (-201 -201) (400 400)) + rect(l2 (-625 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(14 name(ENABLE) + rect(l8 (2510 3010) (180 180)) + rect(l11 (-250 -250) (320 320)) + rect(l12 (-260 -260) (200 200)) + rect(l13 (-101 -101) (2 2)) + rect(l13 (-201 -201) (400 400)) + ) + net(15 name(VSS) + rect(l8 (1110 1610) (180 180)) + rect(l8 (-180 -1280) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l8 (23220 370) (180 180)) + rect(l8 (-180 -1280) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l11 (-21741 -391) (2 2)) + rect(l11 (-1901 -401) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-551 -401) (2 2)) + rect(l11 (-1251 -401) (600 800)) + rect(l11 (23850 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-551 -401) (2 2)) + rect(l11 (549 -401) (600 800)) + rect(l6 (-23700 460) (425 950)) + rect(l6 (1975 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l10 (-21975 -2210) (500 1500)) + rect(l10 (22900 -1500) (500 1500)) + ) + + # Outgoing pins and their connections to nets + pin(11 name(FB)) + pin(12 name(VDD)) + pin(13 name(OUT)) + pin(14 name(ENABLE)) + pin(15 name(VSS)) + + # Subcircuits and their connections + circuit(1 ND2X1 location(1800 0) + pin(0 12) + pin(1 1) + pin(2 15) + pin(3 12) + pin(4 11) + pin(5 14) + pin(6 15) + ) + circuit(2 INVX1 location(4200 0) + pin(0 12) + pin(1 2) + pin(2 15) + pin(3 12) + pin(4 1) + pin(5 15) + ) + circuit(3 INVX1 location(6000 0) + pin(0 12) + pin(1 3) + pin(2 15) + pin(3 12) + pin(4 2) + pin(5 15) + ) + circuit(4 INVX1 location(7800 0) + pin(0 12) + pin(1 4) + pin(2 15) + pin(3 12) + pin(4 3) + pin(5 15) + ) + circuit(5 INVX1 location(9600 0) + pin(0 12) + pin(1 5) + pin(2 15) + pin(3 12) + pin(4 4) + pin(5 15) + ) + circuit(6 INVX1 location(11400 0) + pin(0 12) + pin(1 6) + pin(2 15) + pin(3 12) + pin(4 5) + pin(5 15) + ) + circuit(7 INVX1 location(13200 0) + pin(0 12) + pin(1 7) + pin(2 15) + pin(3 12) + pin(4 6) + pin(5 15) + ) + circuit(8 INVX1 location(15000 0) + pin(0 12) + pin(1 8) + pin(2 15) + pin(3 12) + pin(4 7) + pin(5 15) + ) + circuit(9 INVX1 location(16800 0) + pin(0 12) + pin(1 9) + pin(2 15) + pin(3 12) + pin(4 8) + pin(5 15) + ) + circuit(10 INVX1 location(18600 0) + pin(0 12) + pin(1 10) + pin(2 15) + pin(3 12) + pin(4 9) + pin(5 15) + ) + circuit(11 INVX1 location(20400 0) + pin(0 12) + pin(1 11) + pin(2 15) + pin(3 12) + pin(4 10) + pin(5 15) + ) + circuit(12 INVX1 location(22200 0) + pin(0 12) + pin(1 13) + pin(2 15) + pin(3 12) + pin(4 11) + pin(5 15) + ) + + ) +) + +# Reference netlist +reference( + + # Device class section + class(PMOS MOS4) + class(NMOS MOS4) + + # Circuit section + # Circuits are the hierarchical building blocks of the netlist. + circuit(ND2X1 + + # Nets + net(1 name(VDD)) + net(2 name(OUT)) + net(3 name(VSS)) + net(4 name(NWELL)) + net(5 name(B)) + net(6 name(A)) + net(7 name(BULK)) + net(8 name('1')) + + # Outgoing pins and their connections to nets + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(B)) + pin(6 name(A)) + pin(7 name(BULK)) + + # Devices and their connections + device(1 PMOS + name($1) + param(L 0.5) + param(W 3) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 2) + terminal(G 6) + terminal(D 1) + terminal(B 4) + ) + device(2 PMOS + name($2) + param(L 0.5) + param(W 3) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 1) + terminal(G 5) + terminal(D 2) + terminal(B 4) + ) + device(3 NMOS + name($3) + param(L 0.5) + param(W 1.9) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 3) + terminal(G 6) + terminal(D 8) + terminal(B 7) + ) + device(4 NMOS + name($4) + param(L 0.5) + param(W 1.9) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 8) + terminal(G 5) + terminal(D 2) + terminal(B 7) + ) + + ) + circuit(INVX1 + + # Nets + net(1 name(VDD)) + net(2 name(OUT)) + net(3 name(VSS)) + net(4 name(NWELL)) + net(5 name(IN)) + net(6 name(BULK)) + + # Outgoing pins and their connections to nets + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(IN)) + pin(6 name(BULK)) + + # Devices and their connections + device(1 PMOS + name($1) + param(L 0.5) + param(W 3) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 1) + terminal(G 5) + terminal(D 2) + terminal(B 4) + ) + device(2 NMOS + name($2) + param(L 0.5) + param(W 1.9) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 3) + terminal(G 5) + terminal(D 2) + terminal(B 6) + ) + + ) + circuit(RINGO + + # Nets + net(1 name(VSS)) + net(2 name(VDD)) + net(3 name(FB)) + net(4 name(ENABLE)) + net(5 name(OUT)) + net(6 name('1')) + net(7 name('2')) + net(8 name('3')) + net(9 name('4')) + net(10 name('5')) + net(11 name('6')) + net(12 name('7')) + net(13 name('8')) + net(14 name('9')) + net(15 name('10')) + + # Outgoing pins and their connections to nets + pin(1 name(VSS)) + pin(2 name(VDD)) + pin(3 name(FB)) + pin(4 name(ENABLE)) + pin(5 name(OUT)) + + # Subcircuits and their connections + circuit(1 ND2X1 name($1) + pin(0 2) + pin(1 6) + pin(2 1) + pin(3 2) + pin(4 3) + pin(5 4) + pin(6 1) + ) + circuit(2 INVX1 name($2) + pin(0 2) + pin(1 7) + pin(2 1) + pin(3 2) + pin(4 6) + pin(5 1) + ) + circuit(3 INVX1 name($3) + pin(0 2) + pin(1 8) + pin(2 1) + pin(3 2) + pin(4 7) + pin(5 1) + ) + circuit(4 INVX1 name($4) + pin(0 2) + pin(1 9) + pin(2 1) + pin(3 2) + pin(4 8) + pin(5 1) + ) + circuit(5 INVX1 name($5) + pin(0 2) + pin(1 10) + pin(2 1) + pin(3 2) + pin(4 9) + pin(5 1) + ) + circuit(6 INVX1 name($6) + pin(0 2) + pin(1 11) + pin(2 1) + pin(3 2) + pin(4 10) + pin(5 1) + ) + circuit(7 INVX1 name($7) + pin(0 2) + pin(1 12) + pin(2 1) + pin(3 2) + pin(4 11) + pin(5 1) + ) + circuit(8 INVX1 name($8) + pin(0 2) + pin(1 13) + pin(2 1) + pin(3 2) + pin(4 12) + pin(5 1) + ) + circuit(9 INVX1 name($9) + pin(0 2) + pin(1 14) + pin(2 1) + pin(3 2) + pin(4 13) + pin(5 1) + ) + circuit(10 INVX1 name($10) + pin(0 2) + pin(1 15) + pin(2 1) + pin(3 2) + pin(4 14) + pin(5 1) + ) + circuit(11 INVX1 name($11) + pin(0 2) + pin(1 3) + pin(2 1) + pin(3 2) + pin(4 15) + pin(5 1) + ) + circuit(12 INVX1 name($12) + pin(0 2) + pin(1 5) + pin(2 1) + pin(3 2) + pin(4 3) + pin(5 1) + ) + + ) +) + +# Cross reference +xref( + circuit(INVX1 INVX1 match + xref( + net(4 4 match) + net(5 5 match) + net(2 2 match) + net(6 6 match) + net(1 1 match) + net(3 3 match) + pin(3 3 match) + pin(4 4 match) + pin(1 1 match) + pin(5 5 match) + pin(0 0 match) + pin(2 2 match) + device(1 1 match) + device(2 2 match) + ) + ) + circuit(ND2X1 ND2X1 match + xref( + net(8 8 match) + net(4 4 match) + net(6 6 match) + net(5 5 match) + net(2 2 match) + net(7 7 match) + net(1 1 match) + net(3 3 match) + pin(3 3 match) + pin(5 5 match) + pin(4 4 match) + pin(1 1 match) + pin(6 6 match) + pin(0 0 match) + pin(2 2 match) + device(1 1 match) + device(2 2 match) + device(3 3 match) + device(4 4 match) + ) + ) + circuit(RINGO RINGO match + xref( + net(1 6 match) + net(10 15 match) + net(2 7 match) + net(3 8 match) + net(4 9 match) + net(5 10 match) + net(6 11 match) + net(7 12 match) + net(8 13 match) + net(9 14 match) + net(14 4 match) + net(11 3 match) + net(13 5 match) + net(12 2 match) + net(15 1 match) + pin(3 3 match) + pin(0 2 match) + pin(2 4 match) + pin(1 1 match) + pin(4 0 match) + circuit(1 1 match) + circuit(10 10 match) + circuit(11 11 match) + circuit(12 12 match) + circuit(2 2 match) + circuit(3 3 match) + circuit(4 4 match) + circuit(5 5 match) + circuit(6 6 match) + circuit(7 7 match) + circuit(8 8 match) + circuit(9 9 match) + ) + ) +) diff --git a/testdata/lvs/ringo_simple_implicit_connections.lvsdb.2 b/testdata/lvs/ringo_simple_implicit_connections.lvsdb.2 index 03e96d090..af00f547c 100644 --- a/testdata/lvs/ringo_simple_implicit_connections.lvsdb.2 +++ b/testdata/lvs/ringo_simple_implicit_connections.lvsdb.2 @@ -16,22 +16,22 @@ layout( layer(l12 '10/0') layer(l13 '11/0') layer(l7) - layer(l1) + layer(l2) layer(l9) - layer(l5) + layer(l6) layer(l10) # Mask layer connectivity connect(l3 l3 l9) connect(l4 l4 l8) - connect(l8 l4 l8 l11 l1 l9 l5 l10) + connect(l8 l4 l8 l11 l2 l9 l6 l10) connect(l11 l8 l11 l12) connect(l12 l11 l12 l13) connect(l13 l12 l13) connect(l7 l7) - connect(l1 l8 l1) + connect(l2 l8 l2) connect(l9 l3 l8 l9) - connect(l5 l8 l5) + connect(l6 l8 l6) connect(l10 l8 l10) # Global nets and connectivity @@ -46,13 +46,13 @@ layout( # Device abstracts list the pin shapes of the devices. device(D$PMOS PMOS terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (450 1500)) + rect(l2 (125 -750) (450 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -60,13 +60,13 @@ layout( ) device(D$PMOS$1 PMOS terminal(S - rect(l1 (-575 -750) (450 1500)) + rect(l2 (-575 -750) (450 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -74,13 +74,13 @@ layout( ) device(D$PMOS$2 PMOS terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -88,13 +88,13 @@ layout( ) device(D$NMOS NMOS terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (450 950)) + rect(l6 (125 -475) (450 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -102,13 +102,13 @@ layout( ) device(D$NMOS$1 NMOS terminal(S - rect(l5 (-575 -475) (450 950)) + rect(l6 (-575 -475) (450 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -116,13 +116,13 @@ layout( ) device(D$NMOS$2 NMOS terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l1 (-276 -2151) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) + rect(l2 (-276 -2151) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -163,9 +163,9 @@ layout( rect(l11 (-1751 1099) (300 1400)) rect(l11 (1100 -1700) (300 300)) rect(l11 (-300 0) (300 1400)) - rect(l1 (-375 -1450) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-375 -1450) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -173,7 +173,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l5 (-951 859) (425 950)) + rect(l6 (-951 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2600 3500)) @@ -200,8 +200,8 @@ layout( ) net(7 name(SUBSTRATE)) net(8 - rect(l5 (975 1660) (425 950)) - rect(l5 (-400 -950) (425 950)) + rect(l6 (975 1660) (425 950)) + rect(l6 (-400 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -282,7 +282,7 @@ layout( rect(l11 (-650 300) (1800 800)) rect(l11 (-1450 -1100) (300 300)) rect(l11 (299 399) (2 2)) - rect(l1 (-651 -2151) (425 1500)) + rect(l2 (-651 -2151) (425 1500)) ) net(2 name(OUT) rect(l8 (1110 5160) (180 180)) @@ -292,8 +292,8 @@ layout( rect(l8 (-180 370) (180 180)) rect(l11 (-240 -790) (300 4790)) rect(l11 (-151 -2501) (2 2)) - rect(l1 (-226 1049) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-226 1049) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -301,7 +301,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (1800 800)) rect(l11 (-851 -401) (2 2)) - rect(l5 (-651 859) (425 950)) + rect(l6 (-651 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2000 3500)) @@ -364,63 +364,63 @@ layout( net(1 rect(l8 (5210 3010) (180 180)) rect(l11 (-1350 -240) (1160 300)) - rect(l1 (-1725 1800) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-1725 1800) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(2 rect(l8 (7010 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 rect(l8 (8810 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(4 rect(l8 (10610 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(5 rect(l8 (12410 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(6 rect(l8 (14210 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(7 rect(l8 (16010 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(8 rect(l8 (17810 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(9 rect(l8 (19610 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(10 rect(l8 (21410 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(11 name(FB) rect(l8 (25210 3010) (180 180)) @@ -434,8 +434,8 @@ layout( rect(l13 (-19071 -201) (2 2)) rect(l13 (-171 -201) (400 400)) rect(l13 (18490 -400) (400 400)) - rect(l1 (-545 850) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-545 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(12 name(VDD) rect(l3 (22600 4500) (1400 3500)) @@ -466,19 +466,19 @@ layout( rect(l11 (-750 -1450) (300 1400)) rect(l11 (-101 -351) (2 2)) rect(l11 (549 -401) (600 800)) - rect(l1 (-23300 -2550) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (-18850 -1500) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) - rect(l1 (21775 -1500) (425 1500)) + rect(l2 (-23300 -2550) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (-18850 -1500) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + rect(l2 (21775 -1500) (425 1500)) rect(l9 (-2375 -450) (500 1500)) rect(l9 (-22600 -1500) (500 1500)) rect(l9 (25400 -1500) (500 1500)) @@ -488,8 +488,8 @@ layout( rect(l12 (-260 -260) (200 200)) rect(l13 (-151 -101) (2 2)) rect(l13 (-151 -201) (400 400)) - rect(l1 (-675 850) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-675 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(14 name(ENABLE) rect(l8 (2510 3010) (180 180)) @@ -522,18 +522,18 @@ layout( rect(l11 (-750 -1450) (1200 800)) rect(l11 (-551 -401) (2 2)) rect(l11 (-1251 -401) (600 800)) - rect(l5 (24400 460) (425 950)) - rect(l5 (-20425 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (-19525 -950) (425 950)) + rect(l6 (24400 460) (425 950)) + rect(l6 (-20425 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (-19525 -950) (425 950)) rect(l10 (24325 -2210) (500 1500)) rect(l10 (-4300 -1500) (500 1500)) rect(l10 (-22600 -1500) (500 1500)) diff --git a/testdata/lvs/ringo_simple_io.lvsdb.2 b/testdata/lvs/ringo_simple_io.lvsdb.2 index 64c35b1c6..3c62e6574 100644 --- a/testdata/lvs/ringo_simple_io.lvsdb.2 +++ b/testdata/lvs/ringo_simple_io.lvsdb.2 @@ -9,32 +9,32 @@ J( L(l12 '10/0') L(l13 '11/0') L(l7) - L(l1) + L(l2) L(l9) - L(l5) + L(l6) L(l10) C(l3 l3 l9) C(l4 l4 l8) - C(l8 l4 l8 l11 l1 l9 l5 l10) + C(l8 l4 l8 l11 l2 l9 l6 l10) C(l11 l8 l11 l12) C(l12 l11 l12 l13) C(l13 l12 l13) C(l7 l7) - C(l1 l8 l1) + C(l2 l8 l2) C(l9 l3 l8 l9) - C(l5 l8 l5) + C(l6 l8 l6) C(l10 l8 l10) G(l7 SUBSTRATE) G(l10 SUBSTRATE) D(D$PMOS PMOS T(S - R(l1 (-550 -750) (425 1500)) + R(l2 (-550 -750) (425 1500)) ) T(G R(l4 (-125 -750) (250 1500)) ) T(D - R(l1 (125 -750) (450 1500)) + R(l2 (125 -750) (450 1500)) ) T(B R(l3 (-125 -750) (250 1500)) @@ -42,13 +42,13 @@ J( ) D(D$PMOS$1 PMOS T(S - R(l1 (-575 -750) (450 1500)) + R(l2 (-575 -750) (450 1500)) ) T(G R(l4 (-125 -750) (250 1500)) ) T(D - R(l1 (125 -750) (425 1500)) + R(l2 (125 -750) (425 1500)) ) T(B R(l3 (-125 -750) (250 1500)) @@ -56,13 +56,13 @@ J( ) D(D$PMOS$2 PMOS T(S - R(l1 (-550 -750) (425 1500)) + R(l2 (-550 -750) (425 1500)) ) T(G R(l4 (-125 -750) (250 1500)) ) T(D - R(l1 (125 -750) (425 1500)) + R(l2 (125 -750) (425 1500)) ) T(B R(l3 (-125 -750) (250 1500)) @@ -70,13 +70,13 @@ J( ) D(D$NMOS NMOS T(S - R(l5 (-550 -475) (425 950)) + R(l6 (-550 -475) (425 950)) ) T(G R(l4 (-125 -475) (250 950)) ) T(D - R(l5 (125 -475) (450 950)) + R(l6 (125 -475) (450 950)) ) T(B R(l7 (-125 -475) (250 950)) @@ -84,13 +84,13 @@ J( ) D(D$NMOS$1 NMOS T(S - R(l5 (-575 -475) (450 950)) + R(l6 (-575 -475) (450 950)) ) T(G R(l4 (-125 -475) (250 950)) ) T(D - R(l5 (125 -475) (425 950)) + R(l6 (125 -475) (425 950)) ) T(B R(l7 (-125 -475) (250 950)) @@ -98,13 +98,13 @@ J( ) D(D$NMOS$2 NMOS T(S - R(l5 (-550 -475) (425 950)) + R(l6 (-550 -475) (425 950)) ) T(G R(l4 (-125 -475) (250 950)) ) T(D - R(l5 (125 -475) (425 950)) + R(l6 (125 -475) (425 950)) ) T(B R(l7 (-125 -475) (250 950)) @@ -119,8 +119,8 @@ J( R(l11 (-240 -790) (300 1700)) R(l11 (-1350 0) (2400 800)) R(l11 (-1151 -401) (2 2)) - R(l1 (-276 -2151) (425 1500)) - R(l1 (-400 -1500) (425 1500)) + R(l2 (-276 -2151) (425 1500)) + R(l2 (-400 -1500) (425 1500)) ) N(2 I(OUT) R(l8 (1810 1770) (180 180)) @@ -138,9 +138,9 @@ J( R(l11 (-1751 1099) (300 1400)) R(l11 (1100 -1700) (300 300)) R(l11 (-300 0) (300 1400)) - R(l1 (-375 -1450) (425 1500)) - R(l1 (-1800 -1500) (425 1500)) - R(l5 (950 -4890) (425 950)) + R(l2 (-375 -1450) (425 1500)) + R(l2 (-1800 -1500) (425 1500)) + R(l6 (950 -4890) (425 950)) ) N(3 I(VSS) R(l8 (410 1770) (180 180)) @@ -148,7 +148,7 @@ J( R(l11 (-240 -1300) (300 1360)) R(l11 (-650 -2160) (2400 800)) R(l11 (-1151 -401) (2 2)) - R(l5 (-951 859) (425 950)) + R(l6 (-951 859) (425 950)) ) N(4 R(l3 (-100 4500) (2600 3500)) @@ -175,8 +175,8 @@ J( ) N(7 I(SUBSTRATE)) N(8 - R(l5 (975 1660) (425 950)) - R(l5 (-400 -950) (425 950)) + R(l6 (975 1660) (425 950)) + R(l6 (-400 -950) (425 950)) ) P(1 I(VDD)) P(2 I(OUT)) @@ -248,7 +248,7 @@ J( R(l11 (-650 300) (1800 800)) R(l11 (-1450 -1100) (300 300)) R(l11 (299 399) (2 2)) - R(l1 (-651 -2151) (425 1500)) + R(l2 (-651 -2151) (425 1500)) ) N(2 I(OUT) R(l8 (1110 5160) (180 180)) @@ -258,8 +258,8 @@ J( R(l8 (-180 370) (180 180)) R(l11 (-240 -790) (300 4790)) R(l11 (-151 -2501) (2 2)) - R(l1 (-226 1049) (425 1500)) - R(l5 (-425 -4890) (425 950)) + R(l2 (-226 1049) (425 1500)) + R(l6 (-425 -4890) (425 950)) ) N(3 I(VSS) R(l8 (410 1770) (180 180)) @@ -267,7 +267,7 @@ J( R(l11 (-240 -1300) (300 1360)) R(l11 (-650 -2160) (1800 800)) R(l11 (-851 -401) (2 2)) - R(l5 (-651 859) (425 950)) + R(l6 (-651 859) (425 950)) ) N(4 R(l3 (-100 4500) (2000 3500)) @@ -321,63 +321,63 @@ J( N(1 R(l8 (4710 3010) (180 180)) R(l11 (-850 -240) (610 300)) - R(l1 (-1175 1800) (425 1500)) - R(l1 (-1800 -1500) (425 1500)) - R(l5 (950 -4890) (425 950)) + R(l2 (-1175 1800) (425 1500)) + R(l2 (-1800 -1500) (425 1500)) + R(l6 (950 -4890) (425 950)) ) N(2 R(l8 (6510 3010) (180 180)) R(l11 (-1140 -240) (900 300)) - R(l1 (-1275 1800) (425 1500)) - R(l5 (-425 -4890) (425 950)) + R(l2 (-1275 1800) (425 1500)) + R(l6 (-425 -4890) (425 950)) ) N(3 R(l8 (8310 3010) (180 180)) R(l11 (-1140 -240) (900 300)) - R(l1 (-1275 1800) (425 1500)) - R(l5 (-425 -4890) (425 950)) + R(l2 (-1275 1800) (425 1500)) + R(l6 (-425 -4890) (425 950)) ) N(4 R(l8 (10110 3010) (180 180)) R(l11 (-1140 -240) (900 300)) - R(l1 (-1275 1800) (425 1500)) - R(l5 (-425 -4890) (425 950)) + R(l2 (-1275 1800) (425 1500)) + R(l6 (-425 -4890) (425 950)) ) N(5 R(l8 (11910 3010) (180 180)) R(l11 (-1140 -240) (900 300)) - R(l1 (-1275 1800) (425 1500)) - R(l5 (-425 -4890) (425 950)) + R(l2 (-1275 1800) (425 1500)) + R(l6 (-425 -4890) (425 950)) ) N(6 R(l8 (13710 3010) (180 180)) R(l11 (-1140 -240) (900 300)) - R(l1 (-1275 1800) (425 1500)) - R(l5 (-425 -4890) (425 950)) + R(l2 (-1275 1800) (425 1500)) + R(l6 (-425 -4890) (425 950)) ) N(7 R(l8 (15510 3010) (180 180)) R(l11 (-1140 -240) (900 300)) - R(l1 (-1275 1800) (425 1500)) - R(l5 (-425 -4890) (425 950)) + R(l2 (-1275 1800) (425 1500)) + R(l6 (-425 -4890) (425 950)) ) N(8 R(l8 (17310 3010) (180 180)) R(l11 (-1140 -240) (900 300)) - R(l1 (-1275 1800) (425 1500)) - R(l5 (-425 -4890) (425 950)) + R(l2 (-1275 1800) (425 1500)) + R(l6 (-425 -4890) (425 950)) ) N(9 R(l8 (19110 3010) (180 180)) R(l11 (-1140 -240) (900 300)) - R(l1 (-1275 1800) (425 1500)) - R(l5 (-425 -4890) (425 950)) + R(l2 (-1275 1800) (425 1500)) + R(l6 (-425 -4890) (425 950)) ) N(10 R(l8 (20910 3010) (180 180)) R(l11 (-1140 -240) (900 300)) - R(l1 (-1275 1800) (425 1500)) - R(l5 (-425 -4890) (425 950)) + R(l2 (-1275 1800) (425 1500)) + R(l6 (-425 -4890) (425 950)) ) N(11 I(FB) R(l8 (22710 3010) (180 180)) @@ -391,8 +391,8 @@ J( R(l13 (-17921 -201) (2 2)) R(l13 (-221 -201) (400 400)) R(l13 (17740 -400) (400 400)) - R(l1 (-245 850) (425 1500)) - R(l5 (-425 -4890) (425 950)) + R(l2 (-245 850) (425 1500)) + R(l6 (-425 -4890) (425 950)) ) N(12 I(VDD) R(l3 (500 4500) (1400 3500)) @@ -414,19 +414,19 @@ J( R(l11 (-750 -1450) (300 1400)) R(l11 (-101 -351) (2 2)) R(l11 (549 -401) (600 800)) - R(l1 (-23025 -2550) (425 1500)) - R(l1 (-400 -1500) (425 1500)) - R(l1 (1275 -1500) (425 1500)) - R(l1 (1375 -1500) (425 1500)) - R(l1 (1375 -1500) (425 1500)) - R(l1 (1375 -1500) (425 1500)) - R(l1 (1375 -1500) (425 1500)) - R(l1 (1375 -1500) (425 1500)) - R(l1 (1375 -1500) (425 1500)) - R(l1 (1375 -1500) (425 1500)) - R(l1 (1375 -1500) (425 1500)) - R(l1 (1375 -1500) (425 1500)) - R(l1 (1375 -1500) (425 1500)) + R(l2 (-23025 -2550) (425 1500)) + R(l2 (-400 -1500) (425 1500)) + R(l2 (1275 -1500) (425 1500)) + R(l2 (1375 -1500) (425 1500)) + R(l2 (1375 -1500) (425 1500)) + R(l2 (1375 -1500) (425 1500)) + R(l2 (1375 -1500) (425 1500)) + R(l2 (1375 -1500) (425 1500)) + R(l2 (1375 -1500) (425 1500)) + R(l2 (1375 -1500) (425 1500)) + R(l2 (1375 -1500) (425 1500)) + R(l2 (1375 -1500) (425 1500)) + R(l2 (1375 -1500) (425 1500)) R(l9 (-21975 -450) (500 1500)) R(l9 (22900 -1500) (500 1500)) ) @@ -435,8 +435,8 @@ J( R(l12 (-260 -260) (200 200)) R(l13 (-101 -101) (2 2)) R(l13 (-201 -201) (400 400)) - R(l1 (-625 850) (425 1500)) - R(l5 (-425 -4890) (425 950)) + R(l2 (-625 850) (425 1500)) + R(l6 (-425 -4890) (425 950)) ) N(14 I(ENABLE) R(l8 (2510 3010) (180 180)) @@ -461,18 +461,18 @@ J( R(l11 (-750 -1450) (1200 800)) R(l11 (-551 -401) (2 2)) R(l11 (549 -401) (600 800)) - R(l5 (-23700 460) (425 950)) - R(l5 (1975 -950) (425 950)) - R(l5 (1375 -950) (425 950)) - R(l5 (1375 -950) (425 950)) - R(l5 (1375 -950) (425 950)) - R(l5 (1375 -950) (425 950)) - R(l5 (1375 -950) (425 950)) - R(l5 (1375 -950) (425 950)) - R(l5 (1375 -950) (425 950)) - R(l5 (1375 -950) (425 950)) - R(l5 (1375 -950) (425 950)) - R(l5 (1375 -950) (425 950)) + R(l6 (-23700 460) (425 950)) + R(l6 (1975 -950) (425 950)) + R(l6 (1375 -950) (425 950)) + R(l6 (1375 -950) (425 950)) + R(l6 (1375 -950) (425 950)) + R(l6 (1375 -950) (425 950)) + R(l6 (1375 -950) (425 950)) + R(l6 (1375 -950) (425 950)) + R(l6 (1375 -950) (425 950)) + R(l6 (1375 -950) (425 950)) + R(l6 (1375 -950) (425 950)) + R(l6 (1375 -950) (425 950)) R(l10 (-21975 -2210) (500 1500)) R(l10 (22900 -1500) (500 1500)) ) diff --git a/testdata/lvs/ringo_simple_io2.lvsdb.2 b/testdata/lvs/ringo_simple_io2.lvsdb.2 index 2d8585635..f2c7faaff 100644 --- a/testdata/lvs/ringo_simple_io2.lvsdb.2 +++ b/testdata/lvs/ringo_simple_io2.lvsdb.2 @@ -16,22 +16,22 @@ layout( layer(l12 '10/0') layer(l13 '11/0') layer(l7) - layer(l1) + layer(l2) layer(l9) - layer(l5) + layer(l6) layer(l10) # Mask layer connectivity connect(l3 l3 l9) connect(l4 l4 l8) - connect(l8 l4 l8 l11 l1 l9 l5 l10) + connect(l8 l4 l8 l11 l2 l9 l6 l10) connect(l11 l8 l11 l12) connect(l12 l11 l12 l13) connect(l13 l12 l13) connect(l7 l7) - connect(l1 l8 l1) + connect(l2 l8 l2) connect(l9 l3 l8 l9) - connect(l5 l8 l5) + connect(l6 l8 l6) connect(l10 l8 l10) # Global nets and connectivity @@ -46,13 +46,13 @@ layout( # Device abstracts list the pin shapes of the devices. device(D$PMOS PMOS terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (450 1500)) + rect(l2 (125 -750) (450 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -60,13 +60,13 @@ layout( ) device(D$PMOS$1 PMOS terminal(S - rect(l1 (-575 -750) (450 1500)) + rect(l2 (-575 -750) (450 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -74,13 +74,13 @@ layout( ) device(D$PMOS$2 PMOS terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -88,13 +88,13 @@ layout( ) device(D$NMOS NMOS terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (450 950)) + rect(l6 (125 -475) (450 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -102,13 +102,13 @@ layout( ) device(D$NMOS$1 NMOS terminal(S - rect(l5 (-575 -475) (450 950)) + rect(l6 (-575 -475) (450 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -116,13 +116,13 @@ layout( ) device(D$NMOS$2 NMOS terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l1 (-276 -2151) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) + rect(l2 (-276 -2151) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -163,9 +163,9 @@ layout( rect(l11 (-1751 1099) (300 1400)) rect(l11 (1100 -1700) (300 300)) rect(l11 (-300 0) (300 1400)) - rect(l1 (-375 -1450) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-375 -1450) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -173,7 +173,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l5 (-951 859) (425 950)) + rect(l6 (-951 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2600 3500)) @@ -200,8 +200,8 @@ layout( ) net(7 name(SUBSTRATE)) net(8 - rect(l5 (975 1660) (425 950)) - rect(l5 (-400 -950) (425 950)) + rect(l6 (975 1660) (425 950)) + rect(l6 (-400 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -282,7 +282,7 @@ layout( rect(l11 (-650 300) (1800 800)) rect(l11 (-1450 -1100) (300 300)) rect(l11 (299 399) (2 2)) - rect(l1 (-651 -2151) (425 1500)) + rect(l2 (-651 -2151) (425 1500)) ) net(2 name(OUT) rect(l8 (1110 5160) (180 180)) @@ -292,8 +292,8 @@ layout( rect(l8 (-180 370) (180 180)) rect(l11 (-240 -790) (300 4790)) rect(l11 (-151 -2501) (2 2)) - rect(l1 (-226 1049) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-226 1049) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -301,7 +301,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (1800 800)) rect(l11 (-851 -401) (2 2)) - rect(l5 (-651 859) (425 950)) + rect(l6 (-651 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2000 3500)) @@ -364,63 +364,63 @@ layout( net(1 rect(l8 (4710 3010) (180 180)) rect(l11 (-850 -240) (610 300)) - rect(l1 (-1175 1800) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-1175 1800) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(2 rect(l8 (6510 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 rect(l8 (8310 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(4 rect(l8 (10110 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(5 rect(l8 (11910 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(6 rect(l8 (13710 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(7 rect(l8 (15510 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(8 rect(l8 (17310 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(9 rect(l8 (19110 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(10 rect(l8 (20910 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(11 name(FB) rect(l8 (22710 3010) (180 180)) @@ -434,8 +434,8 @@ layout( rect(l13 (-17921 -201) (2 2)) rect(l13 (-221 -201) (400 400)) rect(l13 (17740 -400) (400 400)) - rect(l1 (-245 850) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-245 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(12 name(VDD) rect(l3 (500 4500) (1400 3500)) @@ -457,19 +457,19 @@ layout( rect(l11 (-750 -1450) (300 1400)) rect(l11 (-101 -351) (2 2)) rect(l11 (549 -401) (600 800)) - rect(l1 (-23025 -2550) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) - rect(l1 (1275 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) + rect(l2 (-23025 -2550) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + rect(l2 (1275 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) rect(l9 (-21975 -450) (500 1500)) rect(l9 (22900 -1500) (500 1500)) ) @@ -478,8 +478,8 @@ layout( rect(l12 (-260 -260) (200 200)) rect(l13 (-101 -101) (2 2)) rect(l13 (-201 -201) (400 400)) - rect(l1 (-625 850) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-625 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(14 name(ENABLE) rect(l8 (2510 3010) (180 180)) @@ -504,18 +504,18 @@ layout( rect(l11 (-750 -1450) (1200 800)) rect(l11 (-551 -401) (2 2)) rect(l11 (549 -401) (600 800)) - rect(l5 (-23700 460) (425 950)) - rect(l5 (1975 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) + rect(l6 (-23700 460) (425 950)) + rect(l6 (1975 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) rect(l10 (-21975 -2210) (500 1500)) rect(l10 (22900 -1500) (500 1500)) ) diff --git a/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.2 b/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.2 index 4930f20f1..90a1f93f2 100644 --- a/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.2 +++ b/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.2 @@ -16,22 +16,22 @@ layout( layer(l12 '10/0') layer(l13 '11/0') layer(l7) - layer(l1) + layer(l2) layer(l9) - layer(l5) + layer(l6) layer(l10) # Mask layer connectivity connect(l3 l3 l9) connect(l4 l4 l8) - connect(l8 l4 l8 l11 l1 l9 l5 l10) + connect(l8 l4 l8 l11 l2 l9 l6 l10) connect(l11 l8 l11 l12) connect(l12 l11 l12 l13) connect(l13 l12 l13) connect(l7 l7) - connect(l1 l8 l1) + connect(l2 l8 l2) connect(l9 l3 l8 l9) - connect(l5 l8 l5) + connect(l6 l8 l6) connect(l10 l8 l10) # Global nets and connectivity @@ -46,13 +46,13 @@ layout( # Device abstracts list the pin shapes of the devices. device(D$PMOS PMOS terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (450 1500)) + rect(l2 (125 -750) (450 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -60,13 +60,13 @@ layout( ) device(D$PMOS$1 PMOS terminal(S - rect(l1 (-575 -750) (450 1500)) + rect(l2 (-575 -750) (450 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -74,13 +74,13 @@ layout( ) device(D$PMOS$2 PMOS terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -88,13 +88,13 @@ layout( ) device(D$NMOS NMOS terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (450 950)) + rect(l6 (125 -475) (450 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -102,13 +102,13 @@ layout( ) device(D$NMOS$1 NMOS terminal(S - rect(l5 (-575 -475) (450 950)) + rect(l6 (-575 -475) (450 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -116,13 +116,13 @@ layout( ) device(D$NMOS$2 NMOS terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l1 (-276 -2151) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) + rect(l2 (-276 -2151) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -163,9 +163,9 @@ layout( rect(l11 (-1751 1099) (300 1400)) rect(l11 (1100 -1700) (300 300)) rect(l11 (-300 0) (300 1400)) - rect(l1 (-375 -1450) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-375 -1450) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -173,7 +173,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l5 (-951 859) (425 950)) + rect(l6 (-951 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2600 3500)) @@ -200,8 +200,8 @@ layout( ) net(7 name(SUBSTRATE)) net(8 - rect(l5 (975 1660) (425 950)) - rect(l5 (-400 -950) (425 950)) + rect(l6 (975 1660) (425 950)) + rect(l6 (-400 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -282,7 +282,7 @@ layout( rect(l11 (-650 300) (1800 800)) rect(l11 (-1450 -1100) (300 300)) rect(l11 (299 399) (2 2)) - rect(l1 (-651 -2151) (425 1500)) + rect(l2 (-651 -2151) (425 1500)) ) net(2 name(OUT) rect(l8 (1110 5160) (180 180)) @@ -292,8 +292,8 @@ layout( rect(l8 (-180 370) (180 180)) rect(l11 (-240 -790) (300 4790)) rect(l11 (-151 -2501) (2 2)) - rect(l1 (-226 1049) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-226 1049) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -301,7 +301,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (1800 800)) rect(l11 (-851 -401) (2 2)) - rect(l5 (-651 859) (425 950)) + rect(l6 (-651 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2000 3500)) @@ -364,63 +364,63 @@ layout( net(1 rect(l8 (4710 3010) (180 180)) rect(l11 (-850 -240) (610 300)) - rect(l1 (-1175 1800) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-1175 1800) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(2 rect(l8 (6510 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 rect(l8 (8310 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(4 rect(l8 (10110 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(5 rect(l8 (11910 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(6 rect(l8 (13710 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(7 rect(l8 (15510 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(8 rect(l8 (17310 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(9 rect(l8 (19110 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(10 rect(l8 (20910 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(11 name(FB) rect(l8 (22710 3010) (180 180)) @@ -434,8 +434,8 @@ layout( rect(l13 (-17921 -201) (2 2)) rect(l13 (-221 -201) (400 400)) rect(l13 (17740 -400) (400 400)) - rect(l1 (-245 850) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-245 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(12 name(VDD) rect(l3 (500 4500) (1400 3500)) @@ -457,19 +457,19 @@ layout( rect(l11 (-750 -1450) (300 1400)) rect(l11 (-101 -351) (2 2)) rect(l11 (549 -401) (600 800)) - rect(l1 (-23025 -2550) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) - rect(l1 (1275 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) + rect(l2 (-23025 -2550) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + rect(l2 (1275 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) rect(l9 (-21975 -450) (500 1500)) rect(l9 (22900 -1500) (500 1500)) ) @@ -478,8 +478,8 @@ layout( rect(l12 (-260 -260) (200 200)) rect(l13 (-101 -101) (2 2)) rect(l13 (-201 -201) (400 400)) - rect(l1 (-625 850) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-625 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(14 name(ENABLE) rect(l8 (2510 3010) (180 180)) @@ -504,18 +504,18 @@ layout( rect(l11 (-750 -1450) (1200 800)) rect(l11 (-551 -401) (2 2)) rect(l11 (549 -401) (600 800)) - rect(l5 (-23700 460) (425 950)) - rect(l5 (1975 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) + rect(l6 (-23700 460) (425 950)) + rect(l6 (1975 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) rect(l10 (-21975 -2210) (500 1500)) rect(l10 (22900 -1500) (500 1500)) ) diff --git a/testdata/lvs/ringo_simple_pin_swapping.lvsdb.2 b/testdata/lvs/ringo_simple_pin_swapping.lvsdb.2 index 57fb8a644..485061c1e 100644 --- a/testdata/lvs/ringo_simple_pin_swapping.lvsdb.2 +++ b/testdata/lvs/ringo_simple_pin_swapping.lvsdb.2 @@ -16,22 +16,22 @@ layout( layer(l12 '10/0') layer(l13 '11/0') layer(l7) - layer(l1) + layer(l2) layer(l9) - layer(l5) + layer(l6) layer(l10) # Mask layer connectivity connect(l3 l3 l9) connect(l4 l4 l8) - connect(l8 l4 l8 l11 l1 l9 l5 l10) + connect(l8 l4 l8 l11 l2 l9 l6 l10) connect(l11 l8 l11 l12) connect(l12 l11 l12 l13) connect(l13 l12 l13) connect(l7 l7) - connect(l1 l8 l1) + connect(l2 l8 l2) connect(l9 l3 l8 l9) - connect(l5 l8 l5) + connect(l6 l8 l6) connect(l10 l8 l10) # Global nets and connectivity @@ -46,13 +46,13 @@ layout( # Device abstracts list the pin shapes of the devices. device(D$PMOS PMOS terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (450 1500)) + rect(l2 (125 -750) (450 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -60,13 +60,13 @@ layout( ) device(D$PMOS$1 PMOS terminal(S - rect(l1 (-575 -750) (450 1500)) + rect(l2 (-575 -750) (450 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -74,13 +74,13 @@ layout( ) device(D$PMOS$2 PMOS terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -88,13 +88,13 @@ layout( ) device(D$NMOS NMOS terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (450 950)) + rect(l6 (125 -475) (450 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -102,13 +102,13 @@ layout( ) device(D$NMOS$1 NMOS terminal(S - rect(l5 (-575 -475) (450 950)) + rect(l6 (-575 -475) (450 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -116,13 +116,13 @@ layout( ) device(D$NMOS$2 NMOS terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l1 (-276 -2151) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) + rect(l2 (-276 -2151) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -163,9 +163,9 @@ layout( rect(l11 (-1751 1099) (300 1400)) rect(l11 (1100 -1700) (300 300)) rect(l11 (-300 0) (300 1400)) - rect(l1 (-375 -1450) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-375 -1450) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -173,7 +173,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l5 (-951 859) (425 950)) + rect(l6 (-951 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2600 3500)) @@ -200,8 +200,8 @@ layout( ) net(7 name(SUBSTRATE)) net(8 - rect(l5 (975 1660) (425 950)) - rect(l5 (-400 -950) (425 950)) + rect(l6 (975 1660) (425 950)) + rect(l6 (-400 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -282,7 +282,7 @@ layout( rect(l11 (-650 300) (1800 800)) rect(l11 (-1450 -1100) (300 300)) rect(l11 (299 399) (2 2)) - rect(l1 (-651 -2151) (425 1500)) + rect(l2 (-651 -2151) (425 1500)) ) net(2 name(OUT) rect(l8 (1110 5160) (180 180)) @@ -292,8 +292,8 @@ layout( rect(l8 (-180 370) (180 180)) rect(l11 (-240 -790) (300 4790)) rect(l11 (-151 -2501) (2 2)) - rect(l1 (-226 1049) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-226 1049) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -301,7 +301,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (1800 800)) rect(l11 (-851 -401) (2 2)) - rect(l5 (-651 859) (425 950)) + rect(l6 (-651 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2000 3500)) @@ -364,63 +364,63 @@ layout( net(1 rect(l8 (4710 3010) (180 180)) rect(l11 (-850 -240) (610 300)) - rect(l1 (-1175 1800) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-1175 1800) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(2 rect(l8 (6510 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 rect(l8 (8310 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(4 rect(l8 (10110 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(5 rect(l8 (11910 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(6 rect(l8 (13710 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(7 rect(l8 (15510 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(8 rect(l8 (17310 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(9 rect(l8 (19110 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(10 rect(l8 (20910 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(11 name(FB) rect(l8 (22710 3010) (180 180)) @@ -434,8 +434,8 @@ layout( rect(l13 (-17921 -201) (2 2)) rect(l13 (-221 -201) (400 400)) rect(l13 (17740 -400) (400 400)) - rect(l1 (-245 850) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-245 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(12 name(VDD) rect(l3 (500 4500) (1400 3500)) @@ -457,19 +457,19 @@ layout( rect(l11 (-750 -1450) (300 1400)) rect(l11 (-101 -351) (2 2)) rect(l11 (549 -401) (600 800)) - rect(l1 (-23025 -2550) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) - rect(l1 (1275 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) + rect(l2 (-23025 -2550) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + rect(l2 (1275 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) rect(l9 (-21975 -450) (500 1500)) rect(l9 (22900 -1500) (500 1500)) ) @@ -478,8 +478,8 @@ layout( rect(l12 (-260 -260) (200 200)) rect(l13 (-101 -101) (2 2)) rect(l13 (-201 -201) (400 400)) - rect(l1 (-625 850) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-625 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(14 name(ENABLE) rect(l8 (2510 3010) (180 180)) @@ -504,18 +504,18 @@ layout( rect(l11 (-750 -1450) (1200 800)) rect(l11 (-551 -401) (2 2)) rect(l11 (549 -401) (600 800)) - rect(l5 (-23700 460) (425 950)) - rect(l5 (1975 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) + rect(l6 (-23700 460) (425 950)) + rect(l6 (1975 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) rect(l10 (-21975 -2210) (500 1500)) rect(l10 (22900 -1500) (500 1500)) ) diff --git a/testdata/lvs/ringo_simple_same_device_classes.lvsdb.2 b/testdata/lvs/ringo_simple_same_device_classes.lvsdb.2 index 847ff7f63..563c58ad4 100644 --- a/testdata/lvs/ringo_simple_same_device_classes.lvsdb.2 +++ b/testdata/lvs/ringo_simple_same_device_classes.lvsdb.2 @@ -16,22 +16,22 @@ layout( layer(l12 '10/0') layer(l13 '11/0') layer(l7) - layer(l1) + layer(l2) layer(l9) - layer(l5) + layer(l6) layer(l10) # Mask layer connectivity connect(l3 l3 l9) connect(l4 l4 l8) - connect(l8 l4 l8 l11 l1 l9 l5 l10) + connect(l8 l4 l8 l11 l2 l9 l6 l10) connect(l11 l8 l11 l12) connect(l12 l11 l12 l13) connect(l13 l12 l13) connect(l7 l7) - connect(l1 l8 l1) + connect(l2 l8 l2) connect(l9 l3 l8 l9) - connect(l5 l8 l5) + connect(l6 l8 l6) connect(l10 l8 l10) # Global nets and connectivity @@ -46,13 +46,13 @@ layout( # Device abstracts list the pin shapes of the devices. device(D$PM PM terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (450 1500)) + rect(l2 (125 -750) (450 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -60,13 +60,13 @@ layout( ) device(D$PM$1 PM terminal(S - rect(l1 (-575 -750) (450 1500)) + rect(l2 (-575 -750) (450 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -74,13 +74,13 @@ layout( ) device(D$PM$2 PM terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -88,13 +88,13 @@ layout( ) device(D$NM NM terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (450 950)) + rect(l6 (125 -475) (450 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -102,13 +102,13 @@ layout( ) device(D$NM$1 NM terminal(S - rect(l5 (-575 -475) (450 950)) + rect(l6 (-575 -475) (450 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -116,13 +116,13 @@ layout( ) device(D$NM$2 NM terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l1 (-276 -2151) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) + rect(l2 (-276 -2151) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -163,9 +163,9 @@ layout( rect(l11 (-1751 1099) (300 1400)) rect(l11 (1100 -1700) (300 300)) rect(l11 (-300 0) (300 1400)) - rect(l1 (-375 -1450) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-375 -1450) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -173,7 +173,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l5 (-951 859) (425 950)) + rect(l6 (-951 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2600 3500)) @@ -200,8 +200,8 @@ layout( ) net(7 name(SUBSTRATE)) net(8 - rect(l5 (975 1660) (425 950)) - rect(l5 (-400 -950) (425 950)) + rect(l6 (975 1660) (425 950)) + rect(l6 (-400 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -282,7 +282,7 @@ layout( rect(l11 (-650 300) (1800 800)) rect(l11 (-1450 -1100) (300 300)) rect(l11 (299 399) (2 2)) - rect(l1 (-651 -2151) (425 1500)) + rect(l2 (-651 -2151) (425 1500)) ) net(2 name(OUT) rect(l8 (1110 5160) (180 180)) @@ -292,8 +292,8 @@ layout( rect(l8 (-180 370) (180 180)) rect(l11 (-240 -790) (300 4790)) rect(l11 (-151 -2501) (2 2)) - rect(l1 (-226 1049) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-226 1049) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -301,7 +301,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (1800 800)) rect(l11 (-851 -401) (2 2)) - rect(l5 (-651 859) (425 950)) + rect(l6 (-651 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2000 3500)) @@ -364,63 +364,63 @@ layout( net(1 rect(l8 (4710 3010) (180 180)) rect(l11 (-850 -240) (610 300)) - rect(l1 (-1175 1800) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-1175 1800) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(2 rect(l8 (6510 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 rect(l8 (8310 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(4 rect(l8 (10110 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(5 rect(l8 (11910 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(6 rect(l8 (13710 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(7 rect(l8 (15510 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(8 rect(l8 (17310 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(9 rect(l8 (19110 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(10 rect(l8 (20910 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(11 name(FB) rect(l8 (22710 3010) (180 180)) @@ -434,8 +434,8 @@ layout( rect(l13 (-17921 -201) (2 2)) rect(l13 (-221 -201) (400 400)) rect(l13 (17740 -400) (400 400)) - rect(l1 (-245 850) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-245 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(12 name(VDD) rect(l3 (500 4500) (1400 3500)) @@ -457,19 +457,19 @@ layout( rect(l11 (-750 -1450) (300 1400)) rect(l11 (-101 -351) (2 2)) rect(l11 (549 -401) (600 800)) - rect(l1 (-23025 -2550) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) - rect(l1 (1275 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) + rect(l2 (-23025 -2550) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + rect(l2 (1275 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) rect(l9 (-21975 -450) (500 1500)) rect(l9 (22900 -1500) (500 1500)) ) @@ -478,8 +478,8 @@ layout( rect(l12 (-260 -260) (200 200)) rect(l13 (-101 -101) (2 2)) rect(l13 (-201 -201) (400 400)) - rect(l1 (-625 850) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-625 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(14 name(ENABLE) rect(l8 (2510 3010) (180 180)) @@ -504,18 +504,18 @@ layout( rect(l11 (-750 -1450) (1200 800)) rect(l11 (-551 -401) (2 2)) rect(l11 (549 -401) (600 800)) - rect(l5 (-23700 460) (425 950)) - rect(l5 (1975 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) + rect(l6 (-23700 460) (425 950)) + rect(l6 (1975 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) rect(l10 (-21975 -2210) (500 1500)) rect(l10 (22900 -1500) (500 1500)) ) diff --git a/testdata/lvs/ringo_simple_simplification.lvsdb.2 b/testdata/lvs/ringo_simple_simplification.lvsdb.2 index 169191238..7e1cde7c1 100644 --- a/testdata/lvs/ringo_simple_simplification.lvsdb.2 +++ b/testdata/lvs/ringo_simple_simplification.lvsdb.2 @@ -16,22 +16,22 @@ layout( layer(l12 '10/0') layer(l13 '11/0') layer(l7) - layer(l1) + layer(l2) layer(l9) - layer(l5) + layer(l6) layer(l10) # Mask layer connectivity connect(l3 l3 l9) connect(l4 l4 l8) - connect(l8 l4 l8 l11 l1 l9 l5 l10) + connect(l8 l4 l8 l11 l2 l9 l6 l10) connect(l11 l8 l11 l12) connect(l12 l11 l12 l13) connect(l13 l12 l13) connect(l7 l7) - connect(l1 l8 l1) + connect(l2 l8 l2) connect(l9 l3 l8 l9) - connect(l5 l8 l5) + connect(l6 l8 l6) connect(l10 l8 l10) # Global nets and connectivity @@ -46,13 +46,13 @@ layout( # Device abstracts list the pin shapes of the devices. device(D$PMOS PMOS terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (450 1500)) + rect(l2 (125 -750) (450 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -60,13 +60,13 @@ layout( ) device(D$PMOS$1 PMOS terminal(S - rect(l1 (-575 -750) (450 1500)) + rect(l2 (-575 -750) (450 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -74,13 +74,13 @@ layout( ) device(D$PMOS$2 PMOS terminal(S - rect(l1 (-550 -750) (425 1500)) + rect(l2 (-550 -750) (425 1500)) ) terminal(G rect(l4 (-125 -750) (250 1500)) ) terminal(D - rect(l1 (125 -750) (425 1500)) + rect(l2 (125 -750) (425 1500)) ) terminal(B rect(l3 (-125 -750) (250 1500)) @@ -88,13 +88,13 @@ layout( ) device(D$NMOS NMOS terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (450 950)) + rect(l6 (125 -475) (450 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -102,13 +102,13 @@ layout( ) device(D$NMOS$1 NMOS terminal(S - rect(l5 (-575 -475) (450 950)) + rect(l6 (-575 -475) (450 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -116,13 +116,13 @@ layout( ) device(D$NMOS$2 NMOS terminal(S - rect(l5 (-550 -475) (425 950)) + rect(l6 (-550 -475) (425 950)) ) terminal(G rect(l4 (-125 -475) (250 950)) ) terminal(D - rect(l5 (125 -475) (425 950)) + rect(l6 (125 -475) (425 950)) ) terminal(B rect(l7 (-125 -475) (250 950)) @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l1 (-276 -2151) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) + rect(l2 (-276 -2151) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -163,9 +163,9 @@ layout( rect(l11 (-1751 1099) (300 1400)) rect(l11 (1100 -1700) (300 300)) rect(l11 (-300 0) (300 1400)) - rect(l1 (-375 -1450) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-375 -1450) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -173,7 +173,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (2400 800)) rect(l11 (-1151 -401) (2 2)) - rect(l5 (-951 859) (425 950)) + rect(l6 (-951 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2600 3500)) @@ -200,8 +200,8 @@ layout( ) net(7 name(SUBSTRATE)) net(8 - rect(l5 (975 1660) (425 950)) - rect(l5 (-400 -950) (425 950)) + rect(l6 (975 1660) (425 950)) + rect(l6 (-400 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -282,7 +282,7 @@ layout( rect(l11 (-650 300) (1800 800)) rect(l11 (-1450 -1100) (300 300)) rect(l11 (299 399) (2 2)) - rect(l1 (-651 -2151) (425 1500)) + rect(l2 (-651 -2151) (425 1500)) ) net(2 name(OUT) rect(l8 (1110 5160) (180 180)) @@ -292,8 +292,8 @@ layout( rect(l8 (-180 370) (180 180)) rect(l11 (-240 -790) (300 4790)) rect(l11 (-151 -2501) (2 2)) - rect(l1 (-226 1049) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-226 1049) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 name(VSS) rect(l8 (410 1770) (180 180)) @@ -301,7 +301,7 @@ layout( rect(l11 (-240 -1300) (300 1360)) rect(l11 (-650 -2160) (1800 800)) rect(l11 (-851 -401) (2 2)) - rect(l5 (-651 859) (425 950)) + rect(l6 (-651 859) (425 950)) ) net(4 rect(l3 (-100 4500) (2000 3500)) @@ -389,8 +389,8 @@ layout( rect(l11 (1100 -300) (300 300)) rect(l11 (-1101 399) (2 2)) rect(l11 (799 -2101) (300 1400)) - rect(l1 (-375 -1450) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) + rect(l2 (-375 -1450) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) ) net(3 name(OUT) rect(l8 (1110 5160) (180 180)) @@ -400,10 +400,10 @@ layout( rect(l8 (-180 370) (180 180)) rect(l11 (-240 -790) (300 4790)) rect(l11 (-151 -2501) (2 2)) - rect(l1 (-226 1049) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) - rect(l5 (-450 -4890) (425 950)) - rect(l5 (-400 -950) (425 950)) + rect(l2 (-226 1049) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + rect(l6 (-450 -4890) (425 950)) + rect(l6 (-400 -950) (425 950)) ) net(4 name(VSS) rect(l8 (410 1770) (180 180)) @@ -414,8 +414,8 @@ layout( rect(l11 (-650 -2160) (2400 800)) rect(l11 (-650 0) (300 1360)) rect(l11 (-1101 -1761) (2 2)) - rect(l5 (724 859) (425 950)) - rect(l5 (-1800 -950) (425 950)) + rect(l6 (724 859) (425 950)) + rect(l6 (-1800 -950) (425 950)) ) net(5 rect(l3 (-100 4500) (2600 3500)) @@ -486,27 +486,27 @@ layout( net(1 rect(l8 (4710 3010) (180 180)) rect(l11 (-850 -240) (610 300)) - rect(l1 (-1175 1800) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l5 (950 -4890) (425 950)) + rect(l2 (-1175 1800) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) ) net(2 rect(l8 (6510 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(3 rect(l8 (19110 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(4 rect(l8 (20910 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(5 name(FB) rect(l8 (22710 3010) (180 180)) @@ -520,8 +520,8 @@ layout( rect(l13 (-17921 -201) (2 2)) rect(l13 (-221 -201) (400 400)) rect(l13 (17740 -400) (400 400)) - rect(l1 (-245 850) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-245 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(6 name(VDD) rect(l3 (1100 4500) (1400 3500)) @@ -543,20 +543,20 @@ layout( rect(l11 (-750 -1450) (300 1400)) rect(l11 (-101 -351) (2 2)) rect(l11 (549 -401) (600 800)) - rect(l1 (-23625 -2550) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) - rect(l1 (1275 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (3175 -1500) (425 1500)) - rect(l1 (-2225 -1500) (425 1500)) - rect(l1 (3175 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (1375 -1500) (425 1500)) - rect(l1 (4550 -1500) (425 1500)) - rect(l1 (-1800 -1500) (425 1500)) - rect(l1 (-2225 -1500) (425 1500)) + rect(l2 (-23625 -2550) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + rect(l2 (1275 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (3175 -1500) (425 1500)) + rect(l2 (-2225 -1500) (425 1500)) + rect(l2 (3175 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (4550 -1500) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l2 (-2225 -1500) (425 1500)) rect(l9 (-19575 -450) (500 1500)) rect(l9 (22900 -1500) (500 1500)) ) @@ -565,10 +565,10 @@ layout( rect(l12 (-260 -260) (200 200)) rect(l13 (-101 -101) (2 2)) rect(l13 (-201 -201) (400 400)) - rect(l1 (-625 850) (425 1500)) - rect(l1 (-400 -1500) (425 1500)) - rect(l5 (-450 -4890) (425 950)) - rect(l5 (-400 -950) (425 950)) + rect(l2 (-625 850) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + rect(l6 (-450 -4890) (425 950)) + rect(l6 (-400 -950) (425 950)) ) net(8 name(ENABLE) rect(l8 (2510 3010) (180 180)) @@ -593,33 +593,33 @@ layout( rect(l11 (-750 -1450) (1200 800)) rect(l11 (-551 -401) (2 2)) rect(l11 (549 -401) (600 800)) - rect(l5 (-24300 460) (425 950)) - rect(l5 (1975 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (3175 -950) (425 950)) - rect(l5 (-2225 -950) (425 950)) - rect(l5 (3175 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (1375 -950) (425 950)) - rect(l5 (4550 -950) (425 950)) - rect(l5 (-1800 -950) (425 950)) - rect(l5 (-2225 -950) (425 950)) + rect(l6 (-24300 460) (425 950)) + rect(l6 (1975 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (3175 -950) (425 950)) + rect(l6 (-2225 -950) (425 950)) + rect(l6 (3175 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (4550 -950) (425 950)) + rect(l6 (-1800 -950) (425 950)) + rect(l6 (-2225 -950) (425 950)) rect(l10 (-19575 -2210) (500 1500)) rect(l10 (22900 -1500) (500 1500)) ) net(10 rect(l8 (8310 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(11 rect(l8 (17310 3010) (180 180)) rect(l11 (-1140 -240) (900 300)) - rect(l1 (-1275 1800) (425 1500)) - rect(l5 (-425 -4890) (425 950)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) ) net(12) net(13) diff --git a/testdata/lvs/ringo_simple_simplification_with_align.lvsdb b/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.1 similarity index 100% rename from testdata/lvs/ringo_simple_simplification_with_align.lvsdb rename to testdata/lvs/ringo_simple_simplification_with_align.lvsdb.1 diff --git a/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.2 b/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.2 new file mode 100644 index 000000000..7e1cde7c1 --- /dev/null +++ b/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.2 @@ -0,0 +1,1142 @@ +#%lvsdb-klayout + +# Layout +layout( + top(RINGO) + unit(0.001) + + # Layer section + # This section lists the mask layers (drawing or derived) and their connections. + + # Mask layers + layer(l3 '1/0') + layer(l4 '5/0') + layer(l8 '8/0') + layer(l11 '9/0') + layer(l12 '10/0') + layer(l13 '11/0') + layer(l7) + layer(l2) + layer(l9) + layer(l6) + layer(l10) + + # Mask layer connectivity + connect(l3 l3 l9) + connect(l4 l4 l8) + connect(l8 l4 l8 l11 l2 l9 l6 l10) + connect(l11 l8 l11 l12) + connect(l12 l11 l12 l13) + connect(l13 l12 l13) + connect(l7 l7) + connect(l2 l8 l2) + connect(l9 l3 l8 l9) + connect(l6 l8 l6) + connect(l10 l8 l10) + + # Global nets and connectivity + global(l7 SUBSTRATE) + global(l10 SUBSTRATE) + + # Device class section + class(PMOS MOS4) + class(NMOS MOS4) + + # Device abstracts section + # Device abstracts list the pin shapes of the devices. + device(D$PMOS PMOS + terminal(S + rect(l2 (-550 -750) (425 1500)) + ) + terminal(G + rect(l4 (-125 -750) (250 1500)) + ) + terminal(D + rect(l2 (125 -750) (450 1500)) + ) + terminal(B + rect(l3 (-125 -750) (250 1500)) + ) + ) + device(D$PMOS$1 PMOS + terminal(S + rect(l2 (-575 -750) (450 1500)) + ) + terminal(G + rect(l4 (-125 -750) (250 1500)) + ) + terminal(D + rect(l2 (125 -750) (425 1500)) + ) + terminal(B + rect(l3 (-125 -750) (250 1500)) + ) + ) + device(D$PMOS$2 PMOS + terminal(S + rect(l2 (-550 -750) (425 1500)) + ) + terminal(G + rect(l4 (-125 -750) (250 1500)) + ) + terminal(D + rect(l2 (125 -750) (425 1500)) + ) + terminal(B + rect(l3 (-125 -750) (250 1500)) + ) + ) + device(D$NMOS NMOS + terminal(S + rect(l6 (-550 -475) (425 950)) + ) + terminal(G + rect(l4 (-125 -475) (250 950)) + ) + terminal(D + rect(l6 (125 -475) (450 950)) + ) + terminal(B + rect(l7 (-125 -475) (250 950)) + ) + ) + device(D$NMOS$1 NMOS + terminal(S + rect(l6 (-575 -475) (450 950)) + ) + terminal(G + rect(l4 (-125 -475) (250 950)) + ) + terminal(D + rect(l6 (125 -475) (425 950)) + ) + terminal(B + rect(l7 (-125 -475) (250 950)) + ) + ) + device(D$NMOS$2 NMOS + terminal(S + rect(l6 (-550 -475) (425 950)) + ) + terminal(G + rect(l4 (-125 -475) (250 950)) + ) + terminal(D + rect(l6 (125 -475) (425 950)) + ) + terminal(B + rect(l7 (-125 -475) (250 950)) + ) + ) + + # Circuit section + # Circuits are the hierarchical building blocks of the netlist. + circuit(ND2X1 + + # Circuit boundary + rect((-100 400) (2600 7600)) + + # Nets with their geometries + net(1 name(VDD) + rect(l8 (1110 5160) (180 180)) + rect(l8 (-180 920) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l11 (-240 -790) (300 1700)) + rect(l11 (-1350 0) (2400 800)) + rect(l11 (-1151 -401) (2 2)) + rect(l2 (-276 -2151) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + ) + net(2 name(OUT) + rect(l8 (1810 1770) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l8 (-1580 3760) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l8 (1220 920) (180 180)) + rect(l8 (-180 -1280) (180 180)) + rect(l8 (-180 370) (180 180)) + polygon(l11 (-240 -4180) (0 1390) (490 0) (0 -300) (-190 0) (0 -1090)) + rect(l11 (-110 1390) (300 1400)) + polygon(l11 (-1890 0) (0 600) (300 0) (0 -300) (1590 0) (0 -300)) + rect(l11 (-141 -501) (2 2)) + rect(l11 (-1751 1099) (300 1400)) + rect(l11 (1100 -1700) (300 300)) + rect(l11 (-300 0) (300 1400)) + rect(l2 (-375 -1450) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) + ) + net(3 name(VSS) + rect(l8 (410 1770) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l11 (-240 -1300) (300 1360)) + rect(l11 (-650 -2160) (2400 800)) + rect(l11 (-1151 -401) (2 2)) + rect(l6 (-951 859) (425 950)) + ) + net(4 + rect(l3 (-100 4500) (2600 3500)) + ) + net(5 name(B) + rect(l4 (1425 2860) (250 1940)) + rect(l4 (-345 -950) (300 300)) + rect(l4 (-205 650) (250 2000)) + rect(l4 (-250 -2000) (250 2000)) + rect(l4 (-250 -5390) (250 1450)) + rect(l8 (-285 1050) (180 180)) + rect(l11 (-71 -91) (2 2)) + rect(l11 (-171 -151) (300 300)) + ) + net(6 name(A) + rect(l4 (725 2860) (250 1940)) + rect(l4 (-325 -1850) (300 300)) + rect(l4 (-225 1550) (250 2000)) + rect(l4 (-250 -2000) (250 2000)) + rect(l4 (-250 -5390) (250 1450)) + rect(l8 (-265 150) (180 180)) + rect(l11 (-91 -91) (2 2)) + rect(l11 (-151 -151) (300 300)) + ) + net(7 name(SUBSTRATE)) + net(8 + rect(l6 (975 1660) (425 950)) + rect(l6 (-400 -950) (425 950)) + ) + + # Outgoing pins and their connections to nets + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4) + pin(5 name(B)) + pin(6 name(A)) + pin(7 name(SUBSTRATE)) + + # Devices and their connections + device(1 D$PMOS + location(850 5800) + param(L 0.25) + param(W 1.5) + param(AS 0.6375) + param(AD 0.3375) + param(PS 3.85) + param(PD 1.95) + terminal(S 2) + terminal(G 6) + terminal(D 1) + terminal(B 4) + ) + device(2 D$PMOS$1 + location(1550 5800) + param(L 0.25) + param(W 1.5) + param(AS 0.3375) + param(AD 0.6375) + param(PS 1.95) + param(PD 3.85) + terminal(S 1) + terminal(G 5) + terminal(D 2) + terminal(B 4) + ) + device(3 D$NMOS + location(850 2135) + param(L 0.25) + param(W 0.95) + param(AS 0.40375) + param(AD 0.21375) + param(PS 2.75) + param(PD 1.4) + terminal(S 3) + terminal(G 6) + terminal(D 8) + terminal(B 7) + ) + device(4 D$NMOS$1 + location(1550 2135) + param(L 0.25) + param(W 0.95) + param(AS 0.21375) + param(AD 0.40375) + param(PS 1.4) + param(PD 2.75) + terminal(S 8) + terminal(G 5) + terminal(D 2) + terminal(B 7) + ) + + ) + circuit(INVX1 + + # Circuit boundary + rect((-100 400) (2000 7600)) + + # Nets with their geometries + net(1 name(VDD) + rect(l8 (410 6260) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l11 (-240 -240) (300 1400)) + rect(l11 (-650 300) (1800 800)) + rect(l11 (-1450 -1100) (300 300)) + rect(l11 (299 399) (2 2)) + rect(l2 (-651 -2151) (425 1500)) + ) + net(2 name(OUT) + rect(l8 (1110 5160) (180 180)) + rect(l8 (-180 920) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l8 (-180 -4120) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l11 (-240 -790) (300 4790)) + rect(l11 (-151 -2501) (2 2)) + rect(l2 (-226 1049) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(3 name(VSS) + rect(l8 (410 1770) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l11 (-240 -1300) (300 1360)) + rect(l11 (-650 -2160) (1800 800)) + rect(l11 (-851 -401) (2 2)) + rect(l6 (-651 859) (425 950)) + ) + net(4 + rect(l3 (-100 4500) (2000 3500)) + ) + net(5 name(IN) + rect(l4 (725 2860) (250 1940)) + rect(l4 (-525 -1850) (300 300)) + rect(l4 (-25 1550) (250 2000)) + rect(l4 (-250 -2000) (250 2000)) + rect(l4 (-250 -5390) (250 1450)) + rect(l8 (-465 150) (180 180)) + rect(l11 (-91 -91) (2 2)) + rect(l11 (-151 -151) (300 300)) + ) + net(6 name(SUBSTRATE)) + + # Outgoing pins and their connections to nets + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4) + pin(5 name(IN)) + pin(6 name(SUBSTRATE)) + + # Devices and their connections + device(1 D$PMOS$2 + location(850 5800) + param(L 0.25) + param(W 1.5) + param(AS 0.6375) + param(AD 0.6375) + param(PS 3.85) + param(PD 3.85) + terminal(S 1) + terminal(G 5) + terminal(D 2) + terminal(B 4) + ) + device(2 D$NMOS$2 + location(850 2135) + param(L 0.25) + param(W 0.95) + param(AS 0.40375) + param(AD 0.40375) + param(PS 2.75) + param(PD 2.75) + terminal(S 3) + terminal(G 5) + terminal(D 2) + terminal(B 6) + ) + + ) + circuit(INVX2 + + # Circuit boundary + rect((-100 400) (2600 7600)) + + # Nets with their geometries + net(1 name(IN) + rect(l4 (725 2860) (250 1940)) + rect(l4 (-225 -1300) (675 450)) + rect(l4 (0 -1100) (250 1950)) + rect(l4 (-1225 -1850) (300 300)) + rect(l4 (675 1550) (250 2000)) + rect(l4 (-250 -2000) (250 2000)) + rect(l4 (-950 -2000) (250 2000)) + rect(l4 (-250 -2000) (250 2000)) + rect(l4 (450 -5390) (250 1450)) + rect(l4 (-950 -1450) (250 1450)) + rect(l8 (-465 150) (180 180)) + rect(l11 (-91 -91) (2 2)) + rect(l11 (-151 -151) (300 300)) + ) + net(2 name(VDD) + rect(l8 (410 6260) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l8 (1220 920) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l11 (-1640 -240) (300 1400)) + rect(l11 (-650 300) (2400 800)) + rect(l11 (-2050 -1100) (300 300)) + rect(l11 (1100 -300) (300 300)) + rect(l11 (-1101 399) (2 2)) + rect(l11 (799 -2101) (300 1400)) + rect(l2 (-375 -1450) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + ) + net(3 name(OUT) + rect(l8 (1110 5160) (180 180)) + rect(l8 (-180 920) (180 180)) + rect(l8 (-180 -730) (180 180)) + rect(l8 (-180 -4120) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l11 (-240 -790) (300 4790)) + rect(l11 (-151 -2501) (2 2)) + rect(l2 (-226 1049) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + rect(l6 (-450 -4890) (425 950)) + rect(l6 (-400 -950) (425 950)) + ) + net(4 name(VSS) + rect(l8 (410 1770) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l8 (1220 -730) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l11 (-1640 -1300) (300 1360)) + rect(l11 (-650 -2160) (2400 800)) + rect(l11 (-650 0) (300 1360)) + rect(l11 (-1101 -1761) (2 2)) + rect(l6 (724 859) (425 950)) + rect(l6 (-1800 -950) (425 950)) + ) + net(5 + rect(l3 (-100 4500) (2600 3500)) + ) + net(6 name(SUBSTRATE)) + + # Outgoing pins and their connections to nets + pin(1 name(IN)) + pin(2 name(VDD)) + pin(3 name(OUT)) + pin(4 name(VSS)) + pin(5) + pin(6 name(SUBSTRATE)) + + # Devices and their connections + device(1 D$PMOS + device(D$PMOS$1 location(700 0)) + connect(0 S S) + connect(1 S D) + connect(0 G G) + connect(1 G G) + connect(0 D D) + connect(1 D S) + connect(0 B B) + connect(1 B B) + location(850 5800) + param(L 0.25) + param(W 3) + param(AS 0.975) + param(AD 0.975) + param(PS 5.8) + param(PD 5.8) + terminal(S 2) + terminal(G 1) + terminal(D 3) + terminal(B 5) + ) + device(3 D$NMOS + device(D$NMOS$1 location(700 0)) + connect(0 S S) + connect(1 S D) + connect(0 G G) + connect(1 G G) + connect(0 D D) + connect(1 D S) + connect(0 B B) + connect(1 B B) + location(850 2135) + param(L 0.25) + param(W 1.9) + param(AS 0.6175) + param(AD 0.6175) + param(PS 4.15) + param(PD 4.15) + terminal(S 4) + terminal(G 1) + terminal(D 3) + terminal(B 6) + ) + + ) + circuit(RINGO + + # Circuit boundary + rect((600 350) (25800 7650)) + + # Nets with their geometries + net(1 + rect(l8 (4710 3010) (180 180)) + rect(l11 (-850 -240) (610 300)) + rect(l2 (-1175 1800) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l6 (950 -4890) (425 950)) + ) + net(2 + rect(l8 (6510 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(3 + rect(l8 (19110 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(4 + rect(l8 (20910 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(5 name(FB) + rect(l8 (22710 3010) (180 180)) + rect(l8 (-19700 720) (180 180)) + rect(l11 (18380 -1140) (900 300)) + rect(l11 (-19530 590) (320 320)) + rect(l11 (17820 -320) (320 320)) + rect(l12 (-18400 -260) (200 200)) + rect(l12 (17940 -200) (200 200)) + rect(l13 (-18040 -300) (17740 400)) + rect(l13 (-17921 -201) (2 2)) + rect(l13 (-221 -201) (400 400)) + rect(l13 (17740 -400) (400 400)) + rect(l2 (-245 850) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(6 name(VDD) + rect(l3 (1100 4500) (1400 3500)) + rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (23300 -3500) (1400 3500)) + rect(l3 (-100 -3500) (600 3500)) + rect(l8 (-24690 -1240) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l8 (-180 -1280) (180 180)) + rect(l8 (23220 370) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l8 (-180 -1280) (180 180)) + rect(l11 (-22341 859) (2 2)) + rect(l11 (-1751 -451) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-101 -351) (2 2)) + rect(l11 (-1251 -401) (600 800)) + rect(l11 (23400 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-101 -351) (2 2)) + rect(l11 (549 -401) (600 800)) + rect(l2 (-23625 -2550) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + rect(l2 (1275 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (3175 -1500) (425 1500)) + rect(l2 (-2225 -1500) (425 1500)) + rect(l2 (3175 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (1375 -1500) (425 1500)) + rect(l2 (4550 -1500) (425 1500)) + rect(l2 (-1800 -1500) (425 1500)) + rect(l2 (-2225 -1500) (425 1500)) + rect(l9 (-19575 -450) (500 1500)) + rect(l9 (22900 -1500) (500 1500)) + ) + net(7 name(OUT) + rect(l11 (23440 3840) (320 320)) + rect(l12 (-260 -260) (200 200)) + rect(l13 (-101 -101) (2 2)) + rect(l13 (-201 -201) (400 400)) + rect(l2 (-625 850) (425 1500)) + rect(l2 (-400 -1500) (425 1500)) + rect(l6 (-450 -4890) (425 950)) + rect(l6 (-400 -950) (425 950)) + ) + net(8 name(ENABLE) + rect(l8 (2510 3010) (180 180)) + rect(l11 (-250 -250) (320 320)) + rect(l12 (-260 -260) (200 200)) + rect(l13 (-101 -101) (2 2)) + rect(l13 (-201 -201) (400 400)) + ) + net(9 name(VSS) + rect(l8 (1710 1610) (180 180)) + rect(l8 (-180 -1280) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l8 (23220 370) (180 180)) + rect(l8 (-180 -1280) (180 180)) + rect(l8 (-180 370) (180 180)) + rect(l11 (-22341 -391) (2 2)) + rect(l11 (-1301 -401) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-551 -401) (2 2)) + rect(l11 (-1251 -401) (600 800)) + rect(l11 (23850 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-551 -401) (2 2)) + rect(l11 (549 -401) (600 800)) + rect(l6 (-24300 460) (425 950)) + rect(l6 (1975 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (3175 -950) (425 950)) + rect(l6 (-2225 -950) (425 950)) + rect(l6 (3175 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (1375 -950) (425 950)) + rect(l6 (4550 -950) (425 950)) + rect(l6 (-1800 -950) (425 950)) + rect(l6 (-2225 -950) (425 950)) + rect(l10 (-19575 -2210) (500 1500)) + rect(l10 (22900 -1500) (500 1500)) + ) + net(10 + rect(l8 (8310 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(11 + rect(l8 (17310 3010) (180 180)) + rect(l11 (-1140 -240) (900 300)) + rect(l2 (-1275 1800) (425 1500)) + rect(l6 (-425 -4890) (425 950)) + ) + net(12) + net(13) + net(14) + net(15) + + # Outgoing pins and their connections to nets + pin(5 name(FB)) + pin(6 name(VDD)) + pin(7 name(OUT)) + pin(8 name(ENABLE)) + pin(9 name(VSS)) + + # Subcircuits and their connections + circuit(1 ND2X1 location(1800 0) + pin(0 6) + pin(1 1) + pin(2 9) + pin(3 6) + pin(4 5) + pin(5 8) + pin(6 9) + ) + circuit(2 INVX1 location(4200 0) + pin(0 6) + pin(1 2) + pin(2 9) + pin(3 6) + pin(4 1) + pin(5 9) + ) + circuit(3 INVX1 location(6000 0) + pin(0 6) + pin(1 10) + pin(2 9) + pin(3 6) + pin(4 2) + pin(5 9) + ) + circuit(4 INVX1 location(16800 0) + pin(0 6) + pin(1 3) + pin(2 9) + pin(3 6) + pin(4 11) + pin(5 9) + ) + circuit(5 INVX1 location(18600 0) + pin(0 6) + pin(1 4) + pin(2 9) + pin(3 6) + pin(4 3) + pin(5 9) + ) + circuit(6 INVX1 location(20400 0) + pin(0 6) + pin(1 5) + pin(2 9) + pin(3 6) + pin(4 4) + pin(5 9) + ) + circuit(7 INVX2 location(22200 0) + pin(0 5) + pin(1 6) + pin(2 7) + pin(3 9) + pin(4 6) + pin(5 9) + ) + circuit(17 INVX1 location(7800 0) + pin(0 6) + pin(1 12) + pin(2 9) + pin(3 6) + pin(4 10) + pin(5 9) + ) + circuit(18 INVX1 location(9600 0) + pin(0 6) + pin(1 13) + pin(2 9) + pin(3 6) + pin(4 12) + pin(5 9) + ) + circuit(19 INVX1 location(11400 0) + pin(0 6) + pin(1 14) + pin(2 9) + pin(3 6) + pin(4 13) + pin(5 9) + ) + circuit(20 INVX1 location(13200 0) + pin(0 6) + pin(1 15) + pin(2 9) + pin(3 6) + pin(4 14) + pin(5 9) + ) + circuit(21 INVX1 location(15000 0) + pin(0 6) + pin(1 11) + pin(2 9) + pin(3 6) + pin(4 15) + pin(5 9) + ) + + ) +) + +# Reference netlist +reference( + + # Device class section + class(PMOS MOS4) + class(NMOS MOS4) + + # Circuit section + # Circuits are the hierarchical building blocks of the netlist. + circuit(ND2X1 + + # Nets + net(1 name(VDD)) + net(2 name(OUT)) + net(3 name(VSS)) + net(4 name(NWELL)) + net(5 name(B)) + net(6 name(A)) + net(7 name(BULK)) + net(8 name('1')) + + # Outgoing pins and their connections to nets + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(B)) + pin(6 name(A)) + pin(7 name(BULK)) + + # Devices and their connections + device(1 PMOS + name($1) + param(L 0.25) + param(W 1.5) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 2) + terminal(G 6) + terminal(D 1) + terminal(B 4) + ) + device(2 PMOS + name($2) + param(L 0.25) + param(W 1.5) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 1) + terminal(G 5) + terminal(D 2) + terminal(B 4) + ) + device(3 NMOS + name($3) + param(L 0.25) + param(W 0.95) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 3) + terminal(G 6) + terminal(D 8) + terminal(B 7) + ) + device(4 NMOS + name($4) + param(L 0.25) + param(W 0.95) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 8) + terminal(G 5) + terminal(D 2) + terminal(B 7) + ) + + ) + circuit(INVX1 + + # Nets + net(1 name(VDD)) + net(2 name(OUT)) + net(3 name(VSS)) + net(4 name(NWELL)) + net(5 name(IN)) + net(6 name(BULK)) + + # Outgoing pins and their connections to nets + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(IN)) + pin(6 name(BULK)) + + # Devices and their connections + device(1 PMOS + name($1) + param(L 0.25) + param(W 1.5) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 1) + terminal(G 5) + terminal(D 2) + terminal(B 4) + ) + device(2 NMOS + name($2) + param(L 0.25) + param(W 0.95) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 3) + terminal(G 5) + terminal(D 2) + terminal(B 6) + ) + + ) + circuit(INVX2 + + # Nets + net(1 name(VDD)) + net(2 name(OUT)) + net(3 name(VSS)) + net(4 name(NWELL)) + net(5 name(IN)) + net(6 name(BULK)) + + # Outgoing pins and their connections to nets + pin(1 name(VDD)) + pin(2 name(OUT)) + pin(3 name(VSS)) + pin(4 name(NWELL)) + pin(5 name(IN)) + pin(6 name(BULK)) + + # Devices and their connections + device(1 PMOS + name($1) + param(L 0.25) + param(W 3) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 1) + terminal(G 5) + terminal(D 2) + terminal(B 4) + ) + device(2 NMOS + name($2) + param(L 0.25) + param(W 1.9) + param(AS 0) + param(AD 0) + param(PS 0) + param(PD 0) + terminal(S 3) + terminal(G 5) + terminal(D 2) + terminal(B 6) + ) + + ) + circuit(RINGO + + # Nets + net(1 name(VSS)) + net(2 name(VDD)) + net(3 name(FB)) + net(4 name(ENABLE)) + net(5 name(OUT)) + net(6 name('1')) + net(7 name('2')) + net(8 name('3')) + net(9 name('4')) + net(10 name('5')) + net(11 name('6')) + net(12 name('7')) + net(13 name('8')) + net(14 name('9')) + net(15 name('10')) + + # Outgoing pins and their connections to nets + pin(1 name(VSS)) + pin(2 name(VDD)) + pin(3 name(FB)) + pin(4 name(ENABLE)) + pin(5 name(OUT)) + + # Subcircuits and their connections + circuit(1 ND2X1 name($1) + pin(0 2) + pin(1 6) + pin(2 1) + pin(3 2) + pin(4 3) + pin(5 4) + pin(6 1) + ) + circuit(2 INVX1 name($2) + pin(0 2) + pin(1 7) + pin(2 1) + pin(3 2) + pin(4 6) + pin(5 1) + ) + circuit(3 INVX1 name($3) + pin(0 2) + pin(1 8) + pin(2 1) + pin(3 2) + pin(4 7) + pin(5 1) + ) + circuit(4 INVX1 name($4) + pin(0 2) + pin(1 9) + pin(2 1) + pin(3 2) + pin(4 8) + pin(5 1) + ) + circuit(5 INVX1 name($5) + pin(0 2) + pin(1 10) + pin(2 1) + pin(3 2) + pin(4 9) + pin(5 1) + ) + circuit(6 INVX1 name($6) + pin(0 2) + pin(1 11) + pin(2 1) + pin(3 2) + pin(4 10) + pin(5 1) + ) + circuit(7 INVX1 name($7) + pin(0 2) + pin(1 12) + pin(2 1) + pin(3 2) + pin(4 11) + pin(5 1) + ) + circuit(8 INVX1 name($8) + pin(0 2) + pin(1 13) + pin(2 1) + pin(3 2) + pin(4 12) + pin(5 1) + ) + circuit(9 INVX1 name($9) + pin(0 2) + pin(1 14) + pin(2 1) + pin(3 2) + pin(4 13) + pin(5 1) + ) + circuit(10 INVX1 name($10) + pin(0 2) + pin(1 15) + pin(2 1) + pin(3 2) + pin(4 14) + pin(5 1) + ) + circuit(11 INVX1 name($11) + pin(0 2) + pin(1 3) + pin(2 1) + pin(3 2) + pin(4 15) + pin(5 1) + ) + circuit(12 INVX2 name($12) + pin(0 2) + pin(1 5) + pin(2 1) + pin(3 2) + pin(4 3) + pin(5 1) + ) + + ) +) + +# Cross reference +xref( + circuit(INVX1 INVX1 match + xref( + net(4 4 match) + net(5 5 match) + net(2 2 match) + net(6 6 match) + net(1 1 match) + net(3 3 match) + pin(3 3 match) + pin(4 4 match) + pin(1 1 match) + pin(5 5 match) + pin(0 0 match) + pin(2 2 match) + device(1 1 match) + device(2 2 match) + ) + ) + circuit(INVX2 INVX2 match + xref( + net(5 4 match) + net(1 5 match) + net(3 2 match) + net(6 6 match) + net(2 1 match) + net(4 3 match) + pin(4 3 match) + pin(0 4 match) + pin(2 1 match) + pin(5 5 match) + pin(1 0 match) + pin(3 2 match) + device(1 1 match) + device(3 2 match) + ) + ) + circuit(ND2X1 ND2X1 match + xref( + net(8 8 match) + net(4 4 match) + net(6 6 match) + net(5 5 match) + net(2 2 match) + net(7 7 match) + net(1 1 match) + net(3 3 match) + pin(3 3 match) + pin(5 5 match) + pin(4 4 match) + pin(1 1 match) + pin(6 6 match) + pin(0 0 match) + pin(2 2 match) + device(1 1 match) + device(2 2 match) + device(3 3 match) + device(4 4 match) + ) + ) + circuit(RINGO RINGO match + xref( + net(1 6 match) + net(4 15 match) + net(2 7 match) + net(10 8 match) + net(12 9 match) + net(13 10 match) + net(14 11 match) + net(15 12 match) + net(11 13 match) + net(3 14 match) + net(8 4 match) + net(5 3 match) + net(7 5 match) + net(6 2 match) + net(9 1 match) + pin(3 3 match) + pin(0 2 match) + pin(2 4 match) + pin(1 1 match) + pin(4 0 match) + circuit(1 1 match) + circuit(5 10 match) + circuit(6 11 match) + circuit(7 12 match) + circuit(2 2 match) + circuit(3 3 match) + circuit(17 4 match) + circuit(18 5 match) + circuit(19 6 match) + circuit(20 7 match) + circuit(21 8 match) + circuit(4 9 match) + ) + ) +)