diff --git a/src/lay/lay/doc/manual/bjt_lateral.png b/src/lay/lay/doc/manual/bjt_lateral.png new file mode 100644 index 000000000..37e812d25 Binary files /dev/null and b/src/lay/lay/doc/manual/bjt_lateral.png differ diff --git a/src/lay/lay/doc/manual/bjt_vertical.png b/src/lay/lay/doc/manual/bjt_vertical.png index b4294e707..4084da77f 100644 Binary files a/src/lay/lay/doc/manual/bjt_vertical.png and b/src/lay/lay/doc/manual/bjt_vertical.png differ diff --git a/src/lay/lay/doc/manual/lvs_devices.xml b/src/lay/lay/doc/manual/lvs_devices.xml index 4ebf100ec..48b5c3be9 100644 --- a/src/lay/lay/doc/manual/lvs_devices.xml +++ b/src/lay/lay/doc/manual/lvs_devices.xml @@ -447,6 +447,10 @@ extract_devices(mos4(model_name), { "SD" => (active - poly) & pplus, "G" => collector region is defined by collector inside base and outside emitter.
+
+
(lateral PNP transistor)
+
Vertical transistors are formed by a stack of n/p wells. Sometimes vertical transistors are formed as parasitic devices in standard CMOS processes. A PNP transistor can be formed @@ -457,7 +461,7 @@ extract_devices(mos4(model_name), { "SD" => (active - poly) & pplus, "G" =>
-
+
(vertical PNP transistor)
diff --git a/src/lay/lay/layHelpResources.qrc b/src/lay/lay/layHelpResources.qrc
index cddb4922c..252839eac 100644
--- a/src/lay/lay/layHelpResources.qrc
+++ b/src/lay/lay/layHelpResources.qrc
@@ -211,6 +211,7 @@