diff --git a/src/layui/layui/layNetlistBrowserPage.cc b/src/layui/layui/layNetlistBrowserPage.cc index 51e4b367c..f879e9e24 100644 --- a/src/layui/layui/layNetlistBrowserPage.cc +++ b/src/layui/layui/layNetlistBrowserPage.cc @@ -40,6 +40,7 @@ #include "dbCellMapping.h" #include "dbLayerMapping.h" #include "dbCell.h" +#include "dbLog.h" #include #include @@ -792,6 +793,29 @@ NetlistBrowserPage::navigate_to (const QModelIndex &index, bool fwd) selection_changed (hierarchy_tree, directory_tree); } +void +NetlistBrowserPage::log_selection_changed () +{ + clear_highlights (); + + NetlistLogModel *model = dynamic_cast (log_view->model ()); + tl_assert (model != 0); + + QModelIndexList selection = log_view->selectionModel ()->selectedIndexes (); + for (QModelIndexList::const_iterator i = selection.begin (); i != selection.end (); ++i) { + if (i->column () == 0) { + const db::LogEntryData *le = model->log_entry (*i); + if (le && le->geometry () != db::DPolygon ()) { + + // @@@ TODO: add highlight for error here. + + } + } + } + + update_highlights (); +} + void NetlistBrowserPage::add_to_history (const QModelIndex &index, bool fwd) { @@ -1140,6 +1164,8 @@ NetlistBrowserPage::setup_trees () delete log_view->model (); log_view->setModel (new_model); + connect (log_view->selectionModel (), SIGNAL (selectionChanged (const QItemSelection &, const QItemSelection &)), this, SLOT (log_selection_changed ())); + log_tab_icon = NetlistLogModel::icon_for_severity (new_model->max_severity ()); } else { diff --git a/src/layui/layui/layNetlistBrowserPage.h b/src/layui/layui/layNetlistBrowserPage.h index 258385dd2..aec13cbf5 100644 --- a/src/layui/layui/layNetlistBrowserPage.h +++ b/src/layui/layui/layNetlistBrowserPage.h @@ -211,6 +211,7 @@ private slots: void nl_selection_changed (); void sch_selection_changed (); void xref_selection_changed (); + void log_selection_changed (); void browse_color_for_net (); void select_color_for_net (); diff --git a/src/layui/layui/layNetlistLogModel.cc b/src/layui/layui/layNetlistLogModel.cc index c9a85cc53..4b6aa865a 100644 --- a/src/layui/layui/layNetlistLogModel.cc +++ b/src/layui/layui/layNetlistLogModel.cc @@ -182,10 +182,11 @@ NetlistLogModel::icon_for_severity (db::Severity severity) } } -QVariant -NetlistLogModel::data (const QModelIndex &index, int role) const +const db::LogEntryData * +NetlistLogModel::log_entry (const QModelIndex &index) const { const db::LogEntryData *le = 0; + if (index.parent ().isValid ()) { const circuit_entry *ce = (const circuit_entry *) index.internalPointer (); if (ce) { @@ -200,6 +201,14 @@ NetlistLogModel::data (const QModelIndex &index, int role) const } } + return le; +} + +QVariant +NetlistLogModel::data (const QModelIndex &index, int role) const +{ + const db::LogEntryData *le = log_entry (index); + if (role == Qt::DecorationRole) { if (le) { diff --git a/src/layui/layui/layNetlistLogModel.h b/src/layui/layui/layNetlistLogModel.h index bbd26f2eb..670cf389a 100644 --- a/src/layui/layui/layNetlistLogModel.h +++ b/src/layui/layui/layNetlistLogModel.h @@ -52,6 +52,8 @@ public: virtual QVariant data (const QModelIndex &index, int role) const; virtual QVariant headerData (int section, Qt::Orientation orientation, int role) const; + const db::LogEntryData *log_entry (const QModelIndex &index) const; + static QIcon icon_for_severity (db::Severity severity); db::Severity max_severity () const diff --git a/testdata/lvs/double_height2.lvsdb b/testdata/lvs/double_height2.lvsdb index 784d0a7bd..cb79afe2b 100644 --- a/testdata/lvs/double_height2.lvsdb +++ b/testdata/lvs/double_height2.lvsdb @@ -27,9 +27,9 @@ J( C(l2 l6 l2) C(l5 l6 l5) G(l14 SUBSTRATE) - H(W B('Must-connect nets GND must be connected further up in the hierarchy - this is an error at the chip top level') C(INVCHAIN)) - H(W B('Must-connect nets R must be connected further up in the hierarchy - this is an error at the chip top level') C(INVCHAIN)) - H(E B('Must-connect nets R are not connected in INVCHAIN') C(INV2)) + H(W B('Must-connect nets GND must be connected further up in the hierarchy - this is an error at chip top level') C(INVCHAIN) X('must-connect')) + H(W B('Must-connect nets R must be connected further up in the hierarchy - this is an error at chip top level') C(INVCHAIN) X('must-connect')) + H(E B('Must-connect nets R of circuit INV2 are not connected') C(INVCHAIN) X('must-connect') Q('(0,0;0,9.2;3,9.2;3,0)')) K(PMOS MOS3) K(NMOS MOS3) D(D$PMOS PMOS diff --git a/testdata/lvs/double_height2_texts.lvsdb b/testdata/lvs/double_height2_texts.lvsdb index 9314d3a8f..509b5b815 100644 --- a/testdata/lvs/double_height2_texts.lvsdb +++ b/testdata/lvs/double_height2_texts.lvsdb @@ -27,9 +27,9 @@ J( C(l2 l6 l2) C(l5 l6 l5) G(l14 SUBSTRATE) - H(W B('Must-connect nets GND must be connected further up in the hierarchy - this is an error at the chip top level') C(INVCHAIN)) - H(W B('Must-connect nets R must be connected further up in the hierarchy - this is an error at the chip top level') C(INVCHAIN)) - H(E B('Must-connect nets R are not connected in INVCHAIN') C(INV2)) + H(W B('Must-connect nets GND must be connected further up in the hierarchy - this is an error at chip top level') C(INVCHAIN) X('must-connect')) + H(W B('Must-connect nets R must be connected further up in the hierarchy - this is an error at chip top level') C(INVCHAIN) X('must-connect')) + H(E B('Must-connect nets R of circuit INV2 are not connected') C(INVCHAIN) X('must-connect') Q('(0,0;0,9.2;3,9.2;3,0)')) K(PMOS MOS3) K(NMOS MOS3) D(D$PMOS PMOS diff --git a/testdata/lvs/test_22a.lvsdb.1 b/testdata/lvs/test_22a.lvsdb.1 index 3b03a7008..ed14452f3 100644 --- a/testdata/lvs/test_22a.lvsdb.1 +++ b/testdata/lvs/test_22a.lvsdb.1 @@ -71,7 +71,7 @@ layout( global(l6 vss) # Log entries - message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at chip top level') cell(SP6TArray_2X4) cat('must-connect')) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22a.lvsdb.2 b/testdata/lvs/test_22a.lvsdb.2 index 7b3f46cb7..653bea80f 100644 --- a/testdata/lvs/test_22a.lvsdb.2 +++ b/testdata/lvs/test_22a.lvsdb.2 @@ -71,7 +71,7 @@ layout( global(l6 vss) # Log entries - message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at chip top level') cell(SP6TArray_2X4) cat('must-connect')) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22b.lvsdb.1 b/testdata/lvs/test_22b.lvsdb.1 index 0ba4a5715..37f240e44 100644 --- a/testdata/lvs/test_22b.lvsdb.1 +++ b/testdata/lvs/test_22b.lvsdb.1 @@ -71,7 +71,7 @@ layout( global(l6 vss) # Log entries - message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at chip top level') cell(SP6TArray_2X4) cat('must-connect')) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22b.lvsdb.2 b/testdata/lvs/test_22b.lvsdb.2 index 8143cde2e..806634244 100644 --- a/testdata/lvs/test_22b.lvsdb.2 +++ b/testdata/lvs/test_22b.lvsdb.2 @@ -71,7 +71,7 @@ layout( global(l6 vss) # Log entries - message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at chip top level') cell(SP6TArray_2X4) cat('must-connect')) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22c.lvsdb.1 b/testdata/lvs/test_22c.lvsdb.1 index dc8c9a02b..f61eaa9e9 100644 --- a/testdata/lvs/test_22c.lvsdb.1 +++ b/testdata/lvs/test_22c.lvsdb.1 @@ -71,7 +71,7 @@ layout( global(l1 vss) # Log entries - message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at chip top level') cell(SP6TArray_2X4) cat('must-connect')) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22c.lvsdb.2 b/testdata/lvs/test_22c.lvsdb.2 index 041d90937..c85f87ba1 100644 --- a/testdata/lvs/test_22c.lvsdb.2 +++ b/testdata/lvs/test_22c.lvsdb.2 @@ -71,7 +71,7 @@ layout( global(l1 vss) # Log entries - message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at chip top level') cell(SP6TArray_2X4) cat('must-connect')) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22c.lvsdb.3 b/testdata/lvs/test_22c.lvsdb.3 index dfcc716bf..2fbe22102 100644 --- a/testdata/lvs/test_22c.lvsdb.3 +++ b/testdata/lvs/test_22c.lvsdb.3 @@ -71,7 +71,7 @@ layout( global(l1 vss) # Log entries - message(warning description('Must-connect nets vdd from circuit SP6TArray_2X4 must be connected further up in the hierarchy. This is an error at the chip top level.')) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at chip top level') cell(SP6TArray_2X4) cat('must-connect')) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22d.lvsdb.1 b/testdata/lvs/test_22d.lvsdb.1 index a7d57594a..45e3e88fc 100644 --- a/testdata/lvs/test_22d.lvsdb.1 +++ b/testdata/lvs/test_22d.lvsdb.1 @@ -71,7 +71,7 @@ layout( global(l1 vss) # Log entries - message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at the chip top level') cell(SP6TArray_2X4)) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at chip top level') cell(SP6TArray_2X4) cat('must-connect')) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22d.lvsdb.2 b/testdata/lvs/test_22d.lvsdb.2 index bf0e96e24..22c7b9fa6 100644 --- a/testdata/lvs/test_22d.lvsdb.2 +++ b/testdata/lvs/test_22d.lvsdb.2 @@ -71,7 +71,7 @@ layout( global(l1 vss) # Log entries - message(warning description('Must-connect nets vdd from circuit SP6TArray_2X4 must be connected further up in the hierarchy. This is an error at the chip top level.')) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at chip top level') cell(SP6TArray_2X4) cat('must-connect')) # Device class section class(active_res RES) diff --git a/testdata/lvs/test_22d.lvsdb.3 b/testdata/lvs/test_22d.lvsdb.3 index 2a177b469..5c772a9c5 100644 --- a/testdata/lvs/test_22d.lvsdb.3 +++ b/testdata/lvs/test_22d.lvsdb.3 @@ -71,7 +71,7 @@ layout( global(l1 vss) # Log entries - message(warning description('Must-connect nets vdd from circuit SP6TArray_2X4 must be connected further up in the hierarchy. This is an error at the chip top level.')) + message(warning description('Must-connect nets vdd must be connected further up in the hierarchy - this is an error at chip top level') cell(SP6TArray_2X4) cat('must-connect')) # Device class section class(active_res RES)