diff --git a/src/lvs/unit_tests/lvsSimpleTests.cc b/src/lvs/unit_tests/lvsSimpleTests.cc
index 6ed065c3d..8cec79e18 100644
--- a/src/lvs/unit_tests/lvsSimpleTests.cc
+++ b/src/lvs/unit_tests/lvsSimpleTests.cc
@@ -191,11 +191,16 @@ TEST(17_layout_variants)
   run_test (_this, "ringo_layout_var", "ringo_layout_var.gds");
 }
 
-TEST(18_cheats)
+TEST(18a_cheats)
 {
   run_test (_this, "invchain_cheat", "invchain_for_cheat.gds");
 }
 
+TEST(18b_nocheats)
+{
+  run_test (_this, "invchain_nocheat", "invchain_for_cheat.gds");
+}
+
 //  testing cell specific net joining for VSS of the double-height inverter standard cell
 TEST(19_double_height_inv)
 {
diff --git a/testdata/lvs/invchain_nocheat.lvs b/testdata/lvs/invchain_nocheat.lvs
new file mode 100644
index 000000000..0bf5132f3
--- /dev/null
+++ b/testdata/lvs/invchain_nocheat.lvs
@@ -0,0 +1,132 @@
+
+source($lvs_test_source)
+
+report_lvs($lvs_test_target_lvsdb)
+
+writer = write_spice(true, false)
+target_netlist($lvs_test_target_cir, writer, "Extracted by KLayout")
+
+# needs this delegate because we use MOS3 which is not available in Spice
+class SpiceReaderDelegate < RBA::NetlistSpiceReaderDelegate
+
+  # says we want to catch these subcircuits as devices
+  def wants_subcircuit(name)
+    name == "HVNMOS" || name == "HVPMOS"
+  end
+
+  # translate the element
+  def element(circuit, el, name, model, value, nets, params)
+
+    if el != "M"
+      # all other elements are left to the standard implementation
+      return super
+    end
+
+    if nets.size != 4
+      error("Device #{model} needs four nodes")
+    end
+
+    # provide a device class
+    cls = circuit.netlist.device_class_by_name(model)
+    if ! cls
+      cls = RBA::DeviceClassMOS3Transistor::new
+      cls.name = model
+      circuit.netlist.add(cls)
+    end
+
+    # create a device
+    device = circuit.create_device(cls, name)
+
+    # and configure the device
+    [ "S", "G", "D" ].each_with_index do |t,index|
+      device.connect_terminal(t, nets[index])
+    end
+    device.set_parameter("W", params["W"] * 1e6)
+    device.set_parameter("L", params["L"] * 1e6)
+
+    device
+
+  end
+
+end
+
+reader = RBA::NetlistSpiceReader::new(SpiceReaderDelegate::new)
+schematic("invchain_for_cheat.cir", reader)
+
+deep
+
+# Drawing layers
+
+nwell       = input(1, 0)
+active      = input(2, 0)
+poly        = input(3, 0)
+poly_lbl    = input(3, 1)
+diff_cont   = input(4, 0)
+poly_cont   = input(5, 0)
+metal1      = input(6, 0)
+metal1_lbl  = input(6, 1)
+via1        = input(7, 0)
+metal2      = input(8, 0)
+metal2_lbl  = input(8, 1)
+
+# Bulk layer for terminal provisioning
+
+bulk        = polygon_layer
+
+psd = nil
+nsd = nil
+
+# Computed layers
+
+active_in_nwell       = active & nwell
+pactive               = active_in_nwell 
+pgate                 = pactive & poly
+psd                   = pactive - pgate
+
+active_outside_nwell  = active - nwell
+nactive               = active_outside_nwell 
+ngate                 = nactive & poly
+nsd                   = nactive - ngate
+
+# Device extraction
+
+# PMOS transistor device extraction
+dex = mos3("PMOS")
+dex.smart_device_propagation = true
+extract_devices(dex, { "SD" => psd, "G" => pgate, 
+                       "tS" => psd, "tD" => psd, "tG" => poly })
+
+# NMOS transistor device extraction
+dex = mos3("NMOS")
+dex.smart_device_propagation = true
+extract_devices(dex, { "SD" => nsd, "G" => ngate, 
+                       "tS" => nsd, "tD" => nsd, "tG" => poly })
+
+# Define connectivity for netlist extraction
+
+# Inter-layer
+connect(psd,        diff_cont)
+connect(nsd,        diff_cont)
+connect(poly,       poly_cont)
+connect(diff_cont,  metal1)
+connect(poly_cont,  metal1)
+connect(metal1,     via1)
+connect(via1,       metal2)
+
+# attach labels
+connect(poly,       poly_lbl)
+connect(metal1,     metal1_lbl)
+connect(metal2,     metal2_lbl)
+
+# Global
+connect_global(bulk, "SUBSTRATE")
+
+# Compare section
+
+netlist.simplify
+align
+
+consider_net_names(false)
+
+compare
+
diff --git a/testdata/lvs/invchain_nocheat.lvsdb b/testdata/lvs/invchain_nocheat.lvsdb
new file mode 100644
index 000000000..c5fa8c4b6
--- /dev/null
+++ b/testdata/lvs/invchain_nocheat.lvsdb
@@ -0,0 +1,494 @@
+#%lvsdb-klayout
+J(
+ W(INVCHAIN)
+ U(0.001)
+ L(l3 '3/0')
+ L(l11 '3/1')
+ L(l6 '4/0')
+ L(l7 '5/0')
+ L(l8 '6/0')
+ L(l12 '6/1')
+ L(l9 '7/0')
+ L(l10 '8/0')
+ L(l13 '8/1')
+ L(l14)
+ L(l2)
+ L(l5)
+ C(l3 l3 l11 l7)
+ C(l11 l3 l11)
+ C(l6 l6 l8 l2 l5)
+ C(l7 l3 l7 l8)
+ C(l8 l6 l7 l8 l12 l9)
+ C(l12 l8 l12)
+ C(l9 l8 l9 l10)
+ C(l10 l9 l10 l13)
+ C(l13 l10 l13)
+ C(l14 l14)
+ C(l2 l6 l2)
+ C(l5 l6 l5)
+ G(l14 SUBSTRATE)
+ K(PMOS MOS3)
+ K(NMOS MOS3)
+ D(D$PMOS PMOS
+  T(S
+   R(l2 (-900 -475) (775 950))
+  )
+  T(G
+   R(l3 (-125 -475) (250 950))
+  )
+  T(D
+   R(l2 (125 -475) (775 950))
+  )
+ )
+ D(D$NMOS NMOS
+  T(S
+   R(l5 (-900 -475) (775 950))
+  )
+  T(G
+   R(l3 (-125 -475) (250 950))
+  )
+  T(D
+   R(l5 (125 -475) (775 950))
+  )
+ )
+ X(INV
+  R((-1500 -800) (3000 4600))
+  N(1
+   R(l6 (290 -310) (220 220))
+   R(l6 (-220 180) (220 220))
+   R(l8 (-290 -690) (360 760))
+   R(l9 (-305 -705) (250 250))
+   R(l9 (-250 150) (250 250))
+   R(l10 (-2025 -775) (3000 900))
+   R(l5 (-1375 -925) (775 950))
+  )
+  N(2
+   R(l6 (290 2490) (220 220))
+   R(l6 (-220 180) (220 220))
+   R(l8 (-290 -690) (360 760))
+   R(l9 (-305 -705) (250 250))
+   R(l9 (-250 150) (250 250))
+   R(l10 (-2025 -775) (3000 900))
+   R(l2 (-1375 -925) (775 950))
+  )
+  N(3
+   R(l3 (-125 -250) (250 2500))
+   R(l3 (-250 -3050) (250 1600))
+   R(l3 (-250 1200) (250 1600))
+  )
+  N(4
+   R(l6 (-510 -310) (220 220))
+   R(l6 (-220 180) (220 220))
+   R(l6 (-220 2180) (220 220))
+   R(l6 (-220 180) (220 220))
+   R(l8 (-290 -3530) (360 2840))
+   R(l8 (-360 -2800) (360 760))
+   R(l8 (-360 2040) (360 760))
+   R(l2 (-680 -855) (775 950))
+   R(l5 (-775 -3750) (775 950))
+  )
+  P(1)
+  P(2)
+  P(3)
+  P(4)
+  D(1 D$PMOS
+   Y(0 2800)
+   E(L 0.25)
+   E(W 0.95)
+   E(AS 0.73625)
+   E(AD 0.73625)
+   E(PS 3.45)
+   E(PD 3.45)
+   T(S 4)
+   T(G 3)
+   T(D 2)
+  )
+  D(2 D$NMOS
+   Y(0 0)
+   E(L 0.25)
+   E(W 0.95)
+   E(AS 0.73625)
+   E(AD 0.73625)
+   E(PS 3.45)
+   E(PD 3.45)
+   T(S 4)
+   T(G 3)
+   T(D 1)
+  )
+ )
+ X(INV3
+  R((0 0) (6300 4600))
+  N(1 I('3')
+   R(l11 (1510 1930) (0 0))
+  )
+  N(2 I('5')
+   R(l11 (2320 1910) (0 0))
+  )
+  N(3 I('7')
+   R(l11 (4830 1890) (0 0))
+  )
+  N(4 I('4')
+   R(l12 (1090 1970) (0 0))
+  )
+  N(5 I('6')
+   R(l12 (2680 1940) (0 0))
+  )
+  N(6 I('8')
+   R(l12 (4410 1920) (0 0))
+  )
+  N(7)
+  N(8)
+  P(1 I('3'))
+  P(2 I('5'))
+  P(3 I('7'))
+  P(4 I('4'))
+  P(5 I('6'))
+  P(6 I('8'))
+  P(7)
+  P(8)
+  X(1 INV Y(1500 800)
+   P(0 8)
+   P(1 7)
+   P(2 1)
+   P(3 4)
+  )
+  X(2 INV M O(180) Y(2300 800)
+   P(0 8)
+   P(1 7)
+   P(2 2)
+   P(3 5)
+  )
+  X(3 INV Y(4800 800)
+   P(0 8)
+   P(1 7)
+   P(2 3)
+   P(3 6)
+  )
+ )
+ X(INV2
+  R((0 0) (5500 4600))
+  N(1)
+  N(2)
+  N(3)
+  N(4)
+  N(5)
+  N(6)
+  P(1)
+  P(2)
+  P(3)
+  P(4)
+  P(5)
+  P(6)
+  X(1 INV M O(180) Y(1500 800)
+   P(0 6)
+   P(1 5)
+   P(2 3)
+   P(3 1)
+  )
+  X(2 INV Y(4000 800)
+   P(0 6)
+   P(1 5)
+   P(2 4)
+   P(3 2)
+  )
+ )
+ X(INVCHAIN
+  R((-1500 -800) (10400 4600))
+  N(1 I(IN)
+   R(l3 (-1295 925) (1235 350))
+   R(l11 (-910 -150) (0 0))
+  )
+  N(2
+   R(l3 (445 805) (480 550))
+   R(l7 (-435 -365) (220 220))
+   R(l8 (-1065 -285) (1105 350))
+  )
+  N(3
+   R(l3 (1345 925) (1945 350))
+   R(l7 (-1885 -285) (220 220))
+   R(l8 (-295 -370) (440 520))
+  )
+  N(4
+   R(l3 (3745 805) (480 550))
+   R(l7 (-435 -365) (220 220))
+   R(l8 (-1065 -285) (1105 350))
+  )
+  N(5
+   R(l3 (4645 925) (1945 350))
+   R(l7 (-1885 -285) (220 220))
+   R(l8 (-295 -370) (440 520))
+  )
+  N(6
+   R(l3 (7045 805) (480 550))
+   R(l7 (-435 -365) (220 220))
+   R(l8 (-1065 -285) (1105 350))
+  )
+  N(7 I(OUT)
+   R(l12 (7790 1100) (0 0))
+  )
+  N(8 I(VSS)
+   R(l13 (6600 0) (0 0))
+   R(l13 (-3300 0) (0 0))
+   R(l13 (-3300 0) (0 0))
+  )
+  N(9 I(VDD)
+   R(l13 (3300 2800) (0 0))
+   R(l13 (3300 0) (0 0))
+   R(l13 (-6600 0) (0 0))
+  )
+  P(1 I(IN))
+  P(7 I(OUT))
+  P(8 I(VSS))
+  P(9 I(VDD))
+  X(1 INV3 Y(-1500 -800)
+   P(0 1)
+   P(1 2)
+   P(2 3)
+   P(3 2)
+   P(4 3)
+   P(5 4)
+   P(6 9)
+   P(7 8)
+  )
+  X(2 INV2 Y(2600 -800)
+   P(0 5)
+   P(1 6)
+   P(2 4)
+   P(3 5)
+   P(4 9)
+   P(5 8)
+  )
+  X(3 INV M O(180) Y(7400 0)
+   P(0 8)
+   P(1 9)
+   P(2 6)
+   P(3 7)
+  )
+ )
+)
+H(
+ K(PMOS MOS3)
+ K(NMOS MOS3)
+ X(INV
+  N(1 I('1'))
+  N(2 I('2'))
+  N(3 I('3'))
+  N(4 I('4'))
+  P(1 I('1'))
+  P(2 I('2'))
+  P(3 I('3'))
+  P(4 I('4'))
+  D(1 PMOS
+   I($1)
+   E(L 0.25)
+   E(W 0.95)
+   E(AS 0)
+   E(AD 0)
+   E(PS 0)
+   E(PD 0)
+   T(S 1)
+   T(G 3)
+   T(D 4)
+  )
+  D(2 NMOS
+   I($3)
+   E(L 0.25)
+   E(W 0.95)
+   E(AS 0)
+   E(AD 0)
+   E(PS 0)
+   E(PD 0)
+   T(S 2)
+   T(G 3)
+   T(D 4)
+  )
+ )
+ X(INV3
+  N(1 I('1'))
+  N(2 I('2'))
+  N(3 I('3'))
+  N(4 I('4'))
+  N(5 I('5'))
+  N(6 I('6'))
+  N(7 I('7'))
+  N(8 I('8'))
+  P(1 I('1'))
+  P(2 I('2'))
+  P(3 I('3'))
+  P(4 I('4'))
+  P(5 I('5'))
+  P(6 I('6'))
+  P(7 I('7'))
+  P(8 I('8'))
+  X(1 INV I($1)
+   P(0 1)
+   P(1 2)
+   P(2 3)
+   P(3 4)
+  )
+  X(2 INV I($2)
+   P(0 1)
+   P(1 2)
+   P(2 5)
+   P(3 6)
+  )
+  X(3 INV I($3)
+   P(0 1)
+   P(1 2)
+   P(2 7)
+   P(3 8)
+  )
+ )
+ X(INV2
+  N(1 I('1'))
+  N(2 I('2'))
+  N(3 I('3'))
+  N(4 I('4'))
+  N(5 I('5'))
+  N(6 I('6'))
+  P(1 I('1'))
+  P(2 I('2'))
+  P(3 I('3'))
+  P(4 I('4'))
+  P(5 I('5'))
+  P(6 I('6'))
+  X(1 INV I($1)
+   P(0 1)
+   P(1 2)
+   P(2 3)
+   P(3 4)
+  )
+  X(2 INV I($2)
+   P(0 1)
+   P(1 2)
+   P(2 5)
+   P(3 6)
+  )
+ )
+ X(INVCHAIN
+  N(1 I('1'))
+  N(2 I('2'))
+  N(3 I('3'))
+  N(4 I('4'))
+  N(5 I('5'))
+  N(6 I('6'))
+  N(7 I('7'))
+  N(8 I('8'))
+  N(9 I('9'))
+  X(1 INV3 I($1)
+   P(0 1)
+   P(1 2)
+   P(2 3)
+   P(3 4)
+   P(4 4)
+   P(5 5)
+   P(6 5)
+   P(7 6)
+  )
+  X(2 INV2 I($2)
+   P(0 1)
+   P(1 2)
+   P(2 6)
+   P(3 7)
+   P(4 7)
+   P(5 8)
+  )
+  X(3 INV I($3)
+   P(0 1)
+   P(1 2)
+   P(2 8)
+   P(3 9)
+  )
+ )
+)
+Z(
+ X(INV INV 1
+  Z(
+   N(2 1 1)
+   N(1 2 1)
+   N(3 3 1)
+   N(4 4 1)
+   P(1 0 1)
+   P(0 1 1)
+   P(2 2 1)
+   P(3 3 1)
+   D(2 2 1)
+   D(1 1 1)
+  )
+ )
+ X(INV2 INV2 1
+  L(
+   M(W B('Matching nets $I8 vs. 4 from an ambiguous group of nets'))
+   M(W B('Matching nets $I7 vs. 6 from an ambiguous group of nets'))
+   M(I B('Matching nets $I6 vs. 3 following an ambiguous match'))
+   M(I B('Matching nets $I5 vs. 5 following an ambiguous match'))
+  )
+  Z(
+   N(5 1 1)
+   N(6 2 1)
+   N(3 3 1)
+   N(1 4 W)
+   N(4 5 1)
+   N(2 6 W)
+   P(4 0 1)
+   P(5 1 1)
+   P(2 2 1)
+   P(0 3 1)
+   P(3 4 1)
+   P(1 5 1)
+   X(1 1 1)
+   X(2 2 1)
+  )
+ )
+ X(INV3 INV3 1
+  L(
+   M(W B('Matching nets 4 from an ambiguous group of nets'))
+   M(W B('Matching nets 6 from an ambiguous group of nets'))
+   M(W B('Matching nets 8 from an ambiguous group of nets'))
+   M(I B('Matching nets 3 following an ambiguous match'))
+   M(I B('Matching nets 5 following an ambiguous match'))
+   M(I B('Matching nets 7 following an ambiguous match'))
+  )
+  Z(
+   N(7 1 1)
+   N(8 2 1)
+   N(1 3 1)
+   N(4 4 W)
+   N(2 5 1)
+   N(5 6 W)
+   N(3 7 1)
+   N(6 8 W)
+   P(6 0 1)
+   P(7 1 1)
+   P(0 2 1)
+   P(3 3 1)
+   P(1 4 1)
+   P(4 5 1)
+   P(2 6 1)
+   P(5 7 1)
+   X(1 1 1)
+   X(2 2 1)
+   X(3 3 1)
+  )
+ )
+ X(INVCHAIN INVCHAIN 1
+  Z(
+   N(2 4 1)
+   N(3 5 1)
+   N(4 6 1)
+   N(5 7 1)
+   N(6 8 1)
+   N(1 3 1)
+   N(7 9 1)
+   N(9 1 1)
+   N(8 2 1)
+   P(0 () 1)
+   P(1 () 1)
+   P(3 () 1)
+   P(2 () 1)
+   X(3 3 1)
+   X(2 2 1)
+   X(1 1 1)
+  )
+ )
+)