diff --git a/src/db/db/dbAsIfFlatRegion.h b/src/db/db/dbAsIfFlatRegion.h index 836c73b4f..cb6bde618 100644 --- a/src/db/db/dbAsIfFlatRegion.h +++ b/src/db/db/dbAsIfFlatRegion.h @@ -138,6 +138,11 @@ public: virtual RegionDelegate *add (const Region &other) const; + virtual RegionDelegate *peel (double /*complexity_factor*/) const + { + return const_cast (this); + } + virtual RegionDelegate *selected_outside (const Region &other) const { return selected_interacting_generic (other, 1, false, Positive, size_t (1), std::numeric_limits::max ()).first; diff --git a/src/db/db/dbBoxScanner.h b/src/db/db/dbBoxScanner.h index ea7eed1d3..fe7cbbff0 100644 --- a/src/db/db/dbBoxScanner.h +++ b/src/db/db/dbBoxScanner.h @@ -42,15 +42,15 @@ namespace db /** * @brief A utility class for the box scanner implementation */ -template +template struct bs_side_compare_func #if __cplusplus < 201703L : std::binary_function, std::pair, bool> #endif { - typedef typename BoxConvert::box_type box_type; + typedef typename BoxConvertAdaptor::box_type box_type; - bs_side_compare_func (const BoxConvert &bc) + bs_side_compare_func (const BoxConvertAdaptor &bc) : m_bc (bc) { // .. nothing yet .. @@ -59,26 +59,26 @@ struct bs_side_compare_func bool operator() (const std::pair &a, const std::pair &b) const { SideOp sideop; - return sideop (m_bc (*a.first)) < sideop (m_bc (*b.first)); + return sideop (m_bc (a)) < sideop (m_bc (b)); } private: - BoxConvert m_bc; + BoxConvertAdaptor m_bc; }; /** * @brief A utility class for the box scanner implementation */ -template +template struct bs_side_compare_vs_const_func #if __cplusplus < 201703L : std::unary_function, bool> #endif { - typedef typename BoxConvert::box_type box_type; + typedef typename BoxConvertAdaptor::box_type box_type; typedef typename box_type::coord_type coord_type; - bs_side_compare_vs_const_func (const BoxConvert &bc, coord_type c) + bs_side_compare_vs_const_func (const BoxConvertAdaptor &bc, coord_type c) : m_bc (bc), m_c (c) { // .. nothing yet .. @@ -87,11 +87,11 @@ struct bs_side_compare_vs_const_func bool operator() (const std::pair &a) const { SideOp sideop; - return sideop (m_bc (*a.first)) < m_c; + return sideop (m_bc (a)) < m_c; } private: - BoxConvert m_bc; + BoxConvertAdaptor m_bc; coord_type m_c; }; @@ -186,6 +186,34 @@ public: typedef std::vector > container_type; typedef typename container_type::iterator iterator_type; + template + struct box_convert_adaptor_take_first + { + typedef typename BoxConvert::box_type box_type; + + box_convert_adaptor_take_first (const BoxConvert &bc) + : m_bc (bc) + { } + + box_type operator() (const std::pair &p) const + { + return m_bc (*p.first); + } + + private: + const BoxConvert &m_bc; + }; + + struct BoxConvertAdaptorTakeSecond + { + typedef Prop box_type; + + const box_type &operator() (const std::pair &p) const + { + return p.second; + } + }; + /** * @brief Default ctor */ @@ -288,7 +316,22 @@ public: bool process (Rec &rec, typename BoxConvert::box_type::coord_type enl, const BoxConvert &bc = BoxConvert ()) { rec.initialize (); - bool ret = do_process (rec, enl, bc); + bool ret = do_process (rec, enl, box_convert_adaptor_take_first (bc)); + rec.finalize (ret); + return ret; + } + + /** + * @brief Same as "process", but allows specfying a box convert adaptor + * + * This version is useful for use with BoxConvertAdaptorTakeSecond. In that case, "Prop" needs to be + * a box type and is used directly as the bounding box. + */ + template + bool process_with_adaptor (Rec &rec, typename BoxConvertAdaptor::box_type::coord_type enl, const BoxConvertAdaptor &bca = BoxConvertAdaptor ()) + { + rec.initialize (); + bool ret = do_process (rec, enl, bca); rec.finalize (ret); return ret; } @@ -300,21 +343,21 @@ private: bool m_report_progress; std::string m_progress_desc; - template - bool do_process (Rec &rec, typename BoxConvert::box_type::coord_type enl, const BoxConvert &bc = BoxConvert ()) + template + bool do_process (Rec &rec, typename BoxConvertAdaptor::box_type::coord_type enl, const BoxConvertAdaptor &bc = BoxConvertAdaptor ()) { - typedef typename BoxConvert::box_type box_type; + typedef typename BoxConvertAdaptor::box_type box_type; typedef typename box_type::coord_type coord_type; - typedef bs_side_compare_func > bottom_side_compare_func; - typedef bs_side_compare_func > left_side_compare_func; - typedef bs_side_compare_vs_const_func > below_func; - typedef bs_side_compare_vs_const_func > left_func; + typedef bs_side_compare_func > bottom_side_compare_func; + typedef bs_side_compare_func > left_side_compare_func; + typedef bs_side_compare_vs_const_func > below_func; + typedef bs_side_compare_vs_const_func > left_func; // sort out the entries with an empty bbox (we must not put that into sort) typename container_type::iterator wi = m_pp.begin (); for (typename container_type::iterator ri = m_pp.begin (); ri != m_pp.end (); ++ri) { - if (! bc (*ri->first).empty ()) { + if (! bc (*ri).empty ()) { if (wi != ri) { *wi = *ri; } @@ -334,9 +377,9 @@ private: // below m_scanner_thr elements use the brute force approach which is faster in that case for (iterator_type i = m_pp.begin (); i != m_pp.end (); ++i) { - box_type b1 = bc (*i->first); + box_type b1 = bc (*i); for (iterator_type j = i + 1; j != m_pp.end (); ++j) { - if (bs_boxes_overlap (b1, bc (*j->first), enl)) { + if (bs_boxes_overlap (b1, bc (*j), enl)) { rec.add (i->first, i->second, j->first, j->second); if (rec.stop ()) { return false; @@ -355,7 +398,7 @@ private: std::sort (m_pp.begin (), m_pp.end (), bottom_side_compare_func (bc)); - coord_type y = bc (*m_pp.front ().first).bottom (); + coord_type y = bc (m_pp.front ()).bottom (); iterator_type current = m_pp.begin (); iterator_type future = m_pp.begin (); @@ -389,10 +432,10 @@ private: typename std::iterator_traits::difference_type min_band_size = size_t ((future - current) * m_fill_factor); coord_type yy = y; do { - yy = bc (*future->first).bottom (); + yy = bc (*future).bottom (); do { ++future; - } while (future != m_pp.end () && bc (*future->first).bottom () == yy); + } while (future != m_pp.end () && bc (*future).bottom () == yy); } while (future != m_pp.end () && future - current < min_band_size); std::sort (current, future, left_side_compare_func (bc)); @@ -400,7 +443,7 @@ private: iterator_type c = current; iterator_type f = current; - coord_type x = bc (*c->first).left (); + coord_type x = bc (*c).left (); while (f != future) { @@ -412,10 +455,10 @@ private: typename std::iterator_traits::difference_type min_box_size = size_t ((f - c) * m_fill_factor); coord_type xx = x; do { - xx = bc (*f->first).left (); + xx = bc (*f).left (); do { ++f; - } while (f != future && bc (*f->first).left () == xx); + } while (f != future && bc (*f).left () == xx); } while (f != future && f - c < min_box_size); if (m_report_progress) { @@ -425,9 +468,13 @@ private: for (iterator_type i = f0; i != f; ++i) { for (iterator_type j = c; j < i; ++j) { - if (bs_boxes_overlap (bc (*i->first), bc (*j->first), enl)) { - if (seen.find (std::make_pair (i->first, j->first)) == seen.end () && seen.find (std::make_pair (j->first, i->first)) == seen.end ()) { - seen.insert (std::make_pair (i->first, j->first)); + if (bs_boxes_overlap (bc (*i), bc (*j), enl)) { + std::pair k (i->first, j->first); + if (k.first < k.second) { + std::swap (k.first, k.second); + } + if (seen.find (k) == seen.end ()) { + seen.insert (k); rec.add (i->first, i->second, j->first, j->second); if (rec.stop ()) { return false; @@ -534,6 +581,62 @@ public: typedef typename container_type1::iterator iterator_type1; typedef typename container_type2::iterator iterator_type2; + template + struct box_convert_adaptor_take_first1 + { + typedef typename BoxConvert::box_type box_type; + + box_convert_adaptor_take_first1 (const BoxConvert &bc) + : m_bc (bc) + { } + + box_type operator() (const std::pair &p) const + { + return m_bc (*p.first); + } + + private: + const BoxConvert &m_bc; + }; + + template + struct box_convert_adaptor_take_first2 + { + typedef typename BoxConvert::box_type box_type; + + box_convert_adaptor_take_first2 (const BoxConvert &bc) + : m_bc (bc) + { } + + box_type operator() (const std::pair &p) const + { + return m_bc (*p.first); + } + + private: + const BoxConvert &m_bc; + }; + + struct BoxConvertAdaptorTakeSecond1 + { + typedef Prop1 box_type; + + const box_type &operator() (const std::pair &p) const + { + return p.second; + } + }; + + struct BoxConvertAdaptorTakeSecond2 + { + typedef Prop2 box_type; + + const box_type &operator() (const std::pair &p) const + { + return p.second; + } + }; + /** * @brief Default ctor */ @@ -678,7 +781,22 @@ public: bool process (Rec &rec, typename BoxConvert1::box_type::coord_type enl, const BoxConvert1 &bc1 = BoxConvert1 (), const BoxConvert2 &bc2 = BoxConvert2 ()) { rec.initialize (); - bool ret = do_process (rec, enl, bc1, bc2); + bool ret = do_process (rec, enl, box_convert_adaptor_take_first1 (bc1), box_convert_adaptor_take_first2 (bc2)); + rec.finalize (ret); + return ret; + } + + /** + * @brief Same as "process", but allows specfying a box convert adaptor + * + * This version is useful for use with BoxConvertAdaptorTakeSecond. In that case, "Prop" needs to be + * a box type and is used directly as the bounding box. + */ + template + bool process_with_adaptor (Rec &rec, typename BoxConvertAdaptor1::box_type::coord_type enl, const BoxConvertAdaptor1 &bca1 = BoxConvertAdaptor1 (), const BoxConvertAdaptor2 &bca2 = BoxConvertAdaptor2 ()) + { + rec.initialize (); + bool ret = do_process (rec, enl, bca1, bca2); rec.finalize (ret); return ret; } @@ -691,25 +809,25 @@ private: bool m_report_progress; std::string m_progress_desc; - template - bool do_process (Rec &rec, typename BoxConvert1::box_type::coord_type enl, const BoxConvert1 &bc1 = BoxConvert1 (), const BoxConvert2 &bc2 = BoxConvert2 ()) + template + bool do_process (Rec &rec, typename BoxConvertAdaptor1::box_type::coord_type enl, const BoxConvertAdaptor1 &bc1 = BoxConvertAdaptor1 (), const BoxConvertAdaptor2 &bc2 = BoxConvertAdaptor2 ()) { - typedef typename BoxConvert1::box_type box_type; // must be same as BoxConvert2::box_type + typedef typename BoxConvertAdaptor1::box_type box_type; // must be same as BoxConvert2::box_type typedef typename box_type::coord_type coord_type; - typedef bs_side_compare_func > bottom_side_compare_func1; - typedef bs_side_compare_func > left_side_compare_func1; - typedef bs_side_compare_vs_const_func > below_func1; - typedef bs_side_compare_vs_const_func > left_func1; - typedef bs_side_compare_func > bottom_side_compare_func2; - typedef bs_side_compare_func > left_side_compare_func2; - typedef bs_side_compare_vs_const_func > below_func2; - typedef bs_side_compare_vs_const_func > left_func2; + typedef bs_side_compare_func > bottom_side_compare_func1; + typedef bs_side_compare_func > left_side_compare_func1; + typedef bs_side_compare_vs_const_func > below_func1; + typedef bs_side_compare_vs_const_func > left_func1; + typedef bs_side_compare_func > bottom_side_compare_func2; + typedef bs_side_compare_func > left_side_compare_func2; + typedef bs_side_compare_vs_const_func > below_func2; + typedef bs_side_compare_vs_const_func > left_func2; // sort out the entries with an empty bbox (we must not put that into sort) typename container_type1::iterator wi1 = m_pp1.begin (); for (typename container_type1::iterator ri1 = m_pp1.begin (); ri1 != m_pp1.end (); ++ri1) { - if (! bc1 (*ri1->first).empty ()) { + if (! bc1 (*ri1).empty ()) { if (wi1 != ri1) { *wi1 = *ri1; } @@ -726,7 +844,7 @@ private: typename container_type2::iterator wi2 = m_pp2.begin (); for (typename container_type2::iterator ri2 = m_pp2.begin (); ri2 != m_pp2.end (); ++ri2) { - if (! bc2 (*ri2->first).empty ()) { + if (! bc2 (*ri2).empty ()) { if (wi2 != ri2) { *wi2 = *ri2; } @@ -757,9 +875,9 @@ private: // below m_scanner_thr elements use the brute force approach which is faster in that case for (iterator_type1 i = m_pp1.begin (); i != m_pp1.end (); ++i) { - box_type b1 = bc1 (*i->first); + box_type b1 = bc1 (*i); for (iterator_type2 j = m_pp2.begin (); j != m_pp2.end (); ++j) { - if (bs_boxes_overlap (b1, bc2 (*j->first), enl)) { + if (bs_boxes_overlap (b1, bc2 (*j), enl)) { rec.add (i->first, i->second, j->first, j->second); if (rec.stop ()) { return false; @@ -783,7 +901,7 @@ private: std::sort (m_pp1.begin (), m_pp1.end (), bottom_side_compare_func1 (bc1)); std::sort (m_pp2.begin (), m_pp2.end (), bottom_side_compare_func2 (bc2)); - coord_type y = std::min (bc1 (*m_pp1.front ().first).bottom (), bc2 (*m_pp2.front ().first).bottom ()); + coord_type y = std::min (bc1 (m_pp1.front ()).bottom (), bc2 (m_pp2.front ()).bottom ()); iterator_type1 current1 = m_pp1.begin (); iterator_type1 future1 = m_pp1.begin (); @@ -833,16 +951,16 @@ private: coord_type yy = y; do { if (future1 != m_pp1.end () && future2 != m_pp2.end ()) { - yy = std::min (bc1 (*future1->first).bottom (), bc2 (*future2->first).bottom ()); + yy = std::min (bc1 (*future1).bottom (), bc2 (*future2).bottom ()); } else if (future1 != m_pp1.end ()) { - yy = bc1 (*future1->first).bottom (); + yy = bc1 (*future1).bottom (); } else { - yy = bc2 (*future2->first).bottom (); + yy = bc2 (*future2).bottom (); } - while (future1 != m_pp1.end () && bc1 (*future1->first).bottom () == yy) { + while (future1 != m_pp1.end () && bc1 (*future1).bottom () == yy) { ++future1; } - while (future2 != m_pp2.end () && bc2 (*future2->first).bottom () == yy) { + while (future2 != m_pp2.end () && bc2 (*future2).bottom () == yy) { ++future2; } } while ((future1 != m_pp1.end () || future2 != m_pp2.end ()) && size_t (future1 - current1) + size_t (future2 - current2) < min_band_size); @@ -857,7 +975,7 @@ private: iterator_type2 c2 = current2; iterator_type2 f2 = current2; - coord_type x = std::min (bc1 (*c1->first).left (), bc2 (*c2->first).left ()); + coord_type x = std::min (bc1 (*c1).left (), bc2 (*c2).left ()); while (f1 != future1 || f2 != future2) { @@ -869,16 +987,16 @@ private: coord_type xx = x; do { if (f1 != future1 && f2 != future2) { - xx = std::min (bc1 (*f1->first).left (), bc2 (*f2->first).left ()); + xx = std::min (bc1 (*f1).left (), bc2 (*f2).left ()); } else if (f1 != future1) { - xx = bc1 (*f1->first).left (); + xx = bc1 (*f1).left (); } else if (f2 != future2) { - xx = bc2 (*f2->first).left (); + xx = bc2 (*f2).left (); } - while (f1 != future1 && bc1 (*f1->first).left () == xx) { + while (f1 != future1 && bc1 (*f1).left () == xx) { ++f1; } - while (f2 != future2 && bc2 (*f2->first).left () == xx) { + while (f2 != future2 && bc2 (*f2).left () == xx) { ++f2; } } while ((f1 != future1 || f2 != future2) && size_t (f1 - c1) + size_t (f2 - c2) < min_box_size); @@ -886,7 +1004,7 @@ private: if (c1 != f1 && c2 != f2) { for (iterator_type1 i = c1; i != f1; ++i) { for (iterator_type2 j = c2; j < f2; ++j) { - if (bs_boxes_overlap (bc1 (*i->first), bc2 (*j->first), enl)) { + if (bs_boxes_overlap (bc1 (*i), bc2 (*j), enl)) { if (seen1.insert (std::make_pair (i->first, j->first)).second) { seen2.insert (std::make_pair (j->first, i->first)); rec.add (i->first, i->second, j->first, j->second); diff --git a/src/db/db/dbDeepRegion.cc b/src/db/db/dbDeepRegion.cc index 4cc33efa5..716a9e6c4 100644 --- a/src/db/db/dbDeepRegion.cc +++ b/src/db/db/dbDeepRegion.cc @@ -401,6 +401,13 @@ DeepRegion::begin_merged () const } } +RegionIteratorDelegate * +DeepRegion::begin_unmerged () const +{ + ensure_unmerged_polygons_valid (); + return begin (); +} + std::pair DeepRegion::begin_iter () const { @@ -445,6 +452,13 @@ DeepRegion::begin_merged_iter () const } } +std::pair +DeepRegion::begin_unmerged_iter () const +{ + ensure_unmerged_polygons_valid (); + return begin_iter (); +} + bool DeepRegion::empty () const { @@ -787,6 +801,46 @@ DeepRegion::ensure_merged_polygons_valid () const } } +void +DeepRegion::ensure_unmerged_polygons_valid () const +{ + if (! m_is_merged || + (deep_layer ().store ()->max_area_ratio () == 0.0 && deep_layer ().store ()->max_vertex_count () == 0)) { + return; + } + + m_merged_polygons = deep_layer ().derived (); + db::DeepLayer &polygons = const_cast (deep_layer ()); + + m_merged_polygons_valid = true; + m_is_merged = false; + m_merged_polygons_boc_hash = deep_layer ().breakout_cells_hash (); + + db::Layout &layout = polygons.layout (); + polygons.swap (m_merged_polygons); + + for (db::Layout::iterator c = layout.begin (); c != layout.end (); ++c) { + + const db::Shapes &s = c->shapes (m_merged_polygons.layer ()); + db::Shapes &st = c->shapes (deep_layer ().layer ()); + + db::PolygonRefToShapesGenerator pr (&layout, &st); + db::PolygonSplitter splitter (pr, polygons.store ()->max_area_ratio (), polygons.store ()->max_vertex_count ()); + + splitter.start (); + for (auto p = s.begin (db::ShapeIterator::All); ! p.at_end (); ++p) { + if (p->is_polygon ()) { + pr.set_prop_id (p->prop_id ()); + db::Polygon poly; + p->polygon (poly); + splitter.put (poly); + } + } + splitter.flush (); + + } +} + void DeepRegion::set_is_merged (bool f) { @@ -826,6 +880,140 @@ DeepRegion::nets (LayoutToNetlist *l2n, NetPropertyMode prop_mode, const tl::Var return new db::DeepRegion (result); } +namespace { + +/** + * @brief Implements a boolean AND or NOT operation with property handling + */ +class DB_PUBLIC PushHierLocalOperationWithProperties + : public local_operation, db::object_with_properties, db::object_with_properties > +{ +public: + PushHierLocalOperationWithProperties (double complexity_factor) + : local_operation, db::object_with_properties, db::object_with_properties > (), + m_complexity_factor (complexity_factor) + { + // .. nothing yet .. + } + + OnEmptyIntruderHint on_empty_intruder_hint () const { return Copy; } + + std::string description () const + { + return tl::to_string (tr ("'peel' operation")); + } + + + virtual void do_compute_local (db::Layout *layout, db::Cell * /*subject_cell*/, const shape_interactions, db::object_with_properties > &interactions, std::vector > > &results, const db::LocalProcessorBase *proc) const + { + tl_assert (results.size () == 1); + auto &result = results.front (); + + db::EdgeProcessor ep; + + for (auto i = interactions.begin (); i != interactions.end (); ++i) { + + const auto &subject = interactions.subject_shape (i->first); + db::properties_id_type prop_id = subject.properties_id (); + + if (i->second.empty ()) { + + result.insert (subject); + + } else { + + ep.clear (); + + const auto &subject = interactions.subject_shape (i->first); + for (auto e = subject.begin_edge (); ! e.at_end(); ++e) { + ep.insert (*e, 0); + } + + size_t p2 = 1; + for (auto ii = i->second.begin (); ii != i->second.end (); ++ii) { + const auto &intruder = interactions.intruder_shape (*ii); + for (auto e = intruder.second.begin_edge (); ! e.at_end(); ++e) { + ep.insert (*e, p2); + } + p2 += 2; + } + + std::unordered_set > result1; + + db::BooleanOp op (db::BooleanOp::ANotB); + db::polygon_ref_generator_with_properties > pr (layout, result1, prop_id); + db::PolygonSplitter splitter (pr, proc->area_ratio (), proc->max_vertex_count ()); + db::PolygonGenerator pg (splitter, true, true); + ep.set_base_verbosity (50); + ep.process (pg, op); + + if (result1.empty ()) { + + // shortcut: nothing to do + + } else if (m_complexity_factor < 0.0) { + + // no complexity limit + result.insert (result1.begin (), result1.end ()); + + } else if (m_complexity_factor == 0.0) { + + // only remove shape if it is really entirely covered in this case + result.insert (subject); + + } else { + + size_t vertices_before = subject.vertices (); + size_t vertices_after = 0; + for (auto r = result1.begin (); r != result1.end (); ++r) { + vertices_after += r->vertices (); + } + + if (floor (0.5 + m_complexity_factor * vertices_before) >= vertices_after) { + result.insert (result1.begin (), result1.end ()); + } else { + result.insert (subject); + } + + } + + } + + } + } + +private: + double m_complexity_factor; +}; + +} + +RegionDelegate * +DeepRegion::peel (double complexity_factor) const +{ + if (empty ()) { + // we can return "this", as this method is only intended for in-place execution inside Region + return const_cast (this); + } + + DeepLayer dl_out (deep_layer ().derived ()); + + PushHierLocalOperationWithProperties op (complexity_factor); + + db::local_processor proc (const_cast (&deep_layer ().layout ()), const_cast (&deep_layer ().initial_cell ()), deep_layer ().breakout_cells ()); + configure_proc (proc); + proc.set_threads (deep_layer ().store ()->threads ()); + proc.set_area_ratio (deep_layer ().store ()->max_area_ratio ()); + proc.set_max_vertex_count (deep_layer ().store ()->max_vertex_count ()); + + // with this setting, only top-down interactions are considered + proc.set_top_down (true); + + proc.run (&op, deep_layer ().layer (), deep_layer ().layer (), dl_out.layer ()); + + return new DeepRegion (dl_out); +} + RegionDelegate * DeepRegion::and_with (const Region &other, PropertyConstraint property_constraint) const { @@ -922,6 +1110,10 @@ DeepRegion::andnot_with (const Region &other, PropertyConstraint property_constr DeepLayer DeepRegion::and_with_impl (const DeepRegion *other, db::PropertyConstraint property_constraint) const { + // booleans run better on simple polygons + ensure_unmerged_polygons_valid (); + other->ensure_unmerged_polygons_valid (); + DeepLayer dl_out (deep_layer ().derived ()); if (pc_skip (property_constraint)) { @@ -956,6 +1148,10 @@ DeepRegion::and_with_impl (const DeepRegion *other, db::PropertyConstraint prope DeepLayer DeepRegion::not_with_impl (const DeepRegion *other, db::PropertyConstraint property_constraint) const { + // booleans run better on simple polygons + ensure_unmerged_polygons_valid (); + other->ensure_unmerged_polygons_valid (); + DeepLayer dl_out (deep_layer ().derived ()); DeepLayer dl_prep; @@ -1059,6 +1255,10 @@ DeepRegion::not_with_impl (const DeepRegion *other, db::PropertyConstraint prope std::pair DeepRegion::and_and_not_with (const DeepRegion *other, PropertyConstraint property_constraint) const { + // booleans run better on simple polygons + ensure_unmerged_polygons_valid (); + other->ensure_unmerged_polygons_valid (); + DeepLayer dl_out1 (deep_layer ().derived ()); DeepLayer dl_out2 (deep_layer ().derived ()); @@ -1179,6 +1379,10 @@ DeepRegion::add_in_place (const Region &other) const DeepRegion *other_deep = dynamic_cast (other.delegate ()); if (other_deep) { + // NOTE: as we don't benefit from merged shapes here, we prefer unmerged ones + // for potentially better performance. + other_deep->ensure_unmerged_polygons_valid (); + deep_layer ().add_from (other_deep->deep_layer ()); } else { @@ -1885,6 +2089,10 @@ DeepRegion::sized (coord_type d, unsigned int mode) const return clone (); } + // in case of negative sizing the output polygons will still be merged (on positive sizing they might + // overlap after size and are not necessarily merged) + bool will_be_merged = (d < 0 && (merged_semantics () || is_merged ())); + const db::DeepLayer &polygons = merged_deep_layer (); db::Layout &layout = const_cast (polygons.layout ()); @@ -1904,7 +2112,8 @@ DeepRegion::sized (coord_type d, unsigned int mode) const db::Shapes &st = c->shapes (res->deep_layer ().layer ()); db::PolygonRefToShapesGenerator pr (&layout, &st); - db::PolygonGenerator pg2 (pr, false /*don't resolve holes*/, true /*min. coherence*/); + db::PolygonSplitter splitter (pr, will_be_merged ? 0.0 : polygons.store ()->max_area_ratio (), will_be_merged ? 0 : polygons.store ()->max_vertex_count ()); + db::PolygonGenerator pg2 (splitter, false /*don't resolve holes*/, true /*min. coherence*/); db::SizingPolygonFilter siz (pg2, d_with_mag, d_with_mag, mode); for (db::Shapes::shape_iterator si = s.begin (db::ShapeIterator::All); ! si.at_end (); ++si) { @@ -1916,11 +2125,7 @@ DeepRegion::sized (coord_type d, unsigned int mode) const } - // in case of negative sizing the output polygons will still be merged (on positive sizing they might - // overlap after size and are not necessarily merged) - if (d < 0 && (merged_semantics () || is_merged ())) { - res->set_is_merged (true); - } + res->set_is_merged (will_be_merged); return res.release (); } @@ -1938,6 +2143,10 @@ DeepRegion::sized (coord_type dx, coord_type dy, unsigned int mode) const return sized (dx, mode); } + // in case of negative sizing the output polygons will still be merged (on positive sizing they might + // overlap after size and are not necessarily merged) + bool will_be_merged = (dx < 0 && dy < 0 && (merged_semantics () || is_merged ())); + const db::DeepLayer &polygons = merged_deep_layer (); db::Layout &layout = const_cast (polygons.layout ()); @@ -1964,7 +2173,8 @@ DeepRegion::sized (coord_type dx, coord_type dy, unsigned int mode) const db::Shapes &st = c->shapes (res->deep_layer ().layer ()); db::PolygonRefToShapesGenerator pr (&layout, &st); - db::PolygonGenerator pg2 (pr, false /*don't resolve holes*/, true /*min. coherence*/); + db::PolygonSplitter splitter (pr, will_be_merged ? 0.0 : polygons.store ()->max_area_ratio (), will_be_merged ? 0 : polygons.store ()->max_vertex_count ()); + db::PolygonGenerator pg2 (splitter, false /*don't resolve holes*/, true /*min. coherence*/); db::SizingPolygonFilter siz (pg2, dx_with_mag, dy_with_mag, mode); for (db::Shapes::shape_iterator si = s.begin (db::ShapeIterator::All); ! si.at_end (); ++si) { @@ -1976,11 +2186,7 @@ DeepRegion::sized (coord_type dx, coord_type dy, unsigned int mode) const } - // in case of negative sizing the output polygons will still be merged (on positive sizing they might - // overlap after size and are not necessarily merged) - if (dx < 0 && dy < 0 && (merged_semantics () || is_merged ())) { - res->set_is_merged (true); - } + res->set_is_merged (will_be_merged); return res.release (); } diff --git a/src/db/db/dbDeepRegion.h b/src/db/db/dbDeepRegion.h index 3d9d5c3fb..10a9277f1 100644 --- a/src/db/db/dbDeepRegion.h +++ b/src/db/db/dbDeepRegion.h @@ -66,9 +66,11 @@ public: virtual RegionIteratorDelegate *begin () const; virtual RegionIteratorDelegate *begin_merged () const; + virtual RegionIteratorDelegate *begin_unmerged () const; virtual std::pair begin_iter () const; virtual std::pair begin_merged_iter () const; + virtual std::pair begin_unmerged_iter () const; virtual bool empty () const; virtual bool is_merged () const; @@ -138,6 +140,8 @@ public: virtual RegionDelegate *sized_inside (const Region &inside, bool outside, coord_type d, int steps, unsigned int mode) const; virtual RegionDelegate *sized_inside (const Region &inside, bool outside, coord_type dx, coord_type dy, int steps, unsigned int mode) const; + virtual RegionDelegate *peel (double complexity_factor) const; + virtual void insert_into (Layout *layout, db::cell_index_type into_cell, unsigned int into_layer) const; virtual RegionDelegate *nets (LayoutToNetlist *l2n, NetPropertyMode prop_mode, const tl::Variant &net_prop_name, const std::vector *nets) const; @@ -176,10 +180,11 @@ private: mutable DeepLayer m_merged_polygons; mutable bool m_merged_polygons_valid; mutable size_t m_merged_polygons_boc_hash; - bool m_is_merged; + mutable bool m_is_merged; void init (); void ensure_merged_polygons_valid () const; + void ensure_unmerged_polygons_valid () const; DeepLayer not_with_impl (const DeepRegion *other, PropertyConstraint property_constraint) const; DeepLayer and_with_impl (const DeepRegion *other, PropertyConstraint property_constraint) const; std::pair and_and_not_with (const DeepRegion *other, PropertyConstraint property_constraint) const; diff --git a/src/db/db/dbDeepShapeStore.cc b/src/db/db/dbDeepShapeStore.cc index 9286bd5cf..5ded121e1 100644 --- a/src/db/db/dbDeepShapeStore.cc +++ b/src/db/db/dbDeepShapeStore.cc @@ -232,6 +232,14 @@ bool DeepLayer::operator== (const DeepLayer &other) const return true; } +void +DeepLayer::swap (DeepLayer &other) +{ + tl_assert (mp_store.get () == other.mp_store.get ()); + std::swap (m_layer, other.m_layer); + std::swap (m_layout, other.m_layout); +} + db::Layout & DeepLayer::layout () { @@ -563,13 +571,13 @@ static unsigned int init_layer (db::Layout &layout, const db::RecursiveShapeIter } DeepShapeStore::DeepShapeStore () - : m_keep_layouts (true), m_wants_all_cells (false) + : m_keep_layouts (true), m_wants_all_cells (false), m_sparse_array_limit (-1.0) { ++s_instance_count; } DeepShapeStore::DeepShapeStore (const std::string &topcell_name, double dbu) - : m_keep_layouts (true), m_wants_all_cells (false) + : m_keep_layouts (true), m_wants_all_cells (false), m_sparse_array_limit (-1.0) { ++s_instance_count; @@ -857,6 +865,16 @@ bool DeepShapeStore::wants_all_cells () const return m_wants_all_cells; } +void DeepShapeStore::set_sparse_array_limit (double l) +{ + m_sparse_array_limit = l; +} + +double DeepShapeStore::sparse_array_limit () const +{ + return m_sparse_array_limit; +} + void DeepShapeStore::set_reject_odd_polygons (bool f) { m_state.set_reject_odd_polygons (f); @@ -1022,6 +1040,7 @@ DeepLayer DeepShapeStore::create_polygon_layer (const db::RecursiveShapeIterator db::HierarchyBuilder &builder = m_layouts[layout_index]->builder; builder.set_wants_all_cells (m_wants_all_cells); + builder.set_sparse_array_limit (m_sparse_array_limit); unsigned int layer_index = init_layer (layout, si); builder.set_target_layer (layer_index); @@ -1056,6 +1075,9 @@ DeepLayer DeepShapeStore::create_custom_layer (const db::RecursiveShapeIterator db::Layout &layout = m_layouts[layout_index]->layout; db::HierarchyBuilder &builder = m_layouts[layout_index]->builder; + builder.set_wants_all_cells (m_wants_all_cells); + builder.set_sparse_array_limit (m_sparse_array_limit); + unsigned int layer_index = init_layer (layout, si); builder.set_target_layer (layer_index); diff --git a/src/db/db/dbDeepShapeStore.h b/src/db/db/dbDeepShapeStore.h index b79b8cd59..60233e23a 100644 --- a/src/db/db/dbDeepShapeStore.h +++ b/src/db/db/dbDeepShapeStore.h @@ -120,6 +120,11 @@ public: */ bool operator== (const DeepLayer &other) const; + /** + * @brief Swap two layers + */ + void swap (DeepLayer &other); + /** * @brief Gets the layout object * The return value is guaranteed to be non-null. @@ -696,6 +701,27 @@ public: */ bool wants_all_cells () const; + /** + * @brief Sets the "sparse array" limit + * + * Sparse arrays are instance arrays whose bounding box is no longer a + * good approximation of the covered area. The "sparse array ratio" is + * the area of the bounding box divided by the area of the bounding box + * of a single instance. + * + * Arrays above this limit will be resolved into single instances. + * + * Setting this value to 0 will resolve all arrays. Setting this + * value to a negative value will never split arrays. The latter + * is the default. + */ + void set_sparse_array_limit (double l); + + /** + * @brief Gets the "sparse array" limit + */ + double sparse_array_limit () const; + /** * @brief Sets a flag indicating whether to reject odd polygons * @@ -853,6 +879,7 @@ private: std::list m_state_stack; bool m_keep_layouts; bool m_wants_all_cells; + double m_sparse_array_limit; tl::Mutex m_lock; struct DeliveryMappingCacheKey diff --git a/src/db/db/dbEmptyRegion.h b/src/db/db/dbEmptyRegion.h index a97e908e7..8a1caa9ec 100644 --- a/src/db/db/dbEmptyRegion.h +++ b/src/db/db/dbEmptyRegion.h @@ -46,9 +46,11 @@ public: virtual RegionIteratorDelegate *begin () const { return 0; } virtual RegionIteratorDelegate *begin_merged () const { return 0; } + virtual RegionIteratorDelegate *begin_unmerged () const { return 0; } virtual std::pair begin_iter () const { return std::make_pair (db::RecursiveShapeIterator (), db::ICplxTrans ()); } virtual std::pair begin_merged_iter () const { return std::make_pair (db::RecursiveShapeIterator (), db::ICplxTrans ()); } + virtual std::pair begin_unmerged_iter () const { return std::make_pair (db::RecursiveShapeIterator (), db::ICplxTrans ()); } virtual bool empty () const { return true; } virtual size_t count () const { return 0; } @@ -109,6 +111,8 @@ public: virtual RegionDelegate *add_in_place (const Region &other); virtual RegionDelegate *add (const Region &other) const; + virtual RegionDelegate *peel (double /*complexity_factor*/) const { return new EmptyRegion (); } + virtual RegionDelegate *selected_outside (const Region &) const { return new EmptyRegion (); } virtual RegionDelegate *selected_not_outside (const Region &) const { return new EmptyRegion (); } virtual std::pair selected_outside_pair (const Region &) const { return std::make_pair (new EmptyRegion (), new EmptyRegion ()); } diff --git a/src/db/db/dbFlatRegion.cc b/src/db/db/dbFlatRegion.cc index 92c4e6609..720f376de 100644 --- a/src/db/db/dbFlatRegion.cc +++ b/src/db/db/dbFlatRegion.cc @@ -33,29 +33,33 @@ namespace db // ------------------------------------------------------------------------------------------------------------- // FlatRegion implementation -FlatRegion::FlatRegion () - : MutableRegion (), mp_polygons (new db::Shapes (false)), mp_merged_polygons (new db::Shapes (false)) +FlatRegion::FlatRegion (double area_ratio, size_t max_vertex_count) + : MutableRegion (), mp_polygons (new db::Shapes (false)), mp_merged_polygons (new db::Shapes (false)), + m_area_ratio (area_ratio), m_max_vertex_count (max_vertex_count) { init (); } FlatRegion::FlatRegion (const FlatRegion &other) - : MutableRegion (other), mp_polygons (other.mp_polygons), mp_merged_polygons (other.mp_merged_polygons) + : MutableRegion (other), mp_polygons (other.mp_polygons), mp_merged_polygons (other.mp_merged_polygons), + m_area_ratio (other.m_area_ratio), m_max_vertex_count (other.m_max_vertex_count) { init (); m_is_merged = other.m_is_merged; m_merged_polygons_valid = other.m_merged_polygons_valid; } -FlatRegion::FlatRegion (const db::Shapes &polygons, bool is_merged) - : MutableRegion (), mp_polygons (new db::Shapes (polygons)), mp_merged_polygons (new db::Shapes (false)) +FlatRegion::FlatRegion (const db::Shapes &polygons, bool is_merged, double area_ratio, size_t max_vertex_count) + : MutableRegion (), mp_polygons (new db::Shapes (polygons)), mp_merged_polygons (new db::Shapes (false)), + m_area_ratio (area_ratio), m_max_vertex_count (max_vertex_count) { init (); m_is_merged = is_merged; } -FlatRegion::FlatRegion (const db::Shapes &polygons, const db::ICplxTrans &trans, bool merged_semantics, bool is_merged) - : MutableRegion (), mp_polygons (new db::Shapes (polygons)), mp_merged_polygons (new db::Shapes (false)) +FlatRegion::FlatRegion (const db::Shapes &polygons, const db::ICplxTrans &trans, bool merged_semantics, bool is_merged, double area_ratio, size_t max_vertex_count) + : MutableRegion (), mp_polygons (new db::Shapes (polygons)), mp_merged_polygons (new db::Shapes (false)), + m_area_ratio (area_ratio), m_max_vertex_count (max_vertex_count) { init (); m_is_merged = is_merged; @@ -63,8 +67,9 @@ FlatRegion::FlatRegion (const db::Shapes &polygons, const db::ICplxTrans &trans, set_merged_semantics (merged_semantics); } -FlatRegion::FlatRegion (bool is_merged) - : MutableRegion (), mp_polygons (new db::Shapes (false)), mp_merged_polygons (new db::Shapes (false)) +FlatRegion::FlatRegion (bool is_merged, double area_ratio, size_t max_vertex_count) + : MutableRegion (), mp_polygons (new db::Shapes (false)), mp_merged_polygons (new db::Shapes (false)), + m_area_ratio (area_ratio), m_max_vertex_count (max_vertex_count) { init (); m_is_merged = is_merged; @@ -126,6 +131,20 @@ FlatRegion::ensure_merged_polygons_valid () const } } +void +FlatRegion::ensure_unmerged_polygons_valid () const +{ + if (! m_is_merged || (m_area_ratio == 0.0 && m_max_vertex_count == 0)) { + return; + } + + mp_merged_polygons.reset (new db::Shapes (*mp_polygons)); + m_merged_polygons_valid = true; + m_is_merged = false; + + break_polygons (*mp_polygons, m_max_vertex_count, m_area_ratio); +} + RegionIteratorDelegate *FlatRegion::begin () const { return new FlatRegionIterator (mp_polygons.get_const ()); @@ -141,6 +160,12 @@ RegionIteratorDelegate *FlatRegion::begin_merged () const } } +RegionIteratorDelegate *FlatRegion::begin_unmerged () const +{ + ensure_unmerged_polygons_valid (); + return begin (); +} + std::pair FlatRegion::begin_iter () const { return std::make_pair (db::RecursiveShapeIterator (*mp_polygons), db::ICplxTrans ()); @@ -156,6 +181,12 @@ std::pair FlatRegion::begin_merged_i } } +std::pair FlatRegion::begin_unmerged_iter () const +{ + ensure_unmerged_polygons_valid (); + return begin_iter (); +} + bool FlatRegion::empty () const { return mp_polygons->empty (); diff --git a/src/db/db/dbFlatRegion.h b/src/db/db/dbFlatRegion.h index 3ade8fee6..5610eb061 100644 --- a/src/db/db/dbFlatRegion.h +++ b/src/db/db/dbFlatRegion.h @@ -51,10 +51,10 @@ public: typedef db::layer polygon_layer_wp_type; typedef polygon_layer_wp_type::iterator polygon_iterator_wp_type; - FlatRegion (); - FlatRegion (const db::Shapes &polygons, bool is_merged = false); - FlatRegion (const db::Shapes &polygons, const db::ICplxTrans &trans, bool merged_semantics, bool is_merged = false); - FlatRegion (bool is_merged); + FlatRegion (double area_ratio = 0.0, size_t max_vertex_count = 0); + FlatRegion (const db::Shapes &polygons, bool is_merged = false, double area_ratio = 0.0, size_t max_vertex_count = 0); + FlatRegion (const db::Shapes &polygons, const db::ICplxTrans &trans, bool merged_semantics, bool is_merged = false, double area_ratio = 0.0, size_t max_vertex_count = 0); + FlatRegion (bool is_merged, double area_ratio = 0.0, size_t max_vertex_count = 0); FlatRegion (const FlatRegion &other); @@ -69,9 +69,11 @@ public: virtual RegionIteratorDelegate *begin () const; virtual RegionIteratorDelegate *begin_merged () const; + virtual RegionIteratorDelegate *begin_unmerged () const; virtual std::pair begin_iter () const; virtual std::pair begin_merged_iter () const; + virtual std::pair begin_unmerged_iter () const; virtual bool empty () const; virtual size_t count () const; @@ -143,13 +145,16 @@ private: FlatRegion &operator= (const FlatRegion &other); - bool m_is_merged; + mutable bool m_is_merged; mutable tl::copy_on_write_ptr mp_polygons; mutable tl::copy_on_write_ptr mp_merged_polygons; mutable bool m_merged_polygons_valid; + double m_area_ratio; + size_t m_max_vertex_count; void init (); void ensure_merged_polygons_valid () const; + void ensure_unmerged_polygons_valid () const; template void transform_generic (const Trans &trans) diff --git a/src/db/db/dbHierNetworkProcessor.cc b/src/db/db/dbHierNetworkProcessor.cc index f187468fd..0ef16ef41 100644 --- a/src/db/db/dbHierNetworkProcessor.cc +++ b/src/db/db/dbHierNetworkProcessor.cc @@ -20,7 +20,6 @@ */ - #include "dbHierNetworkProcessor.h" #include "dbShape.h" #include "dbShapes.h" @@ -1794,7 +1793,7 @@ public: cell_clusters_box_converter (const db::Layout &layout, const hier_clusters &tree) : mp_layout (&layout), mp_tree (&tree) { - // .. nothing yet .. + m_cache.resize (layout.cells (), 0); } const box_type &operator() (const db::CellInst &cell_inst) const @@ -1804,10 +1803,10 @@ public: const box_type &operator() (db::cell_index_type cell_index) const { - typename std::map::const_iterator b = m_cache.find (cell_index); - if (b != m_cache.end ()) { + const box_type *b = m_cache [cell_index]; + if (b) { - return b->second; + return *b; } else { @@ -1820,13 +1819,17 @@ public: box += inst_array.bbox (*this); } - return m_cache.insert (std::make_pair (cell_index, box)).first->second; + m_cached_boxes.push_front (box); + b = m_cached_boxes.begin ().operator-> (); + m_cache [cell_index] = b; + return *b; } } private: - mutable std::map m_cache; + mutable std::vector m_cache; + mutable tl::slist m_cached_boxes; const db::Layout *mp_layout; const hier_clusters *mp_tree; }; @@ -1889,8 +1892,8 @@ namespace */ template struct hc_receiver - : public db::box_scanner_receiver, - public db::box_scanner_receiver2, unsigned int, db::Instance, unsigned int> + : public db::box_scanner_receiver, + public db::box_scanner_receiver2, db::Box, db::Instance, db::Box> { public: typedef typename hier_clusters::box_type box_type; @@ -1960,7 +1963,7 @@ public: /** * @brief Receiver main event for instance-to-instance interactions */ - void add (const db::Instance *i1, unsigned int /*p1*/, const db::Instance *i2, unsigned int /*p2*/) + void add (const db::Instance *i1, db::Box /*p1*/, const db::Instance *i2, db::Box /*p2*/) { db::ICplxTrans t; @@ -1973,7 +1976,7 @@ public: /** * @brief Single-instance treatment - may be required because of interactions between array members */ - void finish (const db::Instance *i, unsigned int /*p1*/) + void finish (const db::Instance *i, db::Box /*p1*/) { consider_single_inst (*i); } @@ -1981,7 +1984,7 @@ public: /** * @brief Receiver main event for local-to-instance interactions */ - void add (const local_cluster *c1, unsigned int /*p1*/, const db::Instance *i2, unsigned int /*p2*/) + void add (const local_cluster *c1, db::Box /*p1*/, const db::Instance *i2, db::Box /*p2*/) { std::list ic; @@ -1993,10 +1996,10 @@ public: } /** - * @brief Finally join the clusters in the join set + * @brief Finally generate cluster-to-instance interactions and join the clusters in the join set * * This step is postponed because doing this while the iteration happens would - * invalidate the box trees. + * invalidate the box trees and disturb the propagation mechanism. */ void finish_cluster_to_instance_interactions () { @@ -2081,7 +2084,7 @@ private: const db::Connectivity *mp_conn; const std::set *mp_breakout_cells; typedef std::list > join_set_list; - std::map m_cm2join_map; + std::unordered_map m_cm2join_map; join_set_list m_cm2join_sets; std::map, int> m_soft_connections; std::list m_ci_interactions; @@ -2551,8 +2554,8 @@ private: return; } - typename std::map::const_iterator x = m_cm2join_map.find (a); - typename std::map::const_iterator y = m_cm2join_map.find (b); + typename std::unordered_map::const_iterator x = m_cm2join_map.find (a); + typename std::unordered_map::const_iterator y = m_cm2join_map.find (b); if (x == m_cm2join_map.end ()) { @@ -2579,6 +2582,11 @@ private: } else if (x->second != y->second) { + // the y set should be the smaller one for better efficiency + if (x->second->size () < y->second->size ()) { + std::swap (x, y); + } + // join two superclusters typename join_set_list::iterator yset = y->second; x->second->insert (yset->begin (), yset->end ()); @@ -2591,12 +2599,12 @@ private: #if defined(DEBUG_HIER_NETWORK_PROCESSOR) // concistency check for debugging - for (typename std::map::const_iterator j = m_cm2join_map.begin (); j != m_cm2join_map.end (); ++j) { + for (auto j = m_cm2join_map.begin (); j != m_cm2join_map.end (); ++j) { tl_assert (j->second->find (j->first) != j->second->end ()); } - for (typename std::list >::const_iterator i = m_cm2join_sets.begin (); i != m_cm2join_sets.end (); ++i) { - for (typename std::set::const_iterator j = i->begin(); j != i->end(); ++j) { + for (auto i = m_cm2join_sets.begin (); i != m_cm2join_sets.end (); ++i) { + for (auto j = i->begin(); j != i->end(); ++j) { tl_assert(m_cm2join_map.find (*j) != m_cm2join_map.end ()); tl_assert(m_cm2join_map[*j] == i); } @@ -2604,8 +2612,8 @@ private: // the sets must be disjunct std::set all; - for (typename std::list >::const_iterator i = m_cm2join_sets.begin (); i != m_cm2join_sets.end (); ++i) { - for (typename std::set::const_iterator j = i->begin(); j != i->end(); ++j) { + for (auto i = m_cm2join_sets.begin (); i != m_cm2join_sets.end (); ++i) { + for (auto j = i->begin(); j != i->end(); ++j) { tl_assert(all.find (*j) == all.end()); all.insert(*j); } @@ -2700,23 +2708,13 @@ private: } else if (x1 != x2) { int soft = ic->soft; - - // for instance-to-instance interactions the number of connections is more important for the - // cost of the join operation: make the one with more connections the target - // TODO: this will be SLOW for STL's not providing a fast size() - if (mp_cell_clusters->connections_for_cluster (x1).size () < mp_cell_clusters->connections_for_cluster (x2).size ()) { - std::swap (x1, x2); - soft = -soft; - } - if (soft != 0) { register_soft_connection (x1, x2, soft); } else { - mp_cell_clusters->join_cluster_with (x1, x2); - mp_cell_clusters->remove_cluster (x2); + mark_to_join (x1, x2); } @@ -3081,15 +3079,15 @@ hier_clusters::build_hier_connections (cell_clusters_box_converter &cbc, c static std::string desc = tl::to_string (tr ("Instance to instance treatment")); tl::SelfTimer timer (tl::verbosity () > m_base_verbosity + 30, desc); - db::box_scanner bs (true, desc); + db::box_scanner bs (true, desc); for (std::vector::const_iterator inst = inst_storage.begin (); inst != inst_storage.end (); ++inst) { if (! is_breakout_cell (breakout_cells, inst->cell_index ())) { - bs.insert (inst.operator-> (), 0); + bs.insert (inst.operator-> (), cibc (*inst)); } } - bs.process (*rec, 1 /*touching*/, cibc); + bs.process_with_adaptor (*rec, 1 /*touching*/); } // handle local to instance connections @@ -3101,7 +3099,8 @@ hier_clusters::build_hier_connections (cell_clusters_box_converter &cbc, c static std::string desc = tl::to_string (tr ("Local to instance treatment")); tl::SelfTimer timer (tl::verbosity () > m_base_verbosity + 30, desc); - db::box_scanner2, unsigned int, db::Instance, unsigned int> bs2 (true, desc); + local_cluster_box_convert lcbc; + db::box_scanner2, db::Box, db::Instance, db::Box> bs2 (true, desc); for (typename connected_clusters::const_iterator c = local.begin (); c != local.end (); ++c) { @@ -3110,22 +3109,23 @@ hier_clusters::build_hier_connections (cell_clusters_box_converter &cbc, c std::back_insert_iterator > > iout = std::back_inserter (heap); size_t n = c->split (area_ratio, iout); if (n == 0) { - bs2.insert1 (c.operator-> (), 0); + bs2.insert1 (c.operator-> (), lcbc (*c)); } else { typename std::list >::iterator h = heap.end (); while (n-- > 0) { - bs2.insert1 ((--h).operator-> (), 0); + --h; + bs2.insert1 (h.operator-> (), lcbc (*h)); } } } for (std::vector::const_iterator inst = inst_storage.begin (); inst != inst_storage.end (); ++inst) { if (! is_breakout_cell (breakout_cells, inst->cell_index ())) { - bs2.insert2 (inst.operator-> (), 0); + bs2.insert2 (inst.operator-> (), cibc (*inst)); } } - bs2.process (*rec, 1 /*touching*/, local_cluster_box_convert (), cibc); + bs2.process_with_adaptor (*rec, 1 /*touching*/); } diff --git a/src/db/db/dbHierProcessor.cc b/src/db/db/dbHierProcessor.cc index a6af1f211..26cc7608e 100644 --- a/src/db/db/dbHierProcessor.cc +++ b/src/db/db/dbHierProcessor.cc @@ -744,7 +744,7 @@ local_processor_result_computation_task::perform () // LocalProcessorBase implementation LocalProcessorBase::LocalProcessorBase () - : m_report_progress (true), m_nthreads (0), m_max_vertex_count (0), m_area_ratio (0.0), m_boolean_core (false), + : m_report_progress (true), m_nthreads (0), m_max_vertex_count (0), m_area_ratio (0.0), m_top_down (false), m_boolean_core (false), m_base_verbosity (30), mp_vars (0), mp_current_cell (0) { // .. nothing yet .. @@ -1034,84 +1034,90 @@ void local_processor::compute_contexts (local_processor_contexts::const_iterator il = contexts.intruder_layers ().begin (); il != contexts.intruder_layers ().end (); ++il) { + // in top-down mode we are not interested in cell-to-cell interactions, nor shape-to-instance interactions + // except local ones (shape-to-child cells), hence we skip this part + if (! top_down ()) { - db::box_convert inst_bci (*mp_intruder_layout, contexts.actual_intruder_layer (*il)); + // TODO: can we shortcut this if interactions is empty? + for (std::vector::const_iterator il = contexts.intruder_layers ().begin (); il != contexts.intruder_layers ().end (); ++il) { - db::box_scanner2 scanner; - interaction_registration_inst2inst rec (mp_subject_layout, contexts.subject_layer (), mp_intruder_layout, contexts.actual_intruder_layer (*il), contexts.is_foreign (*il), dist, &interactions); + db::box_convert inst_bci (*mp_intruder_layout, contexts.actual_intruder_layer (*il)); - unsigned int id = 0; + db::box_scanner2 scanner; + interaction_registration_inst2inst rec (mp_subject_layout, contexts.subject_layer (), mp_intruder_layout, contexts.actual_intruder_layer (*il), contexts.is_foreign (*il), dist, &interactions); - if (subject_cell == intruder_cell) { + unsigned int id = 0; - // Use the same id's for same instances - this way we can easily detect same instances - // and don't make them self-interacting + if (subject_cell == intruder_cell) { - for (db::Cell::const_iterator i = subject_cell->begin (); !i.at_end (); ++i) { - unsigned int iid = ++id; - if (! inst_bcs (i->cell_inst ()).empty () && ! subject_cell_is_breakout (i->cell_index ())) { - scanner.insert1 (&i->cell_inst (), iid); - } - if (! inst_bci (i->cell_inst ()).empty () && ! intruder_cell_is_breakout (i->cell_index ())) { - scanner.insert2 (&i->cell_inst (), iid); - } - } + // Use the same id's for same instances - this way we can easily detect same instances + // and don't make them self-interacting - } else { - - for (db::Cell::const_iterator i = subject_cell->begin (); !i.at_end (); ++i) { - if (! inst_bcs (i->cell_inst ()).empty () && ! subject_cell_is_breakout (i->cell_index ())) { - scanner.insert1 (&i->cell_inst (), ++id); - } - } - - if (intruder_cell) { - for (db::Cell::const_iterator i = intruder_cell->begin (); !i.at_end (); ++i) { + for (db::Cell::const_iterator i = subject_cell->begin (); !i.at_end (); ++i) { + unsigned int iid = ++id; + if (! inst_bcs (i->cell_inst ()).empty () && ! subject_cell_is_breakout (i->cell_index ())) { + scanner.insert1 (&i->cell_inst (), iid); + } if (! inst_bci (i->cell_inst ()).empty () && ! intruder_cell_is_breakout (i->cell_index ())) { - scanner.insert2 (&i->cell_inst (), ++id); + scanner.insert2 (&i->cell_inst (), iid); } } + + } else { + + for (db::Cell::const_iterator i = subject_cell->begin (); !i.at_end (); ++i) { + if (! inst_bcs (i->cell_inst ()).empty () && ! subject_cell_is_breakout (i->cell_index ())) { + scanner.insert1 (&i->cell_inst (), ++id); + } + } + + if (intruder_cell) { + for (db::Cell::const_iterator i = intruder_cell->begin (); !i.at_end (); ++i) { + if (! inst_bci (i->cell_inst ()).empty () && ! intruder_cell_is_breakout (i->cell_index ())) { + scanner.insert2 (&i->cell_inst (), ++id); + } + } + } + } + for (std::set::const_iterator i = intruders.first.begin (); i != intruders.first.end (); ++i) { + if (! inst_bci (*i).empty ()) { + scanner.insert2 (i.operator-> (), ++id); + } + } + + scanner.process (rec, dist, inst_bcs, inst_bci); + } - for (std::set::const_iterator i = intruders.first.begin (); i != intruders.first.end (); ++i) { - if (! inst_bci (*i).empty ()) { - scanner.insert2 (i.operator-> (), ++id); + if (! intruders.second.empty () || ! intruder_shapes.empty ()) { + + db::box_scanner2 scanner; + db::addressable_object_from_shape heap; + interaction_registration_inst2shape rec (mp_subject_layout, contexts.subject_layer (), dist, &interactions); + + for (db::Cell::const_iterator i = subject_cell->begin (); !i.at_end (); ++i) { + if (! inst_bcs (i->cell_inst ()).empty () && ! subject_cell_is_breakout (i->cell_index ())) { + scanner.insert1 (&i->cell_inst (), 0); + } } - } - scanner.process (rec, dist, inst_bcs, inst_bci); - - } - - if (! intruders.second.empty () || ! intruder_shapes.empty ()) { - - db::box_scanner2 scanner; - db::addressable_object_from_shape heap; - interaction_registration_inst2shape rec (mp_subject_layout, contexts.subject_layer (), dist, &interactions); - - for (db::Cell::const_iterator i = subject_cell->begin (); !i.at_end (); ++i) { - if (! inst_bcs (i->cell_inst ()).empty () && ! subject_cell_is_breakout (i->cell_index ())) { - scanner.insert1 (&i->cell_inst (), 0); + for (typename std::map >::const_iterator il = intruders.second.begin (); il != intruders.second.end (); ++il) { + for (typename std::set::const_iterator i = il->second.begin (); i != il->second.end (); ++i) { + scanner.insert2 (i.operator-> (), il->first); + } } - } - for (typename std::map >::const_iterator il = intruders.second.begin (); il != intruders.second.end (); ++il) { - for (typename std::set::const_iterator i = il->second.begin (); i != il->second.end (); ++i) { - scanner.insert2 (i.operator-> (), il->first); + for (std::map::const_iterator im = intruder_shapes.begin (); im != intruder_shapes.end (); ++im) { + for (db::Shapes::shape_iterator i = im->second->begin (shape_flags ()); !i.at_end (); ++i) { + scanner.insert2 (heap (*i), im->first); + } } - } - for (std::map::const_iterator im = intruder_shapes.begin (); im != intruder_shapes.end (); ++im) { - for (db::Shapes::shape_iterator i = im->second->begin (shape_flags ()); !i.at_end (); ++i) { - scanner.insert2 (heap (*i), im->first); - } - } + scanner.process (rec, dist, inst_bcs, db::box_convert ()); - scanner.process (rec, dist, inst_bcs, db::box_convert ()); + } } @@ -1417,14 +1423,14 @@ local_processor::compute_local_cell (const db::local_processor_conte } } - // local shapes vs. child cell - db::box_convert inst_bci (*mp_intruder_layout, ail); typename std::map >::const_iterator ipl = intruders.second.find (*il); static std::set empty_intruders; - if (! subject_shapes->empty () && (intruder_shapes || ipl != intruders.second.end ())) { + // local shapes vs. local shapes + + if (! top_down () && ! subject_shapes->empty () && (intruder_shapes || ipl != intruders.second.end ())) { if (subject_cell == intruder_cell && contexts.subject_layer () == ail && !foreign) { @@ -1439,6 +1445,8 @@ local_processor::compute_local_cell (const db::local_processor_conte } + // local shapes vs. child cells + if (! subject_shapes->empty () && ! ((! intruder_cell || intruder_cell->begin ().at_end ()) && intruders.first.empty ())) { db::box_scanner2 scanner; @@ -1452,7 +1460,7 @@ local_processor::compute_local_cell (const db::local_processor_conte unsigned int inst_id = 0; - if (subject_cell == intruder_cell && contexts.subject_layer () == ail && !foreign) { + if (! top_down () && subject_cell == intruder_cell && contexts.subject_layer () == ail && !foreign) { // Same cell, same layer -> no shape to child instance interactions because this will be taken care of // by the instances themselves (and their intruders). This also means, we prefer to deal with diff --git a/src/db/db/dbHierProcessor.h b/src/db/db/dbHierProcessor.h index c52dd372e..8d446641a 100644 --- a/src/db/db/dbHierProcessor.h +++ b/src/db/db/dbHierProcessor.h @@ -465,6 +465,16 @@ public: return m_nthreads; } + void set_top_down (bool f) + { + m_top_down = f; + } + + bool top_down () const + { + return m_top_down; + } + void set_max_vertex_count (size_t max_vertex_count) { m_max_vertex_count = max_vertex_count; @@ -525,6 +535,7 @@ private: unsigned int m_nthreads; size_t m_max_vertex_count; double m_area_ratio; + bool m_top_down; bool m_boolean_core; int m_base_verbosity; const db::VariantsCollectorBase *mp_vars; diff --git a/src/db/db/dbHierarchyBuilder.cc b/src/db/db/dbHierarchyBuilder.cc index 8af07fc32..4049f68c3 100644 --- a/src/db/db/dbHierarchyBuilder.cc +++ b/src/db/db/dbHierarchyBuilder.cc @@ -152,14 +152,14 @@ static std::pair > compute_clip_variant (const db::Box & } HierarchyBuilder::HierarchyBuilder (db::Layout *target, unsigned int target_layer, const db::ICplxTrans &trans, HierarchyBuilderShapeReceiver *pipe) - : mp_target (target), m_target_layer (target_layer), m_wants_all_cells (false), m_trans (trans) + : mp_target (target), m_target_layer (target_layer), m_wants_all_cells (false), m_trans (trans), m_sparse_array_limit (-1.0) { set_shape_receiver (pipe); reset (); } HierarchyBuilder::HierarchyBuilder (db::Layout *target, const db::ICplxTrans &trans, HierarchyBuilderShapeReceiver *pipe) - : mp_target (target), m_target_layer (0), m_wants_all_cells (false), m_trans (trans) + : mp_target (target), m_target_layer (0), m_wants_all_cells (false), m_trans (trans), m_sparse_array_limit (-1.0) { set_shape_receiver (pipe); reset (); @@ -396,13 +396,56 @@ HierarchyBuilder::new_inst (const RecursiveShapeIterator *iter, const db::CellIn // for new cells, create this instance if (m_cell_stack.back ().first || m_cm_new_entry) { - db::CellInstArray new_inst (inst, &mp_target->array_repository ()); - new_inst.object () = db::CellInst (new_cell); - new_inst.transform (always_apply); - new_inst.transform_into (m_trans); - for (std::vector::const_iterator c = m_cell_stack.back ().second.begin (); c != m_cell_stack.back ().second.end (); ++c) { - (*c)->insert (new_inst); + + // check if the cell array is "sparse" according to + // "sparse_array_limit" and resolve into single instances if so + bool resolve = false; + if (m_sparse_array_limit >= 0.0 && inst.size () > 1) { + + if (m_sparse_array_limit == 0.0) { + resolve = true; + } else { + db::box_convert bc (*iter->layout ()); + auto a1 = bc (inst.object ()).area (); + auto aa = inst.bbox (bc).area (); + if (a1 * m_sparse_array_limit * inst.size () < aa) { + resolve = true; + } + } + } + + if (resolve) { + + // resolve the instances of the array + for (auto i = inst.begin (); !i.at_end (); ++i) { + + db::CellInstArray new_inst; + if (inst.is_complex ()) { + new_inst = db::CellInstArray (db::CellInst (new_cell), inst.complex_trans (*i)); + } else { + new_inst = db::CellInstArray (db::CellInst (new_cell), *i); + } + new_inst.transform (always_apply); + new_inst.transform_into (m_trans); + for (std::vector::const_iterator c = m_cell_stack.back ().second.begin (); c != m_cell_stack.back ().second.end (); ++c) { + (*c)->insert (new_inst); + } + + } + + } else { + + db::CellInstArray new_inst (inst, &mp_target->array_repository ()); + new_inst.object () = db::CellInst (new_cell); + new_inst.transform (always_apply); + new_inst.transform_into (m_trans); + for (std::vector::const_iterator c = m_cell_stack.back ().second.begin (); c != m_cell_stack.back ().second.end (); ++c) { + (*c)->insert (new_inst); + } + + } + } // To see the cell once, use NI_single. If we did see the cell already, skip the whole instance array. diff --git a/src/db/db/dbHierarchyBuilder.h b/src/db/db/dbHierarchyBuilder.h index cf08453a5..80c67c3cd 100644 --- a/src/db/db/dbHierarchyBuilder.h +++ b/src/db/db/dbHierarchyBuilder.h @@ -314,6 +314,25 @@ public: m_wants_all_cells = f; } + /** + * @brief Sets the "sparse array" limit + * + * Sparse arrays are instance arrays whose bounding box is no longer a + * good approximation of the covered area. The "sparse array ratio" is + * the area of the bounding box divided by the area of the bounding box + * of a single instance. + * + * Arrays above this limit will be resolved into single instances. + * + * Setting this value to 0 will resolve all arrays. Setting this + * value to a negative value will never split arrays. The latter + * is the default. + */ + void set_sparse_array_limit (double l) + { + m_sparse_array_limit = l; + } + /** * @brief Reset the builder - performs a new initial pass */ @@ -440,6 +459,8 @@ private: db::Cell *mp_initial_cell; db::ICplxTrans m_trans; + + double m_sparse_array_limit; }; } diff --git a/src/db/db/dbOriginalLayerRegion.cc b/src/db/db/dbOriginalLayerRegion.cc index ccc4c18cf..674ff7ec3 100644 --- a/src/db/db/dbOriginalLayerRegion.cc +++ b/src/db/db/dbOriginalLayerRegion.cc @@ -317,6 +317,12 @@ OriginalLayerRegion::begin_merged () const } } +RegionIteratorDelegate * +OriginalLayerRegion::begin_unmerged () const +{ + return begin (); +} + std::pair OriginalLayerRegion::begin_iter () const { @@ -334,6 +340,12 @@ OriginalLayerRegion::begin_merged_iter () const } } +std::pair +OriginalLayerRegion::begin_unmerged_iter () const +{ + return std::make_pair (m_iter, m_iter_trans); +} + bool OriginalLayerRegion::empty () const { diff --git a/src/db/db/dbOriginalLayerRegion.h b/src/db/db/dbOriginalLayerRegion.h index dd5fe82e5..a72db588b 100644 --- a/src/db/db/dbOriginalLayerRegion.h +++ b/src/db/db/dbOriginalLayerRegion.h @@ -51,9 +51,11 @@ public: virtual RegionIteratorDelegate *begin () const; virtual RegionIteratorDelegate *begin_merged () const; + virtual RegionIteratorDelegate *begin_unmerged () const; virtual std::pair begin_iter () const; virtual std::pair begin_merged_iter () const; + virtual std::pair begin_unmerged_iter () const; virtual bool empty () const; diff --git a/src/db/db/dbRegion.h b/src/db/db/dbRegion.h index 1cd9d1bbd..655462a01 100644 --- a/src/db/db/dbRegion.h +++ b/src/db/db/dbRegion.h @@ -349,6 +349,17 @@ public: return RegionIterator (mp_delegate->begin_merged ()); } + /** + * @brief Returns the unmerged polygons + * + * "unmerged" polygons are polygons which are optimized for local operations, + * specifically broken according to the area ratio and max vertex count. + */ + const_iterator begin_unmerged () const + { + return RegionIterator (mp_delegate->begin_unmerged ()); + } + /** * @brief Delivers a RecursiveShapeIterator pointing to the polygons plus the necessary transformation */ @@ -365,6 +376,14 @@ public: return mp_delegate->begin_merged_iter (); } + /** + * @brief Delivers a RecursiveShapeIterator pointing to the unmerged polygons plus the necessary transformation + */ + std::pair begin_unmerged_iter () const + { + return mp_delegate->begin_unmerged_iter (); + } + /** * @brief Inserts the given shape (working object) into the region */ @@ -1312,6 +1331,25 @@ public: return std::make_pair (Region (res.first), Region (res.second)); } + /** + * @brief For deep regions, remove parts of shapes which are covered by child cell shapes (push shapes into hierarchy) + * + * This will reduce the hierarchical load. This means that shapes that do not add information + * will be removed, so their interactions with child cells does not need to be considered. + * These shapes are - maybe partially - "peeled" from upper hierarchy layers. + * + * The complexity factor indicates by how much the complexity of the resulting polygons + * (counted in terms of vertexes) can increase before a shape is left as it was. + * A negative complexity factor indicates, that no such limit exists. A zero complexity factor + * means that only shapes are removed if they are covered entirely by shapes from below the + * hierarchy. + */ + Region &peel (double complexity_factor = 0.0) + { + set_delegate (mp_delegate->peel (complexity_factor)); + return *this; + } + /** * @brief Selects all polygons of this region which are completely outside polygons from the other region * diff --git a/src/db/db/dbRegionDelegate.h b/src/db/db/dbRegionDelegate.h index e6714bf56..6c266350a 100644 --- a/src/db/db/dbRegionDelegate.h +++ b/src/db/db/dbRegionDelegate.h @@ -185,9 +185,11 @@ public: virtual RegionIteratorDelegate *begin () const = 0; virtual RegionIteratorDelegate *begin_merged () const = 0; + virtual RegionIteratorDelegate *begin_unmerged () const = 0; virtual std::pair begin_iter () const = 0; virtual std::pair begin_merged_iter () const = 0; + virtual std::pair begin_unmerged_iter () const = 0; virtual bool empty () const = 0; virtual bool is_box () const = 0; @@ -246,6 +248,8 @@ public: virtual RegionDelegate *add (const Region &other) const = 0; virtual std::pair andnot_with (const Region &other, PropertyConstraint prop_constraint) const = 0; + virtual RegionDelegate *peel (double complexity_factor) const = 0; + virtual RegionDelegate *selected_outside (const Region &other) const = 0; virtual RegionDelegate *selected_not_outside (const Region &other) const = 0; virtual std::pair selected_outside_pair (const Region &other) const = 0; diff --git a/src/db/db/dbShapeCollectionUtils.h b/src/db/db/dbShapeCollectionUtils.h index 93e34da9f..c9df9c0ff 100644 --- a/src/db/db/dbShapeCollectionUtils.h +++ b/src/db/db/dbShapeCollectionUtils.h @@ -124,6 +124,27 @@ private: db::Shapes *mp_shapes; }; +/** + * @brief A shape delivery implementation for polygons with properties + */ +template <> +struct DB_PUBLIC shape_collection_processor_delivery +{ + shape_collection_processor_delivery (db::Layout *layout, db::Shapes *shapes) + : mp_layout (layout), mp_shapes (shapes) + { } + + void put (const db::PolygonWithProperties &result) + { + tl::MutexLocker locker (&mp_layout->lock ()); + mp_shapes->insert (db::PolygonRefWithProperties (db::PolygonRef (result, mp_layout->shape_repository ()), result.properties_id ())); + } + +private: + db::Layout *mp_layout; + db::Shapes *mp_shapes; +}; + /** * @brief A shape delivery implementation for texts */ @@ -145,6 +166,27 @@ private: db::Shapes *mp_shapes; }; +/** + * @brief A shape delivery implementation for texts with properties + */ +template <> +struct DB_PUBLIC shape_collection_processor_delivery +{ + shape_collection_processor_delivery (db::Layout *layout, db::Shapes *shapes) + : mp_layout (layout), mp_shapes (shapes) + { } + + void put (const db::TextWithProperties &result) + { + tl::MutexLocker locker (&mp_layout->lock ()); + mp_shapes->insert (db::TextRefWithProperties (db::TextRef (result, mp_layout->shape_repository ()), result.properties_id ())); + } + +private: + db::Layout *mp_layout; + db::Shapes *mp_shapes; +}; + /** * @brief A generic delivery */ diff --git a/src/db/db/gsiDeclDbDeepShapeStore.cc b/src/db/db/gsiDeclDbDeepShapeStore.cc index 07137940e..adde28392 100644 --- a/src/db/db/gsiDeclDbDeepShapeStore.cc +++ b/src/db/db/gsiDeclDbDeepShapeStore.cc @@ -126,6 +126,26 @@ Class decl_dbDeepShapeStore ("db", "DeepShapeStore", "@brief Gets a flag wether to copy the full hierarchy for the working layouts\n" "This attribute has been introduced in version 0.28.10." ) + + gsi::method ("sparse_array_limit=", &db::DeepShapeStore::set_sparse_array_limit, gsi::arg ("limit"), + "@brief Sets the \"sparse array\" limit\n" + "\n" + "Sparse arrays are instance arrays whose bounding box is no longer a\n" + "good approximation of the covered area. The \"sparse array ratio\" is\n" + "the area of the bounding box divided by the area of the bounding box\n" + "of a single instance.\n" + "\n" + "Arrays above this limit will be resolved into single instances.\n" + "\n" + "Setting this value to 0 will resolve all arrays. Setting this\n" + "value to a negative value will never split arrays. The latter\n" + "is the default.\n" + "\n" + "This attribute has been introduced in version 0.30.8." + ) + + gsi::method ("sparse_array_limit", &db::DeepShapeStore::sparse_array_limit, + "@brief Gets the \"sparse array\" limit\n" + "This attribute has been introduced in version 0.30.8." + ) + gsi::method ("reject_odd_polygons=", &db::DeepShapeStore::set_reject_odd_polygons, gsi::arg ("count"), "@brief Sets a flag indicating whether to reject odd polygons\n" "\n" @@ -259,6 +279,9 @@ Class decl_dbDeepShapeStore ("db", "DeepShapeStore", "\n" "This method has been added in version 0.26.1\n" ) + + gsi::method ("layout", static_cast (&db::DeepShapeStore::layout), gsi::arg ("index"), + "@hide" + ) + gsi::method ("push_state", &db::DeepShapeStore::push_state, "@brief Pushes the store's state on the state state\n" "This will save the stores state (\\threads, \\max_vertex_count, \\max_area_ratio, breakout cells ...) on " diff --git a/src/db/db/gsiDeclDbRegion.cc b/src/db/db/gsiDeclDbRegion.cc index 2f2dd85fa..528342e4a 100644 --- a/src/db/db/gsiDeclDbRegion.cc +++ b/src/db/db/gsiDeclDbRegion.cc @@ -2732,6 +2732,20 @@ Class decl_Region (decl_dbShapeCollection, "db", "Region", "\n" "This method has been introduced in version 0.29.3." ) + + method ("peel", &db::Region::peel, gsi::arg ("complexity_factor", -1.0, "unlimited"), + "@brief Removes shapes parts which are overlapping with child cell shapes, reducing hierarchical load.\n" + "\n" + "This method will reduce the hierarchical load. This means that shapes that do not add information\n" + "will be removed, so their interactions with child cells does not need to be considered.\n" + "These shapes are - maybe partially - \"peeled\" from upper hierarchy layers.\n" + "\n" + "The complexity factor determines if the subtraction is rejected when the complexity - measured as polygon " + "vertex count - increases by more than the given factor. This allows trading off hierarchical complexity vs. " + "polygon complexity. A negative factor means no rejection. A factor of zero means that only shapes are removed " + "which are entirely covered by shapes from below the hierarchy.\n" + "\n" + "This method has been introduced in version 0.30.8." + ) + method_ext ("andnot", &andnot, gsi::arg ("other"), gsi::arg ("property_constraint", db::IgnoreProperties, "IgnoreProperties"), "@brief Returns the boolean AND and NOT between self and the other region\n" "\n" diff --git a/src/db/unit_tests/dbDeepRegionTests.cc b/src/db/unit_tests/dbDeepRegionTests.cc index 947abd71a..108b5ed4b 100644 --- a/src/db/unit_tests/dbDeepRegionTests.cc +++ b/src/db/unit_tests/dbDeepRegionTests.cc @@ -3158,3 +3158,186 @@ TEST(deep_region_merged_with_pseudo_labels) rr2.merge (); EXPECT_EQ (rr2.to_string (), "(0,0;0,2000;2000,2000;2000,0){A=>17,B=>42};(998,2998;998,3002;1002,3002;1002,2998)"); } + +namespace { + +class AttachPropertiesProcessor + : public db::PolygonProcessorBase +{ +public: + AttachPropertiesProcessor (db::properties_id_type pid) + : m_pid (pid) + { } + + virtual void process (const db::PolygonWithProperties &s, std::vector &res) const + { + res.push_back (db::PolygonWithProperties (s, m_pid)); + } + + virtual bool result_is_merged () const + { + return true; + } + +private: + db::properties_id_type m_pid; +}; + +} + +TEST(deep_unmerged_regions) +{ + db::Layout ly; + + db::Cell &top = ly.cell (ly.add_cell ("TOP")); + + unsigned int l1 = ly.insert_layer (db::LayerProperties (1, 0)); + unsigned int l2 = ly.insert_layer (db::LayerProperties (2, 0)); + + top.shapes (l1).insert (db::Box (0, 0, 2000, 2000)); + top.shapes (l2).insert (db::Box (200, 200, 1800, 1800)); + + db::DeepShapeStore dss; + dss.set_max_area_ratio (2.0); + + db::Region r1 (db::RecursiveShapeIterator (ly, top, l1), dss); + db::Region r2 (db::RecursiveShapeIterator (ly, top, l2), dss); + + db::DeepRegion *r1_deep = dynamic_cast (r1.delegate ()); + EXPECT_EQ (r1_deep->is_merged (), false); + EXPECT_EQ (r1_deep->merged_polygons_available (), false); + + db::Region r12 = (r1 - r2).merged (); + EXPECT_EQ (r12.to_string (), "(0,0;0,2000;2000,2000;2000,0/200,200;1800,200;1800,1800;200,1800)"); + db::DeepRegion *r12_deep = dynamic_cast (r12.delegate ()); + + EXPECT_EQ (r12_deep->is_merged (), true); + EXPECT_EQ (r12_deep->merged_polygons_available (), true); + + // this will force r12 back into unmerged state, but merged polygons are still available + db::Region rx = r1 | r12; + + EXPECT_EQ (r12_deep->is_merged (), false); + EXPECT_EQ (r12_deep->merged_polygons_available (), true); + EXPECT_EQ (r12.to_string (), "(200,0;200,200;2000,200;2000,0);(1800,200;1800,1000;2000,1000;2000,200);(0,0;0,1000;200,1000;200,0);(1800,1000;1800,2000;2000,2000;2000,1000);(0,1000;0,1800;200,1800;200,1000);(0,1800;0,2000;1800,2000;1800,1800)"); + EXPECT_EQ (rx.to_string (), "(0,0;0,2000;2000,2000;2000,0)"); + + // repeat with properties + + db::PropertiesSet ps; + ps.insert (tl::Variant ("n"), tl::Variant (42)); + auto pid = db::properties_id (ps); + AttachPropertiesProcessor ap (pid); + r12 = (r1 - r2).merged ().processed (ap); + + EXPECT_EQ (r12.to_string (), "(0,0;0,2000;2000,2000;2000,0/200,200;1800,200;1800,1800;200,1800){n=>42}"); + r12_deep = dynamic_cast (r12.delegate ()); + + EXPECT_EQ (r12_deep->is_merged (), true); + EXPECT_EQ (r12_deep->merged_polygons_available (), true); + + rx = r1 | r12; + + EXPECT_EQ (r12_deep->is_merged (), false); + EXPECT_EQ (r12_deep->merged_polygons_available (), true); + EXPECT_EQ (r12.to_string (), "(200,0;200,200;2000,200;2000,0){n=>42};(1800,200;1800,1000;2000,1000;2000,200){n=>42};(0,0;0,1000;200,1000;200,0){n=>42};(1800,1000;1800,2000;2000,2000;2000,1000){n=>42};(0,1000;0,1800;200,1800;200,1000){n=>42};(0,1800;0,2000;1800,2000;1800,1800){n=>42}"); + EXPECT_EQ (rx.to_string (), "(0,0;0,2000;2000,2000;2000,0);(0,0;0,2000;2000,2000;2000,0/200,200;1800,200;1800,1800;200,1800){n=>42}"); + + // now with "+" instead of "|" + + db::Region r12p = (r1 - r2).merged (); + db::DeepRegion *r12p_deep = dynamic_cast (r12p.delegate ()); + + EXPECT_EQ (r12p_deep->is_merged (), true); + EXPECT_EQ (r12p_deep->merged_polygons_available (), true); + + // this will also force r12 back into unmerged state, but merged polygons are still available + db::Region ry = (r1 + r12p).merged (); + + EXPECT_EQ (r12p_deep->is_merged (), false); + EXPECT_EQ (r12p_deep->merged_polygons_available (), true); + EXPECT_EQ (r12p.to_string (), "(200,0;200,200;2000,200;2000,0);(1800,200;1800,1000;2000,1000;2000,200);(0,0;0,1000;200,1000;200,0);(1800,1000;1800,2000;2000,2000;2000,1000);(0,1000;0,1800;200,1800;200,1000);(0,1800;0,2000;1800,2000;1800,1800)"); + EXPECT_EQ (ry.to_string (), "(0,0;0,2000;2000,2000;2000,0)"); +} + +TEST(processed_delivers_polygon_refs) +{ + db::Layout ly; + + db::Cell &top = ly.cell (ly.add_cell ("TOP")); + + unsigned int l1 = ly.insert_layer (db::LayerProperties (1, 0)); + unsigned int l2 = ly.insert_layer (db::LayerProperties (2, 0)); + + top.shapes (l1).insert (db::Box (0, 0, 2000, 2000)); + top.shapes (l2).insert (db::Box (200, 200, 1800, 1800)); + + db::DeepShapeStore dss; + + db::Region r1 (db::RecursiveShapeIterator (ly, top, l1), dss); + db::Region r2 (db::RecursiveShapeIterator (ly, top, l2), dss); + + db::PropertiesSet ps; + ps.insert (tl::Variant ("n"), tl::Variant (42)); + auto pid = db::properties_id (ps); + AttachPropertiesProcessor ap (pid); + + db::Region r12 = (r1 - r2).merged ().processed (ap); + + r12.set_join_properties_on_merge (true); + + db::Region rx = r1 | r12; + + EXPECT_EQ (rx.to_string (), "(0,0;0,2000;2000,2000;2000,0);(0,0;0,2000;2000,2000;2000,0/200,200;1800,200;1800,1800;200,1800){n=>42}"); +} + +TEST(deep_region_peel) +{ + db::Layout ly; + { + std::string fn (tl::testdata ()); + fn += "/algo/deep_region_peel.gds"; + tl::InputStream stream (fn); + db::Reader reader (stream); + reader.read (ly); + } + + db::cell_index_type top_cell_index = *ly.begin_top_down (); + db::Cell &top_cell = ly.cell (top_cell_index); + + db::DeepShapeStore dss; + + unsigned int l1 = ly.get_layer (db::LayerProperties (1, 0)); + unsigned int l2 = ly.get_layer (db::LayerProperties (2, 0)); + + db::RecursiveShapeIterator si1 (ly, top_cell, l1); + si1.apply_property_translator (db::PropertiesTranslator::make_pass_all ()); + + db::RecursiveShapeIterator si2 (ly, top_cell, l2); + si2.apply_property_translator (db::PropertiesTranslator::make_pass_all ()); + + db::Region r1 (si1, dss); + db::Region r2 (si2, dss); + + unsigned int l1001 = ly.get_layer (db::LayerProperties (1001, 0)); + unsigned int l1002 = ly.get_layer (db::LayerProperties (1002, 0)); + unsigned int l1011 = ly.get_layer (db::LayerProperties (1011, 0)); + unsigned int l1012 = ly.get_layer (db::LayerProperties (1012, 0)); + unsigned int l1021 = ly.get_layer (db::LayerProperties (1021, 0)); + unsigned int l1022 = ly.get_layer (db::LayerProperties (1022, 0)); + unsigned int l1031 = ly.get_layer (db::LayerProperties (1031, 0)); + unsigned int l1032 = ly.get_layer (db::LayerProperties (1032, 0)); + + db::Region (r1).peel (-1.0).insert_into (&ly, top_cell_index, l1001); + db::Region (r2).peel (-1.0).insert_into (&ly, top_cell_index, l1002); + db::Region (r1).peel (0.0).insert_into (&ly, top_cell_index, l1011); + db::Region (r2).peel (0.0).insert_into (&ly, top_cell_index, l1012); + db::Region (r1).peel (2.0).insert_into (&ly, top_cell_index, l1021); + db::Region (r2).peel (2.0).insert_into (&ly, top_cell_index, l1022); + db::Region (r1).peel (4.0).insert_into (&ly, top_cell_index, l1031); + db::Region (r2).peel (4.0).insert_into (&ly, top_cell_index, l1032); + + CHECKPOINT(); + db::compare_layouts (_this, ly, tl::testdata () + "/algo/deep_region_peel_au.gds"); +} + diff --git a/src/db/unit_tests/dbDeepShapeStoreTests.cc b/src/db/unit_tests/dbDeepShapeStoreTests.cc index 102d26994..ea0acbde1 100644 --- a/src/db/unit_tests/dbDeepShapeStoreTests.cc +++ b/src/db/unit_tests/dbDeepShapeStoreTests.cc @@ -376,3 +376,111 @@ TEST(8_RestoreWithCellSelection3) db::compare_layouts (_this, ly, tl::testdata () + "/algo/dss_bug3_au.gds"); } +TEST(9_sparse_array_limit) +{ + db::Layout ly; + + { + std::string fn (tl::testdata ()); + fn += "/algo/dss_sparse_array.gds"; + tl::InputStream stream (fn); + db::Reader reader (stream); + reader.read (ly); + } + + unsigned int l2 = ly.get_layer (db::LayerProperties (2, 0)); + unsigned int l1 = ly.get_layer (db::LayerProperties (1, 0)); + unsigned int l12 = ly.get_layer (db::LayerProperties (12, 0)); + unsigned int l11 = ly.get_layer (db::LayerProperties (11, 0)); + + db::Cell &top_cell = ly.cell (*ly.begin_top_down ()); + + db::RecursiveShapeIterator in_it1 (ly, top_cell, l1); + db::RecursiveShapeIterator in_it2 (ly, top_cell, l2); + + { + db::DeepShapeStore dss; + EXPECT_EQ (dss.sparse_array_limit (), -1.0); + + db::Region in_region1 (in_it1, dss); + db::Region in_region2 (in_it2, dss); + + const db::Layout &dss_ly = dss.layout (0); + const db::Cell &dss_top_cell = dss_ly.cell (*dss_ly.begin_top_down ()); + size_t n_inst = 0; + size_t n_total = 0; + for (auto i = dss_top_cell.begin (); ! i.at_end (); ++i) { + ++n_inst; + n_total += i->size (); + } + + // 2 arrays, 1 single inst + EXPECT_EQ (n_inst, size_t (3)); + EXPECT_EQ (n_total, size_t (19)); + + in_region1.sized (1000).insert_into (&ly, top_cell.cell_index (), l11); + in_region2.sized (1000).insert_into (&ly, top_cell.cell_index (), l12); + + db::compare_layouts (_this, ly, tl::testdata () + "/algo/dss_sparse_array_au1.gds"); + } + + ly.clear_layer (l11); + ly.clear_layer (l12); + + { + db::DeepShapeStore dss; + dss.set_sparse_array_limit (8.0); + EXPECT_EQ (dss.sparse_array_limit (), 8.0); + + db::Region in_region1 (in_it1, dss); + db::Region in_region2 (in_it2, dss); + + const db::Layout &dss_ly = dss.layout (0); + const db::Cell &dss_top_cell = dss_ly.cell (*dss_ly.begin_top_down ()); + size_t n_inst = 0; + size_t n_total = 0; + for (auto i = dss_top_cell.begin (); ! i.at_end (); ++i) { + ++n_inst; + n_total += i->size (); + } + + // 1 array, 1 single inst, 1 3x3 array resolved (=9) + EXPECT_EQ (n_inst, size_t (11)); + EXPECT_EQ (n_total, size_t (19)); + + in_region1.sized (1000).insert_into (&ly, top_cell.cell_index (), l11); + in_region2.sized (1000).insert_into (&ly, top_cell.cell_index (), l12); + + db::compare_layouts (_this, ly, tl::testdata () + "/algo/dss_sparse_array_au1.gds"); + } + + ly.clear_layer (l11); + ly.clear_layer (l12); + + { + db::DeepShapeStore dss; + dss.set_sparse_array_limit (1.1); + + db::Region in_region1 (in_it1, dss); + db::Region in_region2 (in_it2, dss); + + const db::Layout &dss_ly = dss.layout (0); + const db::Cell &dss_top_cell = dss_ly.cell (*dss_ly.begin_top_down ()); + size_t n_inst = 0; + size_t n_total = 0; + for (auto i = dss_top_cell.begin (); ! i.at_end (); ++i) { + ++n_inst; + n_total += i->size (); + } + + // 2 3x3 arrays resolved, 1 single inst + EXPECT_EQ (n_inst, size_t (19)); + EXPECT_EQ (n_total, size_t (19)); + + in_region1.sized (1000).insert_into (&ly, top_cell.cell_index (), l11); + in_region2.sized (1000).insert_into (&ly, top_cell.cell_index (), l12); + + db::compare_layouts (_this, ly, tl::testdata () + "/algo/dss_sparse_array_au1.gds"); + } +} + diff --git a/src/db/unit_tests/dbLayoutToNetlistTests.cc b/src/db/unit_tests/dbLayoutToNetlistTests.cc index 8967d2063..b250040ce 100644 --- a/src/db/unit_tests/dbLayoutToNetlistTests.cc +++ b/src/db/unit_tests/dbLayoutToNetlistTests.cc @@ -375,7 +375,7 @@ TEST(1_BasicExtraction) EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (5.3, 0.0))), "RINGO:VSS"); EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (2.6, 1.0))), "RINGO:$I39"); - EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (6.4, 1.0))), "RINGO:$I2"); + EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (6.4, 1.0))), "RINGO:$I12"); // test build_all_nets @@ -576,7 +576,7 @@ TEST(1_BasicExtraction) EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (5.3, 0.0))), "RINGO:VSS"); EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (2.6, 1.0))), "RINGO:$I39"); - EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (6.4, 1.0))), "RINGO:$I2"); + EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (6.4, 1.0))), "RINGO:$I12"); // use this opportunity to check joining of nets with cluster joining db::Circuit *top = l2n.netlist ()->circuit_by_name ("RINGO"); @@ -616,7 +616,7 @@ TEST(1_BasicExtraction) EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (5.3, 0.0))), "RINGO:VDD,VSS"); EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (2.6, 1.0))), "RINGO:$I39"); - EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (6.4, 1.0))), "RINGO:$I2"); + EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (6.4, 1.0))), "RINGO:$I12"); // compare the collected test data diff --git a/src/doc/doc/about/drc_ref_global.xml b/src/doc/doc/about/drc_ref_global.xml index 20955b730..958807cd2 100644 --- a/src/doc/doc/about/drc_ref_global.xml +++ b/src/doc/doc/about/drc_ref_global.xml @@ -2024,6 +2024,27 @@ See enclosing for more details about the various ways t

+

"sparse_array_limit" - Gets or sets the sparse array singularization limit

+ +

Usage:

+
    +
  • sparse_array_limit(limit)
    • +
  • sparse_array_limit
    • +
+

+In deep mode, array instances with a bad ratio of overall bounding box area +vs. actually covered area, induce a performance penalty, because their bounding +box is not longer a good approximation for their footprint. +The "sparse array limit" defines the ratio of array instance bounding box area +vs. sum of bounding box areas of the individual instances, above which the array +is resolved into single instances. +

+Use this method without an argument to get the current value. +

+By default, this feature is off (the sparse array limit value is negative). +If your design uses many arrays with a bad coverage, you can set the sparse +array limit to a value of 10 for example. +

"squares" - Selects all polygons which are squares

Usage:

diff --git a/src/drc/drc/built-in-macros/_drc_engine.rb b/src/drc/drc/built-in-macros/_drc_engine.rb index 9aee34eca..d8d207390 100644 --- a/src/drc/drc/built-in-macros/_drc_engine.rb +++ b/src/drc/drc/built-in-macros/_drc_engine.rb @@ -197,10 +197,11 @@ module DRC @total_timer = nil @drc_progress = nil - # initialize the defaults for max_area_ratio, max_vertex_count + # initialize the defaults for max_area_ratio, max_vertex_count, sparse_array_limit dss = RBA::DeepShapeStore::new @max_area_ratio = dss.max_area_ratio @max_vertex_count = dss.max_vertex_count + @sparse_array_limit = dss.sparse_array_limit @deep_reject_odd_polygons = dss.reject_odd_polygons dss._destroy @@ -1309,6 +1310,43 @@ module DRC self.max_vertex_count(count) end + # %DRC% + # @name sparse_array_limit + # @brief Gets or sets the sparse array singularization limit + # @synopsis sparse_array_limit(limit) + # @synopsis sparse_array_limit + # + # In deep mode, array instances with a bad ratio of overall bounding box area + # vs. actually covered area, induce a performance penalty, because their bounding + # box is not longer a good approximation for their footprint. + # The "sparse array limit" defines the ratio of array instance bounding box area + # vs. sum of bounding box areas of the individual instances, above which the array + # is resolved into single instances. + # + # Use this method without an argument to get the current value. + # + # By default, this feature is off (the sparse array limit value is negative). + # If your design uses many arrays with a bad coverage, you can set the sparse + # array limit to a value of 10 for example. + + def sparse_array_limit(sal = nil) + if sal + if @dss + raise("sparse_array_limit must be set before the first 'input' statement in deep mode") + end + if sal.is_a?(1.0.class) || sal.is_a?(1.class) + @sparse_array_limit = sal + else + raise("Argument is not numerical in sparse_array_limit") + end + end + @sparse_array_limit + end + + def sparse_array_limit=(sal) + self.sparse_array_limit(sal) + end + # %DRC% # @name max_area_ratio # @brief Gets or sets the maximum bounding box to polygon area ratio for deep mode fragmentation @@ -3305,6 +3343,7 @@ CODE @dss.reject_odd_polygons = @deep_reject_odd_polygons @dss.max_vertex_count = @max_vertex_count @dss.max_area_ratio = @max_area_ratio + @dss.sparse_array_limit = @sparse_array_limit r = cls.new(iter, @dss, RBA::ICplxTrans::new(sf.to_f)) diff --git a/src/drc/unit_tests/drcSimpleTests.cc b/src/drc/unit_tests/drcSimpleTests.cc index 5efe37ba9..2d6db90f1 100644 --- a/src/drc/unit_tests/drcSimpleTests.cc +++ b/src/drc/unit_tests/drcSimpleTests.cc @@ -2108,3 +2108,8 @@ TEST(147_MeasureNetsWithL2N) compare_text_files (output, au_output); } +TEST(148_sparse_array_limit) +{ + run_test (_this, "148", true); +} + diff --git a/src/lvs/unit_tests/lvsTests.cc b/src/lvs/unit_tests/lvsTests.cc index d5f8a4dc6..7e82ce590 100644 --- a/src/lvs/unit_tests/lvsTests.cc +++ b/src/lvs/unit_tests/lvsTests.cc @@ -154,7 +154,7 @@ TEST(16_private) TEST(17_private) { test_is_long_runner (); - run_test (_this, "test_17.lylvs", "test_17b.cir.gz", "test_17.gds.gz", true, "test_17b_6.lvsdb"); + run_test (_this, "test_17.lylvs", "test_17b.cir.gz", "test_17.gds.gz", true, "test_17b_7.lvsdb"); } TEST(18_private) @@ -172,7 +172,7 @@ TEST(19_private) TEST(20_private) { // test_is_long_runner (); - run_test (_this, "test_20.lylvs", "test_20.cir.gz", "test_20.gds.gz", true, "test_20_5.lvsdb"); + run_test (_this, "test_20.lylvs", "test_20.cir.gz", "test_20.gds.gz", true, "test_20_6.lvsdb"); } TEST(21_private) diff --git a/testdata/algo/deep_region_au9a.gds b/testdata/algo/deep_region_au9a.gds index 16dd35174..615373aae 100644 Binary files a/testdata/algo/deep_region_au9a.gds and b/testdata/algo/deep_region_au9a.gds differ diff --git a/testdata/algo/deep_region_peel.gds b/testdata/algo/deep_region_peel.gds new file mode 100644 index 000000000..0dba10212 Binary files /dev/null and b/testdata/algo/deep_region_peel.gds differ diff --git a/testdata/algo/deep_region_peel_au.gds b/testdata/algo/deep_region_peel_au.gds new file mode 100644 index 000000000..174ecb973 Binary files /dev/null and b/testdata/algo/deep_region_peel_au.gds differ diff --git a/testdata/algo/device_extract_au13_circuits.gds b/testdata/algo/device_extract_au13_circuits.gds index 131540011..b396d222d 100644 Binary files a/testdata/algo/device_extract_au13_circuits.gds and b/testdata/algo/device_extract_au13_circuits.gds differ diff --git a/testdata/algo/device_extract_au14_circuits.gds b/testdata/algo/device_extract_au14_circuits.gds index 11fecc306..237ca6577 100644 Binary files a/testdata/algo/device_extract_au14_circuits.gds and b/testdata/algo/device_extract_au14_circuits.gds differ diff --git a/testdata/algo/device_extract_au1_dup_inst_with_rec_nets.gds b/testdata/algo/device_extract_au1_dup_inst_with_rec_nets.gds index 8df8f4374..a010888e3 100644 Binary files a/testdata/algo/device_extract_au1_dup_inst_with_rec_nets.gds and b/testdata/algo/device_extract_au1_dup_inst_with_rec_nets.gds differ diff --git a/testdata/algo/device_extract_au1_joined_nets.gds b/testdata/algo/device_extract_au1_joined_nets.gds index 919bc22a3..7ce83b1e2 100644 Binary files a/testdata/algo/device_extract_au1_joined_nets.gds and b/testdata/algo/device_extract_au1_joined_nets.gds differ diff --git a/testdata/algo/device_extract_au1_rebuild_nr.gds b/testdata/algo/device_extract_au1_rebuild_nr.gds index 3432e15c6..e4b741123 100644 Binary files a/testdata/algo/device_extract_au1_rebuild_nr.gds and b/testdata/algo/device_extract_au1_rebuild_nr.gds differ diff --git a/testdata/algo/device_extract_au1_rebuild_pf.gds b/testdata/algo/device_extract_au1_rebuild_pf.gds index 72911a17f..05aa0b980 100644 Binary files a/testdata/algo/device_extract_au1_rebuild_pf.gds and b/testdata/algo/device_extract_au1_rebuild_pf.gds differ diff --git a/testdata/algo/device_extract_au1_rebuild_pr.gds b/testdata/algo/device_extract_au1_rebuild_pr.gds index ef85fab2d..9725c79bf 100644 Binary files a/testdata/algo/device_extract_au1_rebuild_pr.gds and b/testdata/algo/device_extract_au1_rebuild_pr.gds differ diff --git a/testdata/algo/device_extract_au1_with_rec_nets.gds b/testdata/algo/device_extract_au1_with_rec_nets.gds index 9768f35d5..7539914d7 100644 Binary files a/testdata/algo/device_extract_au1_with_rec_nets.gds and b/testdata/algo/device_extract_au1_with_rec_nets.gds differ diff --git a/testdata/algo/device_extract_au2_with_rec_nets.gds b/testdata/algo/device_extract_au2_with_rec_nets.gds index a92ab6744..0a0d7faa3 100644 Binary files a/testdata/algo/device_extract_au2_with_rec_nets.gds and b/testdata/algo/device_extract_au2_with_rec_nets.gds differ diff --git a/testdata/algo/device_extract_au3_with_rec_nets.gds b/testdata/algo/device_extract_au3_with_rec_nets.gds index 8e5c0cd09..969f00594 100644 Binary files a/testdata/algo/device_extract_au3_with_rec_nets.gds and b/testdata/algo/device_extract_au3_with_rec_nets.gds differ diff --git a/testdata/algo/device_extract_au4_with_rec_nets.gds b/testdata/algo/device_extract_au4_with_rec_nets.gds index 6ecb58431..9995ce84d 100644 Binary files a/testdata/algo/device_extract_au4_with_rec_nets.gds and b/testdata/algo/device_extract_au4_with_rec_nets.gds differ diff --git a/testdata/algo/device_extract_au5_flattened_circuits.gds b/testdata/algo/device_extract_au5_flattened_circuits.gds index 18d0b794d..18d3b56f3 100644 Binary files a/testdata/algo/device_extract_au5_flattened_circuits.gds and b/testdata/algo/device_extract_au5_flattened_circuits.gds differ diff --git a/testdata/algo/device_extract_au5_with_rec_nets.gds b/testdata/algo/device_extract_au5_with_rec_nets.gds index 1c310db0b..41fde217c 100644 Binary files a/testdata/algo/device_extract_au5_with_rec_nets.gds and b/testdata/algo/device_extract_au5_with_rec_nets.gds differ diff --git a/testdata/algo/dss_sparse_array.gds b/testdata/algo/dss_sparse_array.gds new file mode 100644 index 000000000..a7c1821fd Binary files /dev/null and b/testdata/algo/dss_sparse_array.gds differ diff --git a/testdata/algo/dss_sparse_array_au1.gds b/testdata/algo/dss_sparse_array_au1.gds new file mode 100644 index 000000000..118962d23 Binary files /dev/null and b/testdata/algo/dss_sparse_array_au1.gds differ diff --git a/testdata/algo/hc_test_au11.gds b/testdata/algo/hc_test_au11.gds index 51611f9e7..002284700 100644 Binary files a/testdata/algo/hc_test_au11.gds and b/testdata/algo/hc_test_au11.gds differ diff --git a/testdata/algo/l2n_writer_au.txt b/testdata/algo/l2n_writer_au.txt index 23b74e85a..cad572677 100644 --- a/testdata/algo/l2n_writer_au.txt +++ b/testdata/algo/l2n_writer_au.txt @@ -140,11 +140,11 @@ circuit(INV2 rect(nsd (-1675 -925) (550 950)) ) net(5 name($5) - rect(diff_cont (-110 2490) (220 220)) - rect(diff_cont (-220 180) (220 220)) - rect(diff_cont (-220 -220) (220 220)) + rect(diff_cont (-110 2890) (220 220)) rect(diff_cont (-220 -620) (220 220)) - rect(metal1 (-290 -290) (360 760)) + rect(diff_cont (-220 -220) (220 220)) + rect(diff_cont (-220 180) (220 220)) + rect(metal1 (-290 -690) (360 760)) rect(metal1 (-360 -760) (360 760)) rect(via1 (-305 -705) (250 250)) rect(via1 (-250 150) (250 250)) @@ -244,14 +244,14 @@ circuit(RINGO net(12 name($I39)) net(13 name($I38)) net(14 name($I19)) - net(15 name($I8)) - net(16 name($I7)) - net(17 name($I6)) - net(18 name($I5)) - net(19 name($I4)) - net(20 name($I3)) - net(21 name($I2)) - net(22 name($I1)) + net(15 name($I18)) + net(16 name($I17)) + net(17 name($I16)) + net(18 name($I15)) + net(19 name($I14)) + net(20 name($I13)) + net(21 name($I12)) + net(22 name($I11)) # Outgoing pins and their connections to nets pin(1 name(FB)) @@ -274,61 +274,61 @@ circuit(RINGO pin(3 3) pin(4 4) ) - circuit(3 INV2 location(2640 0) - pin(0 14) - pin(1 12) - pin(2 22) - pin(3 3) - pin(4 4) - ) - circuit(4 INV2 location(5280 0) - pin(0 22) - pin(1 11) - pin(2 21) - pin(3 3) - pin(4 4) - ) - circuit(5 INV2 location(7920 0) - pin(0 21) - pin(1 10) - pin(2 20) - pin(3 3) - pin(4 4) - ) - circuit(6 INV2 location(10560 0) - pin(0 20) - pin(1 9) - pin(2 19) - pin(3 3) - pin(4 4) - ) - circuit(7 INV2 location(13200 0) - pin(0 19) - pin(1 8) - pin(2 18) - pin(3 3) - pin(4 4) - ) - circuit(8 INV2 location(15840 0) - pin(0 18) - pin(1 7) - pin(2 17) - pin(3 3) - pin(4 4) - ) - circuit(9 INV2 location(18480 0) - pin(0 17) - pin(1 6) - pin(2 16) - pin(3 3) - pin(4 4) - ) - circuit(10 INV2 location(21120 0) + circuit(3 INV2 location(21120 0) pin(0 16) pin(1 5) pin(2 15) pin(3 3) pin(4 4) ) + circuit(4 INV2 location(18480 0) + pin(0 17) + pin(1 6) + pin(2 16) + pin(3 3) + pin(4 4) + ) + circuit(5 INV2 location(15840 0) + pin(0 18) + pin(1 7) + pin(2 17) + pin(3 3) + pin(4 4) + ) + circuit(6 INV2 location(13200 0) + pin(0 19) + pin(1 8) + pin(2 18) + pin(3 3) + pin(4 4) + ) + circuit(7 INV2 location(10560 0) + pin(0 20) + pin(1 9) + pin(2 19) + pin(3 3) + pin(4 4) + ) + circuit(8 INV2 location(7920 0) + pin(0 21) + pin(1 10) + pin(2 20) + pin(3 3) + pin(4 4) + ) + circuit(9 INV2 location(5280 0) + pin(0 22) + pin(1 11) + pin(2 21) + pin(3 3) + pin(4 4) + ) + circuit(10 INV2 location(2640 0) + pin(0 14) + pin(1 12) + pin(2 22) + pin(3 3) + pin(4 4) + ) ) diff --git a/testdata/algo/l2n_writer_au_2.gds b/testdata/algo/l2n_writer_au_2.gds index 37ba81471..a4f45414f 100644 Binary files a/testdata/algo/l2n_writer_au_2.gds and b/testdata/algo/l2n_writer_au_2.gds differ diff --git a/testdata/algo/l2n_writer_au_2b.txt b/testdata/algo/l2n_writer_au_2b.txt index 0137b1b11..1e5e23d11 100644 --- a/testdata/algo/l2n_writer_au_2b.txt +++ b/testdata/algo/l2n_writer_au_2b.txt @@ -169,11 +169,11 @@ circuit(INV2 rect(nsd (-1515 -385) (550 950)) ) net(6 name(VDD) - rect(diff_cont (-110 2490) (220 220)) - rect(diff_cont (-220 180) (220 220)) - rect(diff_cont (-220 -220) (220 220)) + rect(diff_cont (-110 2890) (220 220)) rect(diff_cont (-220 -620) (220 220)) - rect(metal1 (-290 -290) (360 760)) + rect(diff_cont (-220 -220) (220 220)) + rect(diff_cont (-220 180) (220 220)) + rect(metal1 (-290 -690) (360 760)) rect(metal1 (-360 -760) (360 760)) rect(via1 (-305 -705) (250 250)) rect(via1 (-250 150) (250 250)) @@ -345,9 +345,9 @@ circuit(RINGO net(7 name($I23)) net(8 name($I22)) net(9 name($I17)) - net(10 name($I11)) - net(11 name($I10)) - net(12 name($I9)) + net(10 name($I16)) + net(11 name($I15)) + net(12 name($I14)) # Outgoing pins and their connections to nets pin(1 name(FB)) @@ -374,13 +374,13 @@ circuit(RINGO pin(5 9) pin(6 3) ) - circuit(3 INV2PAIR location(3580 -800) + circuit(3 INV2PAIR location(14140 -800) pin(0 4) - pin(1 7) + pin(1 5) pin(2 3) pin(3 4) - pin(4 9) - pin(5 12) + pin(4 11) + pin(5 10) pin(6 3) ) circuit(4 INV2PAIR location(8860 -800) @@ -392,13 +392,13 @@ circuit(RINGO pin(5 11) pin(6 3) ) - circuit(5 INV2PAIR location(14140 -800) + circuit(5 INV2PAIR location(3580 -800) pin(0 4) - pin(1 5) + pin(1 7) pin(2 3) pin(3 4) - pin(4 11) - pin(5 10) + pin(4 9) + pin(5 12) pin(6 3) ) diff --git a/testdata/algo/l2n_writer_au_2s.txt b/testdata/algo/l2n_writer_au_2s.txt index b03978d7e..e0338aef8 100644 --- a/testdata/algo/l2n_writer_au_2s.txt +++ b/testdata/algo/l2n_writer_au_2s.txt @@ -148,11 +148,11 @@ X(INV2 R(nsd (-1515 -385) (550 950)) ) N(6 I(VDD) - R(diff_cont (-110 2490) (220 220)) - R(diff_cont (-220 180) (220 220)) - R(diff_cont (-220 -220) (220 220)) + R(diff_cont (-110 2890) (220 220)) R(diff_cont (-220 -620) (220 220)) - R(metal1 (-290 -290) (360 760)) + R(diff_cont (-220 -220) (220 220)) + R(diff_cont (-220 180) (220 220)) + R(metal1 (-290 -690) (360 760)) R(metal1 (-360 -760) (360 760)) R(via1 (-305 -705) (250 250)) R(via1 (-250 150) (250 250)) @@ -306,9 +306,9 @@ X(RINGO N(7 I($I23)) N(8 I($I22)) N(9 I($I17)) - N(10 I($I11)) - N(11 I($I10)) - N(12 I($I9)) + N(10 I($I16)) + N(11 I($I15)) + N(12 I($I14)) P(1 I(FB)) P(2 I(OSC)) P(3 I(VDD)) @@ -331,13 +331,13 @@ X(RINGO P(5 9) P(6 3) ) - X(3 INV2PAIR Y(3580 -800) + X(3 INV2PAIR Y(14140 -800) P(0 4) - P(1 7) + P(1 5) P(2 3) P(3 4) - P(4 9) - P(5 12) + P(4 11) + P(5 10) P(6 3) ) X(4 INV2PAIR Y(8860 -800) @@ -349,13 +349,13 @@ X(RINGO P(5 11) P(6 3) ) - X(5 INV2PAIR Y(14140 -800) + X(5 INV2PAIR Y(3580 -800) P(0 4) - P(1 5) + P(1 7) P(2 3) P(3 4) - P(4 11) - P(5 10) + P(4 9) + P(5 12) P(6 3) ) ) diff --git a/testdata/algo/l2n_writer_au_p.txt b/testdata/algo/l2n_writer_au_p.txt index 8be488e3f..aae4cda2d 100644 --- a/testdata/algo/l2n_writer_au_p.txt +++ b/testdata/algo/l2n_writer_au_p.txt @@ -121,11 +121,11 @@ X(INV2 R(nsd (-1675 -925) (550 950)) ) N(5 I($5) - R(diff_cont (-110 2490) (220 220)) - R(diff_cont (-220 180) (220 220)) - R(diff_cont (-220 -220) (220 220)) + R(diff_cont (-110 2890) (220 220)) R(diff_cont (-220 -620) (220 220)) - R(metal1 (-290 -290) (360 760)) + R(diff_cont (-220 -220) (220 220)) + R(diff_cont (-220 180) (220 220)) + R(metal1 (-290 -690) (360 760)) R(metal1 (-360 -760) (360 760)) R(via1 (-305 -705) (250 250)) R(via1 (-250 150) (250 250)) @@ -225,14 +225,14 @@ X(RINGO N(12 I($I39)) N(13 I($I38)) N(14 I($I19)) - N(15 I($I8)) - N(16 I($I7)) - N(17 I($I6)) - N(18 I($I5)) - N(19 I($I4)) - N(20 I($I3)) - N(21 I($I2)) - N(22 I($I1)) + N(15 I($I18)) + N(16 I($I17)) + N(17 I($I16)) + N(18 I($I15)) + N(19 I($I14)) + N(20 I($I13)) + N(21 I($I12)) + N(22 I($I11)) P(1 I(FB)) P(2 I(OSC)) P(3 I(VSS)) @@ -254,60 +254,60 @@ X(RINGO P(3 3) P(4 4) ) - X(3 INV2 Y(2640 0) - P(0 14) - P(1 12) - P(2 22) - P(3 3) - P(4 4) - ) - X(4 INV2 Y(5280 0) - P(0 22) - P(1 11) - P(2 21) - P(3 3) - P(4 4) - ) - X(5 INV2 Y(7920 0) - P(0 21) - P(1 10) - P(2 20) - P(3 3) - P(4 4) - ) - X(6 INV2 Y(10560 0) - P(0 20) - P(1 9) - P(2 19) - P(3 3) - P(4 4) - ) - X(7 INV2 Y(13200 0) - P(0 19) - P(1 8) - P(2 18) - P(3 3) - P(4 4) - ) - X(8 INV2 Y(15840 0) - P(0 18) - P(1 7) - P(2 17) - P(3 3) - P(4 4) - ) - X(9 INV2 Y(18480 0) - P(0 17) - P(1 6) - P(2 16) - P(3 3) - P(4 4) - ) - X(10 INV2 Y(21120 0) + X(3 INV2 Y(21120 0) P(0 16) P(1 5) P(2 15) P(3 3) P(4 4) ) + X(4 INV2 Y(18480 0) + P(0 17) + P(1 6) + P(2 16) + P(3 3) + P(4 4) + ) + X(5 INV2 Y(15840 0) + P(0 18) + P(1 7) + P(2 17) + P(3 3) + P(4 4) + ) + X(6 INV2 Y(13200 0) + P(0 19) + P(1 8) + P(2 18) + P(3 3) + P(4 4) + ) + X(7 INV2 Y(10560 0) + P(0 20) + P(1 9) + P(2 19) + P(3 3) + P(4 4) + ) + X(8 INV2 Y(7920 0) + P(0 21) + P(1 10) + P(2 20) + P(3 3) + P(4 4) + ) + X(9 INV2 Y(5280 0) + P(0 22) + P(1 11) + P(2 21) + P(3 3) + P(4 4) + ) + X(10 INV2 Y(2640 0) + P(0 14) + P(1 12) + P(2 22) + P(3 3) + P(4 4) + ) ) diff --git a/testdata/algo/l2n_writer_au_s.txt b/testdata/algo/l2n_writer_au_s.txt index d63409be9..460be60ce 100644 --- a/testdata/algo/l2n_writer_au_s.txt +++ b/testdata/algo/l2n_writer_au_s.txt @@ -121,11 +121,11 @@ X(INV2 R(nsd (-1675 -925) (550 950)) ) N(5 I($5) - R(diff_cont (-110 2490) (220 220)) - R(diff_cont (-220 180) (220 220)) - R(diff_cont (-220 -220) (220 220)) + R(diff_cont (-110 2890) (220 220)) R(diff_cont (-220 -620) (220 220)) - R(metal1 (-290 -290) (360 760)) + R(diff_cont (-220 -220) (220 220)) + R(diff_cont (-220 180) (220 220)) + R(metal1 (-290 -690) (360 760)) R(metal1 (-360 -760) (360 760)) R(via1 (-305 -705) (250 250)) R(via1 (-250 150) (250 250)) @@ -216,14 +216,14 @@ X(RINGO N(12 I($I39)) N(13 I($I38)) N(14 I($I19)) - N(15 I($I8)) - N(16 I($I7)) - N(17 I($I6)) - N(18 I($I5)) - N(19 I($I4)) - N(20 I($I3)) - N(21 I($I2)) - N(22 I($I1)) + N(15 I($I18)) + N(16 I($I17)) + N(17 I($I16)) + N(18 I($I15)) + N(19 I($I14)) + N(20 I($I13)) + N(21 I($I12)) + N(22 I($I11)) P(1 I(FB)) P(2 I(OSC)) P(3 I(VSS)) @@ -242,60 +242,60 @@ X(RINGO P(3 3) P(4 4) ) - X(3 INV2 Y(2640 0) - P(0 14) - P(1 12) - P(2 22) - P(3 3) - P(4 4) - ) - X(4 INV2 Y(5280 0) - P(0 22) - P(1 11) - P(2 21) - P(3 3) - P(4 4) - ) - X(5 INV2 Y(7920 0) - P(0 21) - P(1 10) - P(2 20) - P(3 3) - P(4 4) - ) - X(6 INV2 Y(10560 0) - P(0 20) - P(1 9) - P(2 19) - P(3 3) - P(4 4) - ) - X(7 INV2 Y(13200 0) - P(0 19) - P(1 8) - P(2 18) - P(3 3) - P(4 4) - ) - X(8 INV2 Y(15840 0) - P(0 18) - P(1 7) - P(2 17) - P(3 3) - P(4 4) - ) - X(9 INV2 Y(18480 0) - P(0 17) - P(1 6) - P(2 16) - P(3 3) - P(4 4) - ) - X(10 INV2 Y(21120 0) + X(3 INV2 Y(21120 0) P(0 16) P(1 5) P(2 15) P(3 3) P(4 4) ) + X(4 INV2 Y(18480 0) + P(0 17) + P(1 6) + P(2 16) + P(3 3) + P(4 4) + ) + X(5 INV2 Y(15840 0) + P(0 18) + P(1 7) + P(2 17) + P(3 3) + P(4 4) + ) + X(6 INV2 Y(13200 0) + P(0 19) + P(1 8) + P(2 18) + P(3 3) + P(4 4) + ) + X(7 INV2 Y(10560 0) + P(0 20) + P(1 9) + P(2 19) + P(3 3) + P(4 4) + ) + X(8 INV2 Y(7920 0) + P(0 21) + P(1 10) + P(2 20) + P(3 3) + P(4 4) + ) + X(9 INV2 Y(5280 0) + P(0 22) + P(1 11) + P(2 21) + P(3 3) + P(4 4) + ) + X(10 INV2 Y(2640 0) + P(0 14) + P(1 12) + P(2 22) + P(3 3) + P(4 4) + ) ) diff --git a/testdata/algo/lvs_test1_au.lvsdb.1 b/testdata/algo/lvs_test1_au.lvsdb.1 index 56f72cfa1..64ff5925c 100644 --- a/testdata/algo/lvs_test1_au.lvsdb.1 +++ b/testdata/algo/lvs_test1_au.lvsdb.1 @@ -351,9 +351,9 @@ layout( net(7 name($I23)) net(8 name($I22)) net(9 name($I17)) - net(10 name($I11)) - net(11 name($I10)) - net(12 name($I9)) + net(10 name($I16)) + net(11 name($I15)) + net(12 name($I14)) # Outgoing pins and their connections to nets pin(1 name(FB)) @@ -380,13 +380,13 @@ layout( pin(5 9) pin(6 3) ) - circuit(3 INV2PAIR location(3580 -800) + circuit(3 INV2PAIR location(14140 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 7) - pin(4 9) - pin(5 12) + pin(3 5) + pin(4 11) + pin(5 10) pin(6 3) ) circuit(4 INV2PAIR location(8860 -800) @@ -398,13 +398,13 @@ layout( pin(5 11) pin(6 3) ) - circuit(5 INV2PAIR location(14140 -800) + circuit(5 INV2PAIR location(3580 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 5) - pin(4 11) - pin(5 10) + pin(3 7) + pin(4 9) + pin(5 12) pin(6 3) ) @@ -638,9 +638,9 @@ xref( pin(3 3 match) circuit(1 1 match) circuit(2 2 match) - circuit(3 3 match) + circuit(5 3 match) circuit(4 4 match) - circuit(5 5 match) + circuit(3 5 match) ) ) ) diff --git a/testdata/algo/lvs_test1_au.lvsdb.2 b/testdata/algo/lvs_test1_au.lvsdb.2 index 4a8055ac4..64baf5392 100644 --- a/testdata/algo/lvs_test1_au.lvsdb.2 +++ b/testdata/algo/lvs_test1_au.lvsdb.2 @@ -351,9 +351,9 @@ layout( net(7 name($I23)) net(8 name($I22)) net(9 name($I17)) - net(10 name($I11)) - net(11 name($I10)) - net(12 name($I9)) + net(10 name($I16)) + net(11 name($I15)) + net(12 name($I14)) # Outgoing pins and their connections to nets pin(1 name(FB)) @@ -380,13 +380,13 @@ layout( pin(5 9) pin(6 3) ) - circuit(3 INV2PAIR location(3580 -800) + circuit(3 INV2PAIR location(14140 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 7) - pin(4 9) - pin(5 12) + pin(3 5) + pin(4 11) + pin(5 10) pin(6 3) ) circuit(4 INV2PAIR location(8860 -800) @@ -398,13 +398,13 @@ layout( pin(5 11) pin(6 3) ) - circuit(5 INV2PAIR location(14140 -800) + circuit(5 INV2PAIR location(3580 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 5) - pin(4 11) - pin(5 10) + pin(3 7) + pin(4 9) + pin(5 12) pin(6 3) ) @@ -638,9 +638,9 @@ xref( pin(3 3 match) circuit(1 1 match) circuit(2 2 match) - circuit(3 3 match) + circuit(5 3 match) circuit(4 4 match) - circuit(5 5 match) + circuit(3 5 match) ) ) ) diff --git a/testdata/algo/lvs_test1b_au.lvsdb.1 b/testdata/algo/lvs_test1b_au.lvsdb.1 index 531ff69f8..28b479174 100644 --- a/testdata/algo/lvs_test1b_au.lvsdb.1 +++ b/testdata/algo/lvs_test1b_au.lvsdb.1 @@ -351,9 +351,9 @@ layout( net(7 name($I23)) net(8 name($I22)) net(9 name($I17)) - net(10 name($I11)) - net(11 name($I10)) - net(12 name($I9)) + net(10 name($I16)) + net(11 name($I15)) + net(12 name($I14)) # Outgoing pins and their connections to nets pin(1 name(FB)) @@ -380,13 +380,13 @@ layout( pin(5 9) pin(6 3) ) - circuit(3 INV2PAIR location(3580 -800) + circuit(3 INV2PAIR location(14140 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 7) - pin(4 9) - pin(5 12) + pin(3 5) + pin(4 11) + pin(5 10) pin(6 3) ) circuit(4 INV2PAIR location(8860 -800) @@ -398,13 +398,13 @@ layout( pin(5 11) pin(6 3) ) - circuit(5 INV2PAIR location(14140 -800) + circuit(5 INV2PAIR location(3580 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 5) - pin(4 11) - pin(5 10) + pin(3 7) + pin(4 9) + pin(5 12) pin(6 3) ) @@ -638,9 +638,9 @@ xref( pin(3 3 match) circuit(1 1 match) circuit(2 2 match) - circuit(3 3 match) + circuit(5 3 match) circuit(4 4 match) - circuit(5 5 match) + circuit(3 5 match) ) ) ) diff --git a/testdata/algo/lvs_test1b_au.lvsdb.2 b/testdata/algo/lvs_test1b_au.lvsdb.2 index eeba4a324..9d3e8fa30 100644 --- a/testdata/algo/lvs_test1b_au.lvsdb.2 +++ b/testdata/algo/lvs_test1b_au.lvsdb.2 @@ -351,9 +351,9 @@ layout( net(7 name($I23)) net(8 name($I22)) net(9 name($I17)) - net(10 name($I11)) - net(11 name($I10)) - net(12 name($I9)) + net(10 name($I16)) + net(11 name($I15)) + net(12 name($I14)) # Outgoing pins and their connections to nets pin(1 name(FB)) @@ -380,13 +380,13 @@ layout( pin(5 9) pin(6 3) ) - circuit(3 INV2PAIR location(3580 -800) + circuit(3 INV2PAIR location(14140 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 7) - pin(4 9) - pin(5 12) + pin(3 5) + pin(4 11) + pin(5 10) pin(6 3) ) circuit(4 INV2PAIR location(8860 -800) @@ -398,13 +398,13 @@ layout( pin(5 11) pin(6 3) ) - circuit(5 INV2PAIR location(14140 -800) + circuit(5 INV2PAIR location(3580 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 5) - pin(4 11) - pin(5 10) + pin(3 7) + pin(4 9) + pin(5 12) pin(6 3) ) @@ -638,9 +638,9 @@ xref( pin(3 3 match) circuit(1 1 match) circuit(2 2 match) - circuit(3 3 match) + circuit(5 3 match) circuit(4 4 match) - circuit(5 5 match) + circuit(3 5 match) ) ) ) diff --git a/testdata/algo/lvs_test2_au.lvsdb.1 b/testdata/algo/lvs_test2_au.lvsdb.1 index ab2e809b0..08569fcca 100644 --- a/testdata/algo/lvs_test2_au.lvsdb.1 +++ b/testdata/algo/lvs_test2_au.lvsdb.1 @@ -351,9 +351,9 @@ layout( net(7 name($I23)) net(8 name($I22)) net(9 name($I17)) - net(10 name($I11)) - net(11 name($I10)) - net(12 name($I9)) + net(10 name($I16)) + net(11 name($I15)) + net(12 name($I14)) # Outgoing pins and their connections to nets pin(1 name(FB)) @@ -380,13 +380,13 @@ layout( pin(5 9) pin(6 3) ) - circuit(3 INV2PAIR location(3580 -800) + circuit(3 INV2PAIR location(14140 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 7) - pin(4 9) - pin(5 12) + pin(3 5) + pin(4 11) + pin(5 10) pin(6 3) ) circuit(4 INV2PAIR location(8860 -800) @@ -398,13 +398,13 @@ layout( pin(5 11) pin(6 3) ) - circuit(5 INV2PAIR location(14140 -800) + circuit(5 INV2PAIR location(3580 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 5) - pin(4 11) - pin(5 10) + pin(3 7) + pin(4 9) + pin(5 12) pin(6 3) ) @@ -669,9 +669,9 @@ xref( circuit(() 2 mismatch) circuit(2 () mismatch) circuit(1 1 match) - circuit(3 3 match) + circuit(5 3 match) circuit(4 4 match) - circuit(5 5 match) + circuit(3 5 match) ) ) ) diff --git a/testdata/algo/lvs_test2_au.lvsdb.2 b/testdata/algo/lvs_test2_au.lvsdb.2 index c774021c7..ebdeef66b 100644 --- a/testdata/algo/lvs_test2_au.lvsdb.2 +++ b/testdata/algo/lvs_test2_au.lvsdb.2 @@ -351,9 +351,9 @@ layout( net(7 name($I23)) net(8 name($I22)) net(9 name($I17)) - net(10 name($I11)) - net(11 name($I10)) - net(12 name($I9)) + net(10 name($I16)) + net(11 name($I15)) + net(12 name($I14)) # Outgoing pins and their connections to nets pin(1 name(FB)) @@ -380,13 +380,13 @@ layout( pin(5 9) pin(6 3) ) - circuit(3 INV2PAIR location(3580 -800) + circuit(3 INV2PAIR location(14140 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 7) - pin(4 9) - pin(5 12) + pin(3 5) + pin(4 11) + pin(5 10) pin(6 3) ) circuit(4 INV2PAIR location(8860 -800) @@ -398,13 +398,13 @@ layout( pin(5 11) pin(6 3) ) - circuit(5 INV2PAIR location(14140 -800) + circuit(5 INV2PAIR location(3580 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 5) - pin(4 11) - pin(5 10) + pin(3 7) + pin(4 9) + pin(5 12) pin(6 3) ) @@ -669,9 +669,9 @@ xref( circuit(() 2 mismatch) circuit(2 () mismatch) circuit(1 1 match) - circuit(3 3 match) + circuit(5 3 match) circuit(4 4 match) - circuit(5 5 match) + circuit(3 5 match) ) ) ) diff --git a/testdata/algo/lvs_test2b_au.lvsdb.1 b/testdata/algo/lvs_test2b_au.lvsdb.1 index ed6529e45..a8fd11aa8 100644 --- a/testdata/algo/lvs_test2b_au.lvsdb.1 +++ b/testdata/algo/lvs_test2b_au.lvsdb.1 @@ -351,9 +351,9 @@ layout( net(7 name($I23)) net(8 name($I22)) net(9 name($I17)) - net(10 name($I11)) - net(11 name($I10)) - net(12 name($I9)) + net(10 name($I16)) + net(11 name($I15)) + net(12 name($I14)) # Outgoing pins and their connections to nets pin(1 name(FB)) @@ -380,13 +380,13 @@ layout( pin(5 9) pin(6 3) ) - circuit(3 INV2PAIR location(3580 -800) + circuit(3 INV2PAIR location(14140 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 7) - pin(4 9) - pin(5 12) + pin(3 5) + pin(4 11) + pin(5 10) pin(6 3) ) circuit(4 INV2PAIR location(8860 -800) @@ -398,13 +398,13 @@ layout( pin(5 11) pin(6 3) ) - circuit(5 INV2PAIR location(14140 -800) + circuit(5 INV2PAIR location(3580 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 5) - pin(4 11) - pin(5 10) + pin(3 7) + pin(4 9) + pin(5 12) pin(6 3) ) @@ -669,9 +669,9 @@ xref( circuit(() 2 mismatch) circuit(2 () mismatch) circuit(1 1 match) - circuit(3 3 match) + circuit(5 3 match) circuit(4 4 match) - circuit(5 5 match) + circuit(3 5 match) ) ) ) diff --git a/testdata/algo/lvs_test2b_au.lvsdb.2 b/testdata/algo/lvs_test2b_au.lvsdb.2 index 8d6cd0db7..959c8d515 100644 --- a/testdata/algo/lvs_test2b_au.lvsdb.2 +++ b/testdata/algo/lvs_test2b_au.lvsdb.2 @@ -351,9 +351,9 @@ layout( net(7 name($I23)) net(8 name($I22)) net(9 name($I17)) - net(10 name($I11)) - net(11 name($I10)) - net(12 name($I9)) + net(10 name($I16)) + net(11 name($I15)) + net(12 name($I14)) # Outgoing pins and their connections to nets pin(1 name(FB)) @@ -380,13 +380,13 @@ layout( pin(5 9) pin(6 3) ) - circuit(3 INV2PAIR location(3580 -800) + circuit(3 INV2PAIR location(14140 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 7) - pin(4 9) - pin(5 12) + pin(3 5) + pin(4 11) + pin(5 10) pin(6 3) ) circuit(4 INV2PAIR location(8860 -800) @@ -398,13 +398,13 @@ layout( pin(5 11) pin(6 3) ) - circuit(5 INV2PAIR location(14140 -800) + circuit(5 INV2PAIR location(3580 -800) pin(0 4) pin(1 3) pin(2 4) - pin(3 5) - pin(4 11) - pin(5 10) + pin(3 7) + pin(4 9) + pin(5 12) pin(6 3) ) @@ -669,9 +669,9 @@ xref( circuit(() 2 mismatch) circuit(2 () mismatch) circuit(1 1 match) - circuit(3 3 match) + circuit(5 3 match) circuit(4 4 match) - circuit(5 5 match) + circuit(3 5 match) ) ) ) diff --git a/testdata/algo/net_proc_au3.gds b/testdata/algo/net_proc_au3.gds index b84c44b2c..2968b8805 100644 Binary files a/testdata/algo/net_proc_au3.gds and b/testdata/algo/net_proc_au3.gds differ diff --git a/testdata/bd/strmxor_au4d.oas b/testdata/bd/strmxor_au4d.oas index 0724ac6fe..f46b73a16 100644 Binary files a/testdata/bd/strmxor_au4d.oas and b/testdata/bd/strmxor_au4d.oas differ diff --git a/testdata/bd/strmxor_au5d.oas b/testdata/bd/strmxor_au5d.oas index ab41c95ad..1b54d1d97 100644 Binary files a/testdata/bd/strmxor_au5d.oas and b/testdata/bd/strmxor_au5d.oas differ diff --git a/testdata/drc/drcSimpleTests_148.drc b/testdata/drc/drcSimpleTests_148.drc new file mode 100644 index 000000000..b70e96436 --- /dev/null +++ b/testdata/drc/drcSimpleTests_148.drc @@ -0,0 +1,39 @@ + +# Breaking + +source($drc_test_source, "TOP") +target($drc_test_target) + +sparse_array_limit(10.0) +if sparse_array_limit != 10.0 + raise("sparse array limit is not 10.0!") +end + +deep + +# can still set sparse_array_limit before the first input statement +self.sparse_array_limit = 5.0 +if self.sparse_array_limit != 5.0 + raise("sparse array limit is not 5.0!") +end + +l1 = input(1, 0) +l2 = input(2, 0) + +error = false +begin + self.sparse_array_limit = 2.0 +rescue + error = true +end +error || raise("sparse_array_limit must throw an exception after 'deep'") + +if @dss.sparse_array_limit != 5.0 + raise("sparse array limit of DSS is not 5.0!") +end + +l1.output(1, 0) +l2.output(2, 0) +l1.sized(1.um).output(11, 0) +l2.sized(1.um).output(12, 0) + diff --git a/testdata/drc/drcSimpleTests_148.gds b/testdata/drc/drcSimpleTests_148.gds new file mode 100644 index 000000000..a7c1821fd Binary files /dev/null and b/testdata/drc/drcSimpleTests_148.gds differ diff --git a/testdata/drc/drcSimpleTests_au148d.gds b/testdata/drc/drcSimpleTests_au148d.gds new file mode 100644 index 000000000..118962d23 Binary files /dev/null and b/testdata/drc/drcSimpleTests_au148d.gds differ diff --git a/testdata/drc/drcSimpleTests_au31d.gds b/testdata/drc/drcSimpleTests_au31d.gds index 38514972a..983f2e2b6 100644 Binary files a/testdata/drc/drcSimpleTests_au31d.gds and b/testdata/drc/drcSimpleTests_au31d.gds differ diff --git a/testdata/drc/drcSimpleTests_au32d.gds b/testdata/drc/drcSimpleTests_au32d.gds index c899c06e9..db34cf733 100644 Binary files a/testdata/drc/drcSimpleTests_au32d.gds and b/testdata/drc/drcSimpleTests_au32d.gds differ diff --git a/testdata/drc/drcSimpleTests_au60d.gds b/testdata/drc/drcSimpleTests_au60d.gds index ea9032786..6450093de 100644 Binary files a/testdata/drc/drcSimpleTests_au60d.gds and b/testdata/drc/drcSimpleTests_au60d.gds differ diff --git a/testdata/lvs/ringo_device_subcircuits.lvsdb.1 b/testdata/lvs/ringo_device_subcircuits.lvsdb.1 index b3e9d8cf3..42e0248ff 100644 --- a/testdata/lvs/ringo_device_subcircuits.lvsdb.1 +++ b/testdata/lvs/ringo_device_subcircuits.lvsdb.1 @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -199,9 +199,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I6) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_device_subcircuits.lvsdb.2 b/testdata/lvs/ringo_device_subcircuits.lvsdb.2 index d01baf5b0..4cd7c290c 100644 --- a/testdata/lvs/ringo_device_subcircuits.lvsdb.2 +++ b/testdata/lvs/ringo_device_subcircuits.lvsdb.2 @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_layout_var.lvsdb.1 b/testdata/lvs/ringo_layout_var.lvsdb.1 index 09a84c082..ad9af0022 100644 --- a/testdata/lvs/ringo_layout_var.lvsdb.1 +++ b/testdata/lvs/ringo_layout_var.lvsdb.1 @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -199,9 +199,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I6) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -490,9 +490,9 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) - rect(l3 (23300 -3500) (1400 3500)) + rect(l3 (0 4500) (600 3500)) + rect(l3 (-100 -3500) (1400 3500)) + rect(l3 (22000 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) rect(l8 (-24690 -1240) (180 180)) rect(l8 (-180 370) (180 180)) @@ -501,11 +501,11 @@ layout( rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) + rect(l11 (-2950 -450) (600 800)) + rect(l11 (0 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23400 -800) (1200 800)) + rect(l11 (22750 -400) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) @@ -525,23 +525,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_layout_var.lvsdb.2 b/testdata/lvs/ringo_layout_var.lvsdb.2 index fb9e4a5a0..51779581c 100644 --- a/testdata/lvs/ringo_layout_var.lvsdb.2 +++ b/testdata/lvs/ringo_layout_var.lvsdb.2 @@ -490,9 +490,9 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) - rect(l3 (23300 -3500) (1400 3500)) + rect(l3 (0 4500) (600 3500)) + rect(l3 (-100 -3500) (1400 3500)) + rect(l3 (22000 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) rect(l8 (-24690 -1240) (180 180)) rect(l8 (-180 370) (180 180)) @@ -501,11 +501,11 @@ layout( rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) + rect(l11 (-2950 -450) (600 800)) + rect(l11 (0 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23400 -800) (1200 800)) + rect(l11 (22750 -400) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) @@ -525,23 +525,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_mixed_hierarchy.cir b/testdata/lvs/ringo_mixed_hierarchy.cir index 6a8f50780..6ce130b08 100644 --- a/testdata/lvs/ringo_mixed_hierarchy.cir +++ b/testdata/lvs/ringo_mixed_hierarchy.cir @@ -16,24 +16,24 @@ X$1 3 14 16 3 1 16 INVX1 * cell instance $2 r0 *1 20.4,0 X$2 3 1 16 3 13 16 INVX1 -* cell instance $8 r0 *1 4.2,0 -X$8 3 5 16 3 4 16 INVX1 -* cell instance $9 r0 *1 6,0 -X$9 3 6 16 3 5 16 INVX1 -* cell instance $10 r0 *1 7.8,0 -X$10 3 7 16 3 6 16 INVX1 -* cell instance $11 r0 *1 9.6,0 -X$11 3 8 16 3 7 16 INVX1 -* cell instance $12 r0 *1 11.4,0 -X$12 3 9 16 3 8 16 INVX1 +* cell instance $10 r0 *1 18.6,0 +X$10 3 13 16 3 12 16 INVX1 +* cell instance $11 r0 *1 16.8,0 +X$11 3 12 16 3 11 16 INVX1 +* cell instance $12 r0 *1 15,0 +X$12 3 11 16 3 10 16 INVX1 * cell instance $13 r0 *1 13.2,0 X$13 3 10 16 3 9 16 INVX1 -* cell instance $14 r0 *1 15,0 -X$14 3 11 16 3 10 16 INVX1 -* cell instance $15 r0 *1 16.8,0 -X$15 3 12 16 3 11 16 INVX1 -* cell instance $16 r0 *1 18.6,0 -X$16 3 13 16 3 12 16 INVX1 +* cell instance $14 r0 *1 11.4,0 +X$14 3 9 16 3 8 16 INVX1 +* cell instance $15 r0 *1 9.6,0 +X$15 3 8 16 3 7 16 INVX1 +* cell instance $16 r0 *1 7.8,0 +X$16 3 7 16 3 6 16 INVX1 +* cell instance $17 r0 *1 6,0 +X$17 3 6 16 3 5 16 INVX1 +* cell instance $18 r0 *1 4.2,0 +X$18 3 5 16 3 4 16 INVX1 * device instance $1 r0 *1 2.65,5.8 PMOS M$1 3 2 4 3 PMOS L=0.25U W=1.5U AS=0.6375P AD=0.3375P PS=3.85U PD=1.95U * device instance $2 r0 *1 3.35,5.8 PMOS diff --git a/testdata/lvs/ringo_mixed_hierarchy.lvsdb b/testdata/lvs/ringo_mixed_hierarchy.lvsdb index aaa1a946e..6bc9689e7 100644 --- a/testdata/lvs/ringo_mixed_hierarchy.lvsdb +++ b/testdata/lvs/ringo_mixed_hierarchy.lvsdb @@ -259,34 +259,34 @@ layout( ) net(3 name(VDD) rect(l3 (1700 4500) (2600 3500)) - rect(l3 (-3800 -3500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) - rect(l3 (23300 -3500) (1400 3500)) + rect(l3 (19600 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-22890 -2840) (180 180)) + rect(l3 (-25800 -3500) (600 3500)) + rect(l3 (-100 -3500) (1400 3500)) + rect(l8 (1010 -2840) (180 180)) rect(l8 (-180 920) (180 180)) rect(l8 (-180 -730) (180 180)) - rect(l8 (-1980 870) (180 180)) + rect(l8 (21420 870) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21840 -1290) (300 1700)) + rect(l11 (1560 -1290) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) rect(l11 (-100 50) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l2 (-23025 -2550) (450 1500)) - rect(l9 (-2275 -450) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l2 (1525 -2150) (450 1500)) + rect(l9 (21125 -450) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(4 name($4) rect(l8 (3610 1770) (180 180)) @@ -360,12 +360,12 @@ layout( rect(l11 (-1900 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (23200 -350) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l6 (-23700 460) (425 950)) + rect(l11 (-25800 -800) (600 800)) + rect(l6 (1500 460) (425 950)) rect(l10 (-1575 -2210) (500 1500)) rect(l10 (22900 -1500) (500 1500)) ) @@ -448,44 +448,28 @@ layout( pin(4 13) pin(5 16) ) - circuit(8 INVX1 location(4200 0) + circuit(10 INVX1 location(18600 0) pin(0 3) - pin(1 5) + pin(1 13) pin(2 16) pin(3 3) - pin(4 4) + pin(4 12) pin(5 16) ) - circuit(9 INVX1 location(6000 0) + circuit(11 INVX1 location(16800 0) pin(0 3) - pin(1 6) + pin(1 12) pin(2 16) pin(3 3) - pin(4 5) + pin(4 11) pin(5 16) ) - circuit(10 INVX1 location(7800 0) + circuit(12 INVX1 location(15000 0) pin(0 3) - pin(1 7) + pin(1 11) pin(2 16) pin(3 3) - pin(4 6) - pin(5 16) - ) - circuit(11 INVX1 location(9600 0) - pin(0 3) - pin(1 8) - pin(2 16) - pin(3 3) - pin(4 7) - pin(5 16) - ) - circuit(12 INVX1 location(11400 0) - pin(0 3) - pin(1 9) - pin(2 16) - pin(3 3) - pin(4 8) + pin(4 10) pin(5 16) ) circuit(13 INVX1 location(13200 0) @@ -496,28 +480,44 @@ layout( pin(4 9) pin(5 16) ) - circuit(14 INVX1 location(15000 0) + circuit(14 INVX1 location(11400 0) pin(0 3) - pin(1 11) + pin(1 9) pin(2 16) pin(3 3) - pin(4 10) + pin(4 8) pin(5 16) ) - circuit(15 INVX1 location(16800 0) + circuit(15 INVX1 location(9600 0) pin(0 3) - pin(1 12) + pin(1 8) pin(2 16) pin(3 3) - pin(4 11) + pin(4 7) pin(5 16) ) - circuit(16 INVX1 location(18600 0) + circuit(16 INVX1 location(7800 0) pin(0 3) - pin(1 13) + pin(1 7) pin(2 16) pin(3 3) - pin(4 12) + pin(4 6) + pin(5 16) + ) + circuit(17 INVX1 location(6000 0) + pin(0 3) + pin(1 6) + pin(2 16) + pin(3 3) + pin(4 5) + pin(5 16) + ) + circuit(18 INVX1 location(4200 0) + pin(0 3) + pin(1 5) + pin(2 16) + pin(3 3) + pin(4 4) pin(5 16) ) @@ -801,15 +801,15 @@ xref( device(4 4 match) device(1 1 match) device(2 2 match) - circuit(8 2 match) - circuit(9 3 match) - circuit(10 4 match) - circuit(11 5 match) - circuit(12 6 match) + circuit(18 2 match) + circuit(17 3 match) + circuit(16 4 match) + circuit(15 5 match) + circuit(14 6 match) circuit(13 7 match) - circuit(14 8 match) - circuit(15 9 match) - circuit(16 10 match) + circuit(12 8 match) + circuit(11 9 match) + circuit(10 10 match) circuit(2 11 match) circuit(1 12 match) ) diff --git a/testdata/lvs/ringo_simple.lvsdb.1 b/testdata/lvs/ringo_simple.lvsdb.1 index c7c49dbe7..5069e8e32 100644 --- a/testdata/lvs/ringo_simple.lvsdb.1 +++ b/testdata/lvs/ringo_simple.lvsdb.1 @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -199,9 +199,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I6) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple.lvsdb.2 b/testdata/lvs/ringo_simple.lvsdb.2 index ef872de19..4b945d92e 100644 --- a/testdata/lvs/ringo_simple.lvsdb.2 +++ b/testdata/lvs/ringo_simple.lvsdb.2 @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_blackboxing.lvsdb b/testdata/lvs/ringo_simple_blackboxing.lvsdb index d572caf85..ed392bf6e 100644 --- a/testdata/lvs/ringo_simple_blackboxing.lvsdb +++ b/testdata/lvs/ringo_simple_blackboxing.lvsdb @@ -116,9 +116,9 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(6 name(VDD) - rect(l3 (1100 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) - rect(l3 (23300 -3500) (1400 3500)) + rect(l3 (600 4500) (600 3500)) + rect(l3 (-100 -3500) (1400 3500)) + rect(l3 (22000 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) rect(l8 (-24690 -1240) (180 180)) rect(l8 (-180 370) (180 180)) @@ -127,11 +127,11 @@ layout( rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l11 (-22340 860) (0 0)) - rect(l11 (-1750 -450) (1200 800)) + rect(l11 (-2350 -450) (600 800)) + rect(l11 (0 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23400 -800) (1200 800)) + rect(l11 (22750 -400) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) @@ -151,23 +151,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(9 name(VSS) - rect(l8 (1710 1610) (180 180)) + rect(l8 (25110 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-22340 -390) (0 0)) - rect(l11 (-1300 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1060 -390) (0 0)) + rect(l11 (22100 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) net(10 name($I22) rect(l11 (7350 2950) (900 300)) diff --git a/testdata/lvs/ringo_simple_blackboxing_netter.lvsdb b/testdata/lvs/ringo_simple_blackboxing_netter.lvsdb index d572caf85..ed392bf6e 100644 --- a/testdata/lvs/ringo_simple_blackboxing_netter.lvsdb +++ b/testdata/lvs/ringo_simple_blackboxing_netter.lvsdb @@ -116,9 +116,9 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(6 name(VDD) - rect(l3 (1100 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) - rect(l3 (23300 -3500) (1400 3500)) + rect(l3 (600 4500) (600 3500)) + rect(l3 (-100 -3500) (1400 3500)) + rect(l3 (22000 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) rect(l8 (-24690 -1240) (180 180)) rect(l8 (-180 370) (180 180)) @@ -127,11 +127,11 @@ layout( rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l11 (-22340 860) (0 0)) - rect(l11 (-1750 -450) (1200 800)) + rect(l11 (-2350 -450) (600 800)) + rect(l11 (0 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23400 -800) (1200 800)) + rect(l11 (22750 -400) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) @@ -151,23 +151,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(9 name(VSS) - rect(l8 (1710 1610) (180 180)) + rect(l8 (25110 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-22340 -390) (0 0)) - rect(l11 (-1300 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1060 -390) (0 0)) + rect(l11 (22100 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) net(10 name($I22) rect(l11 (7350 2950) (900 300)) diff --git a/testdata/lvs/ringo_simple_compare2.lvsdb.1 b/testdata/lvs/ringo_simple_compare2.lvsdb.1 index c7c49dbe7..5069e8e32 100644 --- a/testdata/lvs/ringo_simple_compare2.lvsdb.1 +++ b/testdata/lvs/ringo_simple_compare2.lvsdb.1 @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -199,9 +199,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I6) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_compare2.lvsdb.2 b/testdata/lvs/ringo_simple_compare2.lvsdb.2 index ef872de19..4b945d92e 100644 --- a/testdata/lvs/ringo_simple_compare2.lvsdb.2 +++ b/testdata/lvs/ringo_simple_compare2.lvsdb.2 @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_device_scaling.lvsdb.1 b/testdata/lvs/ringo_simple_device_scaling.lvsdb.1 index 7741c19d1..c5c1ee2e4 100644 --- a/testdata/lvs/ringo_simple_device_scaling.lvsdb.1 +++ b/testdata/lvs/ringo_simple_device_scaling.lvsdb.1 @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -199,9 +199,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I6) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_device_scaling.lvsdb.2 b/testdata/lvs/ringo_simple_device_scaling.lvsdb.2 index 9c45bc1f1..7d01341e7 100644 --- a/testdata/lvs/ringo_simple_device_scaling.lvsdb.2 +++ b/testdata/lvs/ringo_simple_device_scaling.lvsdb.2 @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_dmos.lvsdb.1 b/testdata/lvs/ringo_simple_dmos.lvsdb.1 index a32be3a4b..1fcefb44e 100644 --- a/testdata/lvs/ringo_simple_dmos.lvsdb.1 +++ b/testdata/lvs/ringo_simple_dmos.lvsdb.1 @@ -407,27 +407,27 @@ layout( rect(l15 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l4 (500 4500) (1400 3500)) - rect(l4 (-1900 -3500) (600 3500)) + rect(l4 (0 4500) (600 3500)) rect(l4 (23300 -3500) (1400 3500)) rect(l4 (-100 -3500) (600 3500)) - rect(l10 (-24690 -1240) (180 180)) + rect(l4 (-25300 -3500) (1400 3500)) + rect(l10 (22610 -1240) (180 180)) rect(l10 (-180 370) (180 180)) rect(l10 (-180 -1280) (180 180)) - rect(l10 (23220 370) (180 180)) + rect(l10 (-23580 370) (180 180)) rect(l10 (-180 370) (180 180)) rect(l10 (-180 -1280) (180 180)) - rect(l13 (-21740 860) (0 0)) - rect(l13 (-2350 -450) (1200 800)) - rect(l13 (-750 -1450) (300 1400)) - rect(l13 (-100 -350) (0 0)) - rect(l13 (-1250 -400) (600 800)) + rect(l13 (1660 860) (0 0)) + rect(l13 (-2950 -450) (600 800)) rect(l13 (23400 -800) (1200 800)) rect(l13 (-750 -1450) (300 1400)) rect(l13 (-100 -350) (0 0)) rect(l13 (550 -400) (600 800)) - rect(l11 (-24850 -1500) (500 1500)) - rect(l11 (22900 -1500) (500 1500)) + rect(l13 (-25200 -800) (1200 800)) + rect(l13 (-750 -1450) (300 1400)) + rect(l13 (-100 -350) (0 0)) + rect(l11 (23100 -1100) (500 1500)) + rect(l11 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l13 (23440 3840) (320 320)) @@ -442,23 +442,23 @@ layout( rect(l15 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l10 (1110 1610) (180 180)) + rect(l10 (24510 1610) (180 180)) rect(l10 (-180 -1280) (180 180)) rect(l10 (-180 370) (180 180)) - rect(l10 (23220 370) (180 180)) + rect(l10 (-23580 370) (180 180)) rect(l10 (-180 -1280) (180 180)) rect(l10 (-180 370) (180 180)) - rect(l13 (-21740 -390) (0 0)) - rect(l13 (-1900 -400) (300 1400)) - rect(l13 (-750 -1450) (1200 800)) - rect(l13 (-550 -400) (0 0)) - rect(l13 (-1250 -400) (600 800)) - rect(l13 (23850 -750) (300 1400)) + rect(l13 (1660 -390) (0 0)) + rect(l13 (21500 -400) (300 1400)) rect(l13 (-750 -1450) (1200 800)) rect(l13 (-550 -400) (0 0)) rect(l13 (550 -400) (600 800)) - rect(l12 (-24850 -800) (500 1500)) - rect(l12 (22900 -1500) (500 1500)) + rect(l13 (-25800 -800) (600 800)) + rect(l13 (450 -750) (300 1400)) + rect(l13 (-750 -1450) (1200 800)) + rect(l13 (-550 -400) (0 0)) + rect(l12 (23100 -400) (500 1500)) + rect(l12 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_dmos.lvsdb.2 b/testdata/lvs/ringo_simple_dmos.lvsdb.2 index bce38cb9d..3b4143039 100644 --- a/testdata/lvs/ringo_simple_dmos.lvsdb.2 +++ b/testdata/lvs/ringo_simple_dmos.lvsdb.2 @@ -407,27 +407,27 @@ layout( rect(l15 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l4 (500 4500) (1400 3500)) - rect(l4 (-1900 -3500) (600 3500)) + rect(l4 (0 4500) (600 3500)) rect(l4 (23300 -3500) (1400 3500)) rect(l4 (-100 -3500) (600 3500)) - rect(l10 (-24690 -1240) (180 180)) + rect(l4 (-25300 -3500) (1400 3500)) + rect(l10 (22610 -1240) (180 180)) rect(l10 (-180 370) (180 180)) rect(l10 (-180 -1280) (180 180)) - rect(l10 (23220 370) (180 180)) + rect(l10 (-23580 370) (180 180)) rect(l10 (-180 370) (180 180)) rect(l10 (-180 -1280) (180 180)) - rect(l13 (-21740 860) (0 0)) - rect(l13 (-2350 -450) (1200 800)) - rect(l13 (-750 -1450) (300 1400)) - rect(l13 (-100 -350) (0 0)) - rect(l13 (-1250 -400) (600 800)) + rect(l13 (1660 860) (0 0)) + rect(l13 (-2950 -450) (600 800)) rect(l13 (23400 -800) (1200 800)) rect(l13 (-750 -1450) (300 1400)) rect(l13 (-100 -350) (0 0)) rect(l13 (550 -400) (600 800)) - rect(l11 (-24850 -1500) (500 1500)) - rect(l11 (22900 -1500) (500 1500)) + rect(l13 (-25200 -800) (1200 800)) + rect(l13 (-750 -1450) (300 1400)) + rect(l13 (-100 -350) (0 0)) + rect(l11 (23100 -1100) (500 1500)) + rect(l11 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l13 (23440 3840) (320 320)) @@ -442,23 +442,23 @@ layout( rect(l15 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l10 (1110 1610) (180 180)) + rect(l10 (24510 1610) (180 180)) rect(l10 (-180 -1280) (180 180)) rect(l10 (-180 370) (180 180)) - rect(l10 (23220 370) (180 180)) + rect(l10 (-23580 370) (180 180)) rect(l10 (-180 -1280) (180 180)) rect(l10 (-180 370) (180 180)) - rect(l13 (-21740 -390) (0 0)) - rect(l13 (-1900 -400) (300 1400)) - rect(l13 (-750 -1450) (1200 800)) - rect(l13 (-550 -400) (0 0)) - rect(l13 (-1250 -400) (600 800)) - rect(l13 (23850 -750) (300 1400)) + rect(l13 (1660 -390) (0 0)) + rect(l13 (21500 -400) (300 1400)) rect(l13 (-750 -1450) (1200 800)) rect(l13 (-550 -400) (0 0)) rect(l13 (550 -400) (600 800)) - rect(l12 (-24850 -800) (500 1500)) - rect(l12 (22900 -1500) (500 1500)) + rect(l13 (-25800 -800) (600 800)) + rect(l13 (450 -750) (300 1400)) + rect(l13 (-750 -1450) (1200 800)) + rect(l13 (-550 -400) (0 0)) + rect(l12 (23100 -400) (500 1500)) + rect(l12 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_dmos_fixed.lvsdb.1 b/testdata/lvs/ringo_simple_dmos_fixed.lvsdb.1 index 8ef823a92..1c3128438 100644 --- a/testdata/lvs/ringo_simple_dmos_fixed.lvsdb.1 +++ b/testdata/lvs/ringo_simple_dmos_fixed.lvsdb.1 @@ -413,27 +413,27 @@ layout( rect(l15 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l4 (500 4500) (1400 3500)) - rect(l4 (-1900 -3500) (600 3500)) + rect(l4 (0 4500) (600 3500)) rect(l4 (23300 -3500) (1400 3500)) rect(l4 (-100 -3500) (600 3500)) - rect(l10 (-24690 -1240) (180 180)) + rect(l4 (-25300 -3500) (1400 3500)) + rect(l10 (22610 -1240) (180 180)) rect(l10 (-180 370) (180 180)) rect(l10 (-180 -1280) (180 180)) - rect(l10 (23220 370) (180 180)) + rect(l10 (-23580 370) (180 180)) rect(l10 (-180 370) (180 180)) rect(l10 (-180 -1280) (180 180)) - rect(l13 (-21740 860) (0 0)) - rect(l13 (-2350 -450) (1200 800)) - rect(l13 (-750 -1450) (300 1400)) - rect(l13 (-100 -350) (0 0)) - rect(l13 (-1250 -400) (600 800)) + rect(l13 (1660 860) (0 0)) + rect(l13 (-2950 -450) (600 800)) rect(l13 (23400 -800) (1200 800)) rect(l13 (-750 -1450) (300 1400)) rect(l13 (-100 -350) (0 0)) rect(l13 (550 -400) (600 800)) - rect(l11 (-24850 -1500) (500 1500)) - rect(l11 (22900 -1500) (500 1500)) + rect(l13 (-25200 -800) (1200 800)) + rect(l13 (-750 -1450) (300 1400)) + rect(l13 (-100 -350) (0 0)) + rect(l11 (23100 -1100) (500 1500)) + rect(l11 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l13 (23440 3840) (320 320)) @@ -448,23 +448,23 @@ layout( rect(l15 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l10 (1110 1610) (180 180)) + rect(l10 (24510 1610) (180 180)) rect(l10 (-180 -1280) (180 180)) rect(l10 (-180 370) (180 180)) - rect(l10 (23220 370) (180 180)) + rect(l10 (-23580 370) (180 180)) rect(l10 (-180 -1280) (180 180)) rect(l10 (-180 370) (180 180)) - rect(l13 (-21740 -390) (0 0)) - rect(l13 (-1900 -400) (300 1400)) - rect(l13 (-750 -1450) (1200 800)) - rect(l13 (-550 -400) (0 0)) - rect(l13 (-1250 -400) (600 800)) - rect(l13 (23850 -750) (300 1400)) + rect(l13 (1660 -390) (0 0)) + rect(l13 (21500 -400) (300 1400)) rect(l13 (-750 -1450) (1200 800)) rect(l13 (-550 -400) (0 0)) rect(l13 (550 -400) (600 800)) - rect(l12 (-24850 -800) (500 1500)) - rect(l12 (22900 -1500) (500 1500)) + rect(l13 (-25800 -800) (600 800)) + rect(l13 (450 -750) (300 1400)) + rect(l13 (-750 -1450) (1200 800)) + rect(l13 (-550 -400) (0 0)) + rect(l12 (23100 -400) (500 1500)) + rect(l12 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_dmos_fixed.lvsdb.2 b/testdata/lvs/ringo_simple_dmos_fixed.lvsdb.2 index e8b7f3655..258a08909 100644 --- a/testdata/lvs/ringo_simple_dmos_fixed.lvsdb.2 +++ b/testdata/lvs/ringo_simple_dmos_fixed.lvsdb.2 @@ -413,27 +413,27 @@ layout( rect(l15 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l4 (500 4500) (1400 3500)) - rect(l4 (-1900 -3500) (600 3500)) + rect(l4 (0 4500) (600 3500)) rect(l4 (23300 -3500) (1400 3500)) rect(l4 (-100 -3500) (600 3500)) - rect(l10 (-24690 -1240) (180 180)) + rect(l4 (-25300 -3500) (1400 3500)) + rect(l10 (22610 -1240) (180 180)) rect(l10 (-180 370) (180 180)) rect(l10 (-180 -1280) (180 180)) - rect(l10 (23220 370) (180 180)) + rect(l10 (-23580 370) (180 180)) rect(l10 (-180 370) (180 180)) rect(l10 (-180 -1280) (180 180)) - rect(l13 (-21740 860) (0 0)) - rect(l13 (-2350 -450) (1200 800)) - rect(l13 (-750 -1450) (300 1400)) - rect(l13 (-100 -350) (0 0)) - rect(l13 (-1250 -400) (600 800)) + rect(l13 (1660 860) (0 0)) + rect(l13 (-2950 -450) (600 800)) rect(l13 (23400 -800) (1200 800)) rect(l13 (-750 -1450) (300 1400)) rect(l13 (-100 -350) (0 0)) rect(l13 (550 -400) (600 800)) - rect(l11 (-24850 -1500) (500 1500)) - rect(l11 (22900 -1500) (500 1500)) + rect(l13 (-25200 -800) (1200 800)) + rect(l13 (-750 -1450) (300 1400)) + rect(l13 (-100 -350) (0 0)) + rect(l11 (23100 -1100) (500 1500)) + rect(l11 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l13 (23440 3840) (320 320)) @@ -448,23 +448,23 @@ layout( rect(l15 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l10 (1110 1610) (180 180)) + rect(l10 (24510 1610) (180 180)) rect(l10 (-180 -1280) (180 180)) rect(l10 (-180 370) (180 180)) - rect(l10 (23220 370) (180 180)) + rect(l10 (-23580 370) (180 180)) rect(l10 (-180 -1280) (180 180)) rect(l10 (-180 370) (180 180)) - rect(l13 (-21740 -390) (0 0)) - rect(l13 (-1900 -400) (300 1400)) - rect(l13 (-750 -1450) (1200 800)) - rect(l13 (-550 -400) (0 0)) - rect(l13 (-1250 -400) (600 800)) - rect(l13 (23850 -750) (300 1400)) + rect(l13 (1660 -390) (0 0)) + rect(l13 (21500 -400) (300 1400)) rect(l13 (-750 -1450) (1200 800)) rect(l13 (-550 -400) (0 0)) rect(l13 (550 -400) (600 800)) - rect(l12 (-24850 -800) (500 1500)) - rect(l12 (22900 -1500) (500 1500)) + rect(l13 (-25800 -800) (600 800)) + rect(l13 (450 -750) (300 1400)) + rect(l13 (-750 -1450) (1200 800)) + rect(l13 (-550 -400) (0 0)) + rect(l12 (23100 -400) (500 1500)) + rect(l12 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_dummy_device.lvsdb.1 b/testdata/lvs/ringo_simple_dummy_device.lvsdb.1 index 34f8ebd41..bd9b37fe3 100644 --- a/testdata/lvs/ringo_simple_dummy_device.lvsdb.1 +++ b/testdata/lvs/ringo_simple_dummy_device.lvsdb.1 @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -199,9 +199,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I6) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -410,33 +410,33 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(13 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (27000 4500) (600 3500)) + rect(l3 (-1200 -3500) (600 3500)) + rect(l3 (-1200 -3500) (600 3500)) + rect(l3 (-26400 -3500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l3 (0 -3500) (600 3500)) - rect(l3 (0 -3500) (600 3500)) - rect(l3 (0 -3500) (600 3500)) - rect(l8 (-26490 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (24050 -450) (600 800)) + rect(l11 (-1200 -800) (600 800)) + rect(l11 (-1200 -800) (600 800)) + rect(l11 (-26400 -800) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l11 (0 -800) (600 800)) - rect(l11 (0 -800) (600 800)) - rect(l11 (0 -800) (600 800)) - rect(l9 (-26650 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(14 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -455,30 +455,30 @@ layout( rect(l8 (-180 370) (180 180)) rect(l8 (520 -730) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (-25780 -890) (180 180)) + rect(l8 (-2380 -890) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (1260 -40) (300 1360)) + rect(l11 (24660 -40) (300 1360)) rect(l11 (400 -1360) (300 1360)) rect(l11 (-24000 -1710) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l11 (0 -800) (600 800)) - rect(l11 (0 -800) (600 800)) - rect(l11 (0 -800) (600 800)) - rect(l6 (-1700 400) (425 950)) + rect(l11 (1200 -800) (600 800)) + rect(l11 (-1200 -800) (600 800)) + rect(l11 (-1200 -800) (600 800)) + rect(l11 (-26400 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l6 (24650 800) (425 950)) rect(l6 (250 -950) (425 950)) - rect(l10 (-26050 -2150) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l10 (-2650 -2150) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_dummy_device.lvsdb.2 b/testdata/lvs/ringo_simple_dummy_device.lvsdb.2 index dbecf1b84..2e3bcb76d 100644 --- a/testdata/lvs/ringo_simple_dummy_device.lvsdb.2 +++ b/testdata/lvs/ringo_simple_dummy_device.lvsdb.2 @@ -410,33 +410,33 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(13 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (27000 4500) (600 3500)) + rect(l3 (-1200 -3500) (600 3500)) + rect(l3 (-1200 -3500) (600 3500)) + rect(l3 (-26400 -3500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l3 (0 -3500) (600 3500)) - rect(l3 (0 -3500) (600 3500)) - rect(l3 (0 -3500) (600 3500)) - rect(l8 (-26490 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (24050 -450) (600 800)) + rect(l11 (-1200 -800) (600 800)) + rect(l11 (-1200 -800) (600 800)) + rect(l11 (-26400 -800) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l11 (0 -800) (600 800)) - rect(l11 (0 -800) (600 800)) - rect(l11 (0 -800) (600 800)) - rect(l9 (-26650 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(14 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -455,30 +455,30 @@ layout( rect(l8 (-180 370) (180 180)) rect(l8 (520 -730) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (-25780 -890) (180 180)) + rect(l8 (-2380 -890) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (1260 -40) (300 1360)) + rect(l11 (24660 -40) (300 1360)) rect(l11 (400 -1360) (300 1360)) rect(l11 (-24000 -1710) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l11 (0 -800) (600 800)) - rect(l11 (0 -800) (600 800)) - rect(l11 (0 -800) (600 800)) - rect(l6 (-1025 400) (425 950)) + rect(l11 (1200 -800) (600 800)) + rect(l11 (-1200 -800) (600 800)) + rect(l11 (-1200 -800) (600 800)) + rect(l11 (-26400 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l6 (25325 800) (425 950)) rect(l6 (-1100 -950) (425 950)) - rect(l10 (-25375 -2150) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l10 (-1975 -2150) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_implicit_connections.lvsdb.1 b/testdata/lvs/ringo_simple_implicit_connections.lvsdb.1 index cd3ac06ea..0dfd69794 100644 --- a/testdata/lvs/ringo_simple_implicit_connections.lvsdb.1 +++ b/testdata/lvs/ringo_simple_implicit_connections.lvsdb.1 @@ -147,8 +147,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -202,9 +202,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I6) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -407,9 +407,9 @@ layout( ) net(12 name(VDD) rect(l3 (22600 4500) (1400 3500)) - rect(l3 (2400 -3500) (1400 3500)) - rect(l3 (-100 -3500) (600 3500)) - rect(l3 (-27800 -3500) (1400 3500)) + rect(l3 (3700 -3500) (600 3500)) + rect(l3 (-1900 -3500) (1400 3500)) + rect(l3 (-27300 -3500) (1400 3500)) rect(l3 (-1900 -3500) (600 3500)) rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) @@ -426,11 +426,11 @@ layout( rect(l11 (19750 -450) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) - rect(l11 (3150 -400) (1200 800)) + rect(l11 (4350 -400) (600 800)) + rect(l11 (-1800 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) - rect(l11 (550 -400) (600 800)) - rect(l11 (-27700 -800) (1200 800)) + rect(l11 (-26550 -400) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (-1250 -400) (600 800)) diff --git a/testdata/lvs/ringo_simple_implicit_connections.lvsdb.2 b/testdata/lvs/ringo_simple_implicit_connections.lvsdb.2 index dcfb4d716..8e1d13685 100644 --- a/testdata/lvs/ringo_simple_implicit_connections.lvsdb.2 +++ b/testdata/lvs/ringo_simple_implicit_connections.lvsdb.2 @@ -407,9 +407,9 @@ layout( ) net(12 name(VDD) rect(l3 (22600 4500) (1400 3500)) - rect(l3 (2400 -3500) (1400 3500)) - rect(l3 (-100 -3500) (600 3500)) - rect(l3 (-27800 -3500) (1400 3500)) + rect(l3 (3700 -3500) (600 3500)) + rect(l3 (-1900 -3500) (1400 3500)) + rect(l3 (-27300 -3500) (1400 3500)) rect(l3 (-1900 -3500) (600 3500)) rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) @@ -426,11 +426,11 @@ layout( rect(l11 (19750 -450) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) - rect(l11 (3150 -400) (1200 800)) + rect(l11 (4350 -400) (600 800)) + rect(l11 (-1800 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) - rect(l11 (550 -400) (600 800)) - rect(l11 (-27700 -800) (1200 800)) + rect(l11 (-26550 -400) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (-1250 -400) (600 800)) diff --git a/testdata/lvs/ringo_simple_io.cir.1 b/testdata/lvs/ringo_simple_io.cir.1 index 4d7ccf791..f13c18461 100644 --- a/testdata/lvs/ringo_simple_io.cir.1 +++ b/testdata/lvs/ringo_simple_io.cir.1 @@ -24,8 +24,8 @@ M$2 OUT IN VSS SUBSTRATE NMOS L=0.25U W=0.95U AS=0.40375P AD=0.40375P PS=2.75U .SUBCKT ND2X1 VDD OUT VSS \$4 B A SUBSTRATE M$1 VDD A OUT \$4 PMOS L=0.25U W=1.5U AS=0.6375P AD=0.3375P PS=3.85U PD=1.95U M$2 OUT B VDD \$4 PMOS L=0.25U W=1.5U AS=0.3375P AD=0.6375P PS=1.95U PD=3.85U -M$3 \$I3 A VSS SUBSTRATE NMOS L=0.25U W=0.95U AS=0.40375P AD=0.21375P PS=2.75U +M$3 \$I6 A VSS SUBSTRATE NMOS L=0.25U W=0.95U AS=0.40375P AD=0.21375P PS=2.75U + PD=1.4U -M$4 OUT B \$I3 SUBSTRATE NMOS L=0.25U W=0.95U AS=0.21375P AD=0.40375P PS=1.4U +M$4 OUT B \$I6 SUBSTRATE NMOS L=0.25U W=0.95U AS=0.21375P AD=0.40375P PS=1.4U + PD=2.75U .ENDS ND2X1 diff --git a/testdata/lvs/ringo_simple_io.lvsdb.1 b/testdata/lvs/ringo_simple_io.lvsdb.1 index 584f02e4e..11dc59eb2 100644 --- a/testdata/lvs/ringo_simple_io.lvsdb.1 +++ b/testdata/lvs/ringo_simple_io.lvsdb.1 @@ -121,8 +121,8 @@ J( R(l11 (-240 -790) (300 1700)) R(l11 (-1350 0) (2400 800)) R(l11 (-1150 -400) (0 0)) - R(l2 (-275 -2150) (425 1500)) - R(l2 (-400 -1500) (425 1500)) + R(l2 (-250 -2150) (425 1500)) + R(l2 (-450 -1500) (425 1500)) ) N(2 I(OUT) R(l8 (1810 1770) (180 180)) @@ -176,9 +176,9 @@ J( R(l11 (-150 -150) (300 300)) ) N(7 I(SUBSTRATE)) - N(8 I($I3) - R(l6 (975 1660) (425 950)) - R(l6 (-400 -950) (425 950)) + N(8 I($I6) + R(l6 (1000 1660) (425 950)) + R(l6 (-450 -950) (425 950)) ) P(1 I(VDD)) P(2 I(OUT)) @@ -362,27 +362,27 @@ J( R(l13 (17740 -400) (400 400)) ) N(12 I(VDD) - R(l3 (500 4500) (1400 3500)) - R(l3 (-1900 -3500) (600 3500)) + R(l3 (0 4500) (600 3500)) R(l3 (23300 -3500) (1400 3500)) R(l3 (-100 -3500) (600 3500)) - R(l8 (-24690 -1240) (180 180)) + R(l3 (-25300 -3500) (1400 3500)) + R(l8 (22610 -1240) (180 180)) R(l8 (-180 370) (180 180)) R(l8 (-180 -1280) (180 180)) - R(l8 (23220 370) (180 180)) + R(l8 (-23580 370) (180 180)) R(l8 (-180 370) (180 180)) R(l8 (-180 -1280) (180 180)) - R(l11 (-21740 860) (0 0)) - R(l11 (-2350 -450) (1200 800)) - R(l11 (-750 -1450) (300 1400)) - R(l11 (-100 -350) (0 0)) - R(l11 (-1250 -400) (600 800)) + R(l11 (1660 860) (0 0)) + R(l11 (-2950 -450) (600 800)) R(l11 (23400 -800) (1200 800)) R(l11 (-750 -1450) (300 1400)) R(l11 (-100 -350) (0 0)) R(l11 (550 -400) (600 800)) - R(l9 (-24850 -1500) (500 1500)) - R(l9 (22900 -1500) (500 1500)) + R(l11 (-25200 -800) (1200 800)) + R(l11 (-750 -1450) (300 1400)) + R(l11 (-100 -350) (0 0)) + R(l9 (23100 -1100) (500 1500)) + R(l9 (-23900 -1500) (500 1500)) ) N(13 I(OUT) R(l11 (23440 3840) (320 320)) @@ -397,23 +397,23 @@ J( R(l13 (-200 -200) (400 400)) ) N(15 I(VSS) - R(l8 (1110 1610) (180 180)) + R(l8 (24510 1610) (180 180)) R(l8 (-180 -1280) (180 180)) R(l8 (-180 370) (180 180)) - R(l8 (23220 370) (180 180)) + R(l8 (-23580 370) (180 180)) R(l8 (-180 -1280) (180 180)) R(l8 (-180 370) (180 180)) - R(l11 (-21740 -390) (0 0)) - R(l11 (-1900 -400) (300 1400)) - R(l11 (-750 -1450) (1200 800)) - R(l11 (-550 -400) (0 0)) - R(l11 (-1250 -400) (600 800)) - R(l11 (23850 -750) (300 1400)) + R(l11 (1660 -390) (0 0)) + R(l11 (21500 -400) (300 1400)) R(l11 (-750 -1450) (1200 800)) R(l11 (-550 -400) (0 0)) R(l11 (550 -400) (600 800)) - R(l10 (-24850 -800) (500 1500)) - R(l10 (22900 -1500) (500 1500)) + R(l11 (-25800 -800) (600 800)) + R(l11 (450 -750) (300 1400)) + R(l11 (-750 -1450) (1200 800)) + R(l11 (-550 -400) (0 0)) + R(l10 (23100 -400) (500 1500)) + R(l10 (-23900 -1500) (500 1500)) ) P(11 I(FB)) P(12 I(VDD)) diff --git a/testdata/lvs/ringo_simple_io.lvsdb.2 b/testdata/lvs/ringo_simple_io.lvsdb.2 index d4ce3d5dc..6c24dcf0b 100644 --- a/testdata/lvs/ringo_simple_io.lvsdb.2 +++ b/testdata/lvs/ringo_simple_io.lvsdb.2 @@ -362,27 +362,27 @@ J( R(l13 (17740 -400) (400 400)) ) N(12 I(VDD) - R(l3 (500 4500) (1400 3500)) - R(l3 (-1900 -3500) (600 3500)) + R(l3 (0 4500) (600 3500)) R(l3 (23300 -3500) (1400 3500)) R(l3 (-100 -3500) (600 3500)) - R(l8 (-24690 -1240) (180 180)) + R(l3 (-25300 -3500) (1400 3500)) + R(l8 (22610 -1240) (180 180)) R(l8 (-180 370) (180 180)) R(l8 (-180 -1280) (180 180)) - R(l8 (23220 370) (180 180)) + R(l8 (-23580 370) (180 180)) R(l8 (-180 370) (180 180)) R(l8 (-180 -1280) (180 180)) - R(l11 (-21740 860) (0 0)) - R(l11 (-2350 -450) (1200 800)) - R(l11 (-750 -1450) (300 1400)) - R(l11 (-100 -350) (0 0)) - R(l11 (-1250 -400) (600 800)) + R(l11 (1660 860) (0 0)) + R(l11 (-2950 -450) (600 800)) R(l11 (23400 -800) (1200 800)) R(l11 (-750 -1450) (300 1400)) R(l11 (-100 -350) (0 0)) R(l11 (550 -400) (600 800)) - R(l9 (-24850 -1500) (500 1500)) - R(l9 (22900 -1500) (500 1500)) + R(l11 (-25200 -800) (1200 800)) + R(l11 (-750 -1450) (300 1400)) + R(l11 (-100 -350) (0 0)) + R(l9 (23100 -1100) (500 1500)) + R(l9 (-23900 -1500) (500 1500)) ) N(13 I(OUT) R(l11 (23440 3840) (320 320)) @@ -397,23 +397,23 @@ J( R(l13 (-200 -200) (400 400)) ) N(15 I(VSS) - R(l8 (1110 1610) (180 180)) + R(l8 (24510 1610) (180 180)) R(l8 (-180 -1280) (180 180)) R(l8 (-180 370) (180 180)) - R(l8 (23220 370) (180 180)) + R(l8 (-23580 370) (180 180)) R(l8 (-180 -1280) (180 180)) R(l8 (-180 370) (180 180)) - R(l11 (-21740 -390) (0 0)) - R(l11 (-1900 -400) (300 1400)) - R(l11 (-750 -1450) (1200 800)) - R(l11 (-550 -400) (0 0)) - R(l11 (-1250 -400) (600 800)) - R(l11 (23850 -750) (300 1400)) + R(l11 (1660 -390) (0 0)) + R(l11 (21500 -400) (300 1400)) R(l11 (-750 -1450) (1200 800)) R(l11 (-550 -400) (0 0)) R(l11 (550 -400) (600 800)) - R(l10 (-24850 -800) (500 1500)) - R(l10 (22900 -1500) (500 1500)) + R(l11 (-25800 -800) (600 800)) + R(l11 (450 -750) (300 1400)) + R(l11 (-750 -1450) (1200 800)) + R(l11 (-550 -400) (0 0)) + R(l10 (23100 -400) (500 1500)) + R(l10 (-23900 -1500) (500 1500)) ) P(11 I(FB)) P(12 I(VDD)) diff --git a/testdata/lvs/ringo_simple_io2.cir.1 b/testdata/lvs/ringo_simple_io2.cir.1 index b74e1a251..61c5913b9 100644 --- a/testdata/lvs/ringo_simple_io2.cir.1 +++ b/testdata/lvs/ringo_simple_io2.cir.1 @@ -25,8 +25,8 @@ X$2 VSS IN OUT SUBSTRATE NMOS PARAMS: L=0.25 W=0.95 AS=0.40375 AD=0.40375 .SUBCKT ND2X1 VDD OUT VSS \$4 B A SUBSTRATE X$1 OUT A VDD \$4 PMOS PARAMS: L=0.25 W=1.5 AS=0.6375 AD=0.3375 PS=3.85 PD=1.95 X$2 VDD B OUT \$4 PMOS PARAMS: L=0.25 W=1.5 AS=0.3375 AD=0.6375 PS=1.95 PD=3.85 -X$3 VSS A \$I3 SUBSTRATE NMOS PARAMS: L=0.25 W=0.95 AS=0.40375 AD=0.21375 +X$3 VSS A \$I6 SUBSTRATE NMOS PARAMS: L=0.25 W=0.95 AS=0.40375 AD=0.21375 + PS=2.75 PD=1.4 -X$4 \$I3 B OUT SUBSTRATE NMOS PARAMS: L=0.25 W=0.95 AS=0.21375 AD=0.40375 +X$4 \$I6 B OUT SUBSTRATE NMOS PARAMS: L=0.25 W=0.95 AS=0.21375 AD=0.40375 + PS=1.4 PD=2.75 .ENDS ND2X1 diff --git a/testdata/lvs/ringo_simple_io2.l2n.1 b/testdata/lvs/ringo_simple_io2.l2n.1 index d766d4aec..ec0d0004e 100644 --- a/testdata/lvs/ringo_simple_io2.l2n.1 +++ b/testdata/lvs/ringo_simple_io2.l2n.1 @@ -120,8 +120,8 @@ X(ND2X1 R(l11 (-240 -790) (300 1700)) R(l11 (-1350 0) (2400 800)) R(l11 (-1150 -400) (0 0)) - R(l2 (-275 -2150) (425 1500)) - R(l2 (-400 -1500) (425 1500)) + R(l2 (-250 -2150) (425 1500)) + R(l2 (-450 -1500) (425 1500)) ) N(2 I(OUT) R(l8 (1810 1770) (180 180)) @@ -175,9 +175,9 @@ X(ND2X1 R(l11 (-150 -150) (300 300)) ) N(7 I(SUBSTRATE)) - N(8 I($I3) - R(l6 (975 1660) (425 950)) - R(l6 (-400 -950) (425 950)) + N(8 I($I6) + R(l6 (1000 1660) (425 950)) + R(l6 (-450 -950) (425 950)) ) P(1 I(VDD)) P(2 I(OUT)) @@ -361,27 +361,27 @@ X(RINGO R(l13 (17740 -400) (400 400)) ) N(12 I(VDD) - R(l3 (500 4500) (1400 3500)) - R(l3 (-1900 -3500) (600 3500)) + R(l3 (0 4500) (600 3500)) R(l3 (23300 -3500) (1400 3500)) R(l3 (-100 -3500) (600 3500)) - R(l8 (-24690 -1240) (180 180)) + R(l3 (-25300 -3500) (1400 3500)) + R(l8 (22610 -1240) (180 180)) R(l8 (-180 370) (180 180)) R(l8 (-180 -1280) (180 180)) - R(l8 (23220 370) (180 180)) + R(l8 (-23580 370) (180 180)) R(l8 (-180 370) (180 180)) R(l8 (-180 -1280) (180 180)) - R(l11 (-21740 860) (0 0)) - R(l11 (-2350 -450) (1200 800)) - R(l11 (-750 -1450) (300 1400)) - R(l11 (-100 -350) (0 0)) - R(l11 (-1250 -400) (600 800)) + R(l11 (1660 860) (0 0)) + R(l11 (-2950 -450) (600 800)) R(l11 (23400 -800) (1200 800)) R(l11 (-750 -1450) (300 1400)) R(l11 (-100 -350) (0 0)) R(l11 (550 -400) (600 800)) - R(l9 (-24850 -1500) (500 1500)) - R(l9 (22900 -1500) (500 1500)) + R(l11 (-25200 -800) (1200 800)) + R(l11 (-750 -1450) (300 1400)) + R(l11 (-100 -350) (0 0)) + R(l9 (23100 -1100) (500 1500)) + R(l9 (-23900 -1500) (500 1500)) ) N(13 I(OUT) R(l11 (23440 3840) (320 320)) @@ -396,23 +396,23 @@ X(RINGO R(l13 (-200 -200) (400 400)) ) N(15 I(VSS) - R(l8 (1110 1610) (180 180)) + R(l8 (24510 1610) (180 180)) R(l8 (-180 -1280) (180 180)) R(l8 (-180 370) (180 180)) - R(l8 (23220 370) (180 180)) + R(l8 (-23580 370) (180 180)) R(l8 (-180 -1280) (180 180)) R(l8 (-180 370) (180 180)) - R(l11 (-21740 -390) (0 0)) - R(l11 (-1900 -400) (300 1400)) - R(l11 (-750 -1450) (1200 800)) - R(l11 (-550 -400) (0 0)) - R(l11 (-1250 -400) (600 800)) - R(l11 (23850 -750) (300 1400)) + R(l11 (1660 -390) (0 0)) + R(l11 (21500 -400) (300 1400)) R(l11 (-750 -1450) (1200 800)) R(l11 (-550 -400) (0 0)) R(l11 (550 -400) (600 800)) - R(l10 (-24850 -800) (500 1500)) - R(l10 (22900 -1500) (500 1500)) + R(l11 (-25800 -800) (600 800)) + R(l11 (450 -750) (300 1400)) + R(l11 (-750 -1450) (1200 800)) + R(l11 (-550 -400) (0 0)) + R(l10 (23100 -400) (500 1500)) + R(l10 (-23900 -1500) (500 1500)) ) P(11 I(FB)) P(12 I(VDD)) diff --git a/testdata/lvs/ringo_simple_io2.l2n.2 b/testdata/lvs/ringo_simple_io2.l2n.2 index 3fe66dec6..7911c3726 100644 --- a/testdata/lvs/ringo_simple_io2.l2n.2 +++ b/testdata/lvs/ringo_simple_io2.l2n.2 @@ -361,27 +361,27 @@ X(RINGO R(l13 (17740 -400) (400 400)) ) N(12 I(VDD) - R(l3 (500 4500) (1400 3500)) - R(l3 (-1900 -3500) (600 3500)) + R(l3 (0 4500) (600 3500)) R(l3 (23300 -3500) (1400 3500)) R(l3 (-100 -3500) (600 3500)) - R(l8 (-24690 -1240) (180 180)) + R(l3 (-25300 -3500) (1400 3500)) + R(l8 (22610 -1240) (180 180)) R(l8 (-180 370) (180 180)) R(l8 (-180 -1280) (180 180)) - R(l8 (23220 370) (180 180)) + R(l8 (-23580 370) (180 180)) R(l8 (-180 370) (180 180)) R(l8 (-180 -1280) (180 180)) - R(l11 (-21740 860) (0 0)) - R(l11 (-2350 -450) (1200 800)) - R(l11 (-750 -1450) (300 1400)) - R(l11 (-100 -350) (0 0)) - R(l11 (-1250 -400) (600 800)) + R(l11 (1660 860) (0 0)) + R(l11 (-2950 -450) (600 800)) R(l11 (23400 -800) (1200 800)) R(l11 (-750 -1450) (300 1400)) R(l11 (-100 -350) (0 0)) R(l11 (550 -400) (600 800)) - R(l9 (-24850 -1500) (500 1500)) - R(l9 (22900 -1500) (500 1500)) + R(l11 (-25200 -800) (1200 800)) + R(l11 (-750 -1450) (300 1400)) + R(l11 (-100 -350) (0 0)) + R(l9 (23100 -1100) (500 1500)) + R(l9 (-23900 -1500) (500 1500)) ) N(13 I(OUT) R(l11 (23440 3840) (320 320)) @@ -396,23 +396,23 @@ X(RINGO R(l13 (-200 -200) (400 400)) ) N(15 I(VSS) - R(l8 (1110 1610) (180 180)) + R(l8 (24510 1610) (180 180)) R(l8 (-180 -1280) (180 180)) R(l8 (-180 370) (180 180)) - R(l8 (23220 370) (180 180)) + R(l8 (-23580 370) (180 180)) R(l8 (-180 -1280) (180 180)) R(l8 (-180 370) (180 180)) - R(l11 (-21740 -390) (0 0)) - R(l11 (-1900 -400) (300 1400)) - R(l11 (-750 -1450) (1200 800)) - R(l11 (-550 -400) (0 0)) - R(l11 (-1250 -400) (600 800)) - R(l11 (23850 -750) (300 1400)) + R(l11 (1660 -390) (0 0)) + R(l11 (21500 -400) (300 1400)) R(l11 (-750 -1450) (1200 800)) R(l11 (-550 -400) (0 0)) R(l11 (550 -400) (600 800)) - R(l10 (-24850 -800) (500 1500)) - R(l10 (22900 -1500) (500 1500)) + R(l11 (-25800 -800) (600 800)) + R(l11 (450 -750) (300 1400)) + R(l11 (-750 -1450) (1200 800)) + R(l11 (-550 -400) (0 0)) + R(l10 (23100 -400) (500 1500)) + R(l10 (-23900 -1500) (500 1500)) ) P(11 I(FB)) P(12 I(VDD)) diff --git a/testdata/lvs/ringo_simple_io2.lvsdb.1 b/testdata/lvs/ringo_simple_io2.lvsdb.1 index c7c49dbe7..5069e8e32 100644 --- a/testdata/lvs/ringo_simple_io2.lvsdb.1 +++ b/testdata/lvs/ringo_simple_io2.lvsdb.1 @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -199,9 +199,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I6) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_io2.lvsdb.2 b/testdata/lvs/ringo_simple_io2.lvsdb.2 index ef872de19..4b945d92e 100644 --- a/testdata/lvs/ringo_simple_io2.lvsdb.2 +++ b/testdata/lvs/ringo_simple_io2.lvsdb.2 @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.1 b/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.1 index 82d084acd..0d464eda1 100644 --- a/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.1 +++ b/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.1 @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -199,9 +199,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I6) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.2 b/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.2 index 2f1d004f9..b0a359962 100644 --- a/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.2 +++ b/testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.2 @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_pin_swapping.lvsdb.1 b/testdata/lvs/ringo_simple_pin_swapping.lvsdb.1 index 540484692..af1277122 100644 --- a/testdata/lvs/ringo_simple_pin_swapping.lvsdb.1 +++ b/testdata/lvs/ringo_simple_pin_swapping.lvsdb.1 @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -199,9 +199,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I6) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_pin_swapping.lvsdb.2 b/testdata/lvs/ringo_simple_pin_swapping.lvsdb.2 index 99f73ad33..a4c8a4740 100644 --- a/testdata/lvs/ringo_simple_pin_swapping.lvsdb.2 +++ b/testdata/lvs/ringo_simple_pin_swapping.lvsdb.2 @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_same_device_classes.cir.1 b/testdata/lvs/ringo_simple_same_device_classes.cir.1 index 577bc3ef4..4b0b16cb1 100644 --- a/testdata/lvs/ringo_simple_same_device_classes.cir.1 +++ b/testdata/lvs/ringo_simple_same_device_classes.cir.1 @@ -24,8 +24,8 @@ M$2 OUT IN VSS SUBSTRATE NM L=0.25U W=0.95U AS=0.40375P AD=0.40375P PS=2.75U .SUBCKT ND2X1 VDD OUT VSS \$4 B A SUBSTRATE M$1 VDD A OUT \$4 PM L=0.25U W=1.5U AS=0.6375P AD=0.3375P PS=3.85U PD=1.95U M$2 OUT B VDD \$4 PM L=0.25U W=1.5U AS=0.3375P AD=0.6375P PS=1.95U PD=3.85U -M$3 \$I3 A VSS SUBSTRATE NM L=0.25U W=0.95U AS=0.40375P AD=0.21375P PS=2.75U +M$3 \$I6 A VSS SUBSTRATE NM L=0.25U W=0.95U AS=0.40375P AD=0.21375P PS=2.75U + PD=1.4U -M$4 OUT B \$I3 SUBSTRATE NM L=0.25U W=0.95U AS=0.21375P AD=0.40375P PS=1.4U +M$4 OUT B \$I6 SUBSTRATE NM L=0.25U W=0.95U AS=0.21375P AD=0.40375P PS=1.4U + PD=2.75U .ENDS ND2X1 diff --git a/testdata/lvs/ringo_simple_same_device_classes.lvsdb.1 b/testdata/lvs/ringo_simple_same_device_classes.lvsdb.1 index 0b35a65e1..b4a1f4b5f 100644 --- a/testdata/lvs/ringo_simple_same_device_classes.lvsdb.1 +++ b/testdata/lvs/ringo_simple_same_device_classes.lvsdb.1 @@ -146,8 +146,8 @@ layout( rect(l17 (-240 -790) (300 1700)) rect(l17 (-1350 0) (2400 800)) rect(l17 (-1150 -400) (0 0)) - rect(l4 (-275 -2150) (425 1500)) - rect(l4 (-400 -1500) (425 1500)) + rect(l4 (-250 -2150) (425 1500)) + rect(l4 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l14 (1810 1770) (180 180)) @@ -201,9 +201,9 @@ layout( rect(l17 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l9 (975 1660) (425 950)) - rect(l9 (-400 -950) (425 950)) + net(8 name($I6) + rect(l9 (1000 1660) (425 950)) + rect(l9 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -405,27 +405,27 @@ layout( rect(l19 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l14 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l14 (22610 -1240) (180 180)) rect(l14 (-180 370) (180 180)) rect(l14 (-180 -1280) (180 180)) - rect(l14 (23220 370) (180 180)) + rect(l14 (-23580 370) (180 180)) rect(l14 (-180 370) (180 180)) rect(l14 (-180 -1280) (180 180)) - rect(l17 (-21740 860) (0 0)) - rect(l17 (-2350 -450) (1200 800)) - rect(l17 (-750 -1450) (300 1400)) - rect(l17 (-100 -350) (0 0)) - rect(l17 (-1250 -400) (600 800)) + rect(l17 (1660 860) (0 0)) + rect(l17 (-2950 -450) (600 800)) rect(l17 (23400 -800) (1200 800)) rect(l17 (-750 -1450) (300 1400)) rect(l17 (-100 -350) (0 0)) rect(l17 (550 -400) (600 800)) - rect(l15 (-24850 -1500) (500 1500)) - rect(l15 (22900 -1500) (500 1500)) + rect(l17 (-25200 -800) (1200 800)) + rect(l17 (-750 -1450) (300 1400)) + rect(l17 (-100 -350) (0 0)) + rect(l15 (23100 -1100) (500 1500)) + rect(l15 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l17 (23440 3840) (320 320)) @@ -440,23 +440,23 @@ layout( rect(l19 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l14 (1110 1610) (180 180)) + rect(l14 (24510 1610) (180 180)) rect(l14 (-180 -1280) (180 180)) rect(l14 (-180 370) (180 180)) - rect(l14 (23220 370) (180 180)) + rect(l14 (-23580 370) (180 180)) rect(l14 (-180 -1280) (180 180)) rect(l14 (-180 370) (180 180)) - rect(l17 (-21740 -390) (0 0)) - rect(l17 (-1900 -400) (300 1400)) - rect(l17 (-750 -1450) (1200 800)) - rect(l17 (-550 -400) (0 0)) - rect(l17 (-1250 -400) (600 800)) - rect(l17 (23850 -750) (300 1400)) + rect(l17 (1660 -390) (0 0)) + rect(l17 (21500 -400) (300 1400)) rect(l17 (-750 -1450) (1200 800)) rect(l17 (-550 -400) (0 0)) rect(l17 (550 -400) (600 800)) - rect(l16 (-24850 -800) (500 1500)) - rect(l16 (22900 -1500) (500 1500)) + rect(l17 (-25800 -800) (600 800)) + rect(l17 (450 -750) (300 1400)) + rect(l17 (-750 -1450) (1200 800)) + rect(l17 (-550 -400) (0 0)) + rect(l16 (23100 -400) (500 1500)) + rect(l16 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_same_device_classes.lvsdb.2 b/testdata/lvs/ringo_simple_same_device_classes.lvsdb.2 index 01a5f5ee4..5eda6da18 100644 --- a/testdata/lvs/ringo_simple_same_device_classes.lvsdb.2 +++ b/testdata/lvs/ringo_simple_same_device_classes.lvsdb.2 @@ -405,27 +405,27 @@ layout( rect(l19 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l14 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l14 (22610 -1240) (180 180)) rect(l14 (-180 370) (180 180)) rect(l14 (-180 -1280) (180 180)) - rect(l14 (23220 370) (180 180)) + rect(l14 (-23580 370) (180 180)) rect(l14 (-180 370) (180 180)) rect(l14 (-180 -1280) (180 180)) - rect(l17 (-21740 860) (0 0)) - rect(l17 (-2350 -450) (1200 800)) - rect(l17 (-750 -1450) (300 1400)) - rect(l17 (-100 -350) (0 0)) - rect(l17 (-1250 -400) (600 800)) + rect(l17 (1660 860) (0 0)) + rect(l17 (-2950 -450) (600 800)) rect(l17 (23400 -800) (1200 800)) rect(l17 (-750 -1450) (300 1400)) rect(l17 (-100 -350) (0 0)) rect(l17 (550 -400) (600 800)) - rect(l15 (-24850 -1500) (500 1500)) - rect(l15 (22900 -1500) (500 1500)) + rect(l17 (-25200 -800) (1200 800)) + rect(l17 (-750 -1450) (300 1400)) + rect(l17 (-100 -350) (0 0)) + rect(l15 (23100 -1100) (500 1500)) + rect(l15 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l17 (23440 3840) (320 320)) @@ -440,23 +440,23 @@ layout( rect(l19 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l14 (1110 1610) (180 180)) + rect(l14 (24510 1610) (180 180)) rect(l14 (-180 -1280) (180 180)) rect(l14 (-180 370) (180 180)) - rect(l14 (23220 370) (180 180)) + rect(l14 (-23580 370) (180 180)) rect(l14 (-180 -1280) (180 180)) rect(l14 (-180 370) (180 180)) - rect(l17 (-21740 -390) (0 0)) - rect(l17 (-1900 -400) (300 1400)) - rect(l17 (-750 -1450) (1200 800)) - rect(l17 (-550 -400) (0 0)) - rect(l17 (-1250 -400) (600 800)) - rect(l17 (23850 -750) (300 1400)) + rect(l17 (1660 -390) (0 0)) + rect(l17 (21500 -400) (300 1400)) rect(l17 (-750 -1450) (1200 800)) rect(l17 (-550 -400) (0 0)) rect(l17 (550 -400) (600 800)) - rect(l16 (-24850 -800) (500 1500)) - rect(l16 (22900 -1500) (500 1500)) + rect(l17 (-25800 -800) (600 800)) + rect(l17 (450 -750) (300 1400)) + rect(l17 (-750 -1450) (1200 800)) + rect(l17 (-550 -400) (0 0)) + rect(l16 (23100 -400) (500 1500)) + rect(l16 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_simplification.lvsdb.1 b/testdata/lvs/ringo_simple_simplification.lvsdb.1 index 673eeb9e6..6199fa815 100644 --- a/testdata/lvs/ringo_simple_simplification.lvsdb.1 +++ b/testdata/lvs/ringo_simple_simplification.lvsdb.1 @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -199,9 +199,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I18) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -400,10 +400,10 @@ layout( rect(l8 (-180 370) (180 180)) rect(l11 (-240 -790) (300 4790)) rect(l11 (-150 -2500) (0 0)) - rect(l2 (-225 1050) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) - rect(l6 (-450 -4890) (425 950)) - rect(l6 (-400 -950) (425 950)) + rect(l2 (-200 1050) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) + rect(l6 (-400 -4890) (425 950)) + rect(l6 (-450 -950) (425 950)) ) net(4 name(VSS) rect(l8 (410 1770) (180 180)) @@ -507,9 +507,9 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(6 name(VDD) - rect(l3 (1100 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) - rect(l3 (23300 -3500) (1400 3500)) + rect(l3 (600 4500) (600 3500)) + rect(l3 (-100 -3500) (1400 3500)) + rect(l3 (22000 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) rect(l8 (-24690 -1240) (180 180)) rect(l8 (-180 370) (180 180)) @@ -518,11 +518,11 @@ layout( rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l11 (-22340 860) (0 0)) - rect(l11 (-1750 -450) (1200 800)) + rect(l11 (-2350 -450) (600 800)) + rect(l11 (0 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23400 -800) (1200 800)) + rect(l11 (22750 -400) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) @@ -542,23 +542,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(9 name(VSS) - rect(l8 (1710 1610) (180 180)) + rect(l8 (25110 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-22340 -390) (0 0)) - rect(l11 (-1300 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1060 -390) (0 0)) + rect(l11 (22100 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) net(10 name($I22) rect(l11 (7350 2950) (900 300)) diff --git a/testdata/lvs/ringo_simple_simplification.lvsdb.2 b/testdata/lvs/ringo_simple_simplification.lvsdb.2 index 86f2734bf..605d23d24 100644 --- a/testdata/lvs/ringo_simple_simplification.lvsdb.2 +++ b/testdata/lvs/ringo_simple_simplification.lvsdb.2 @@ -199,7 +199,7 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I5) + net(8 name($I18) rect(l6 (975 1660) (425 950)) rect(l6 (-400 -950) (425 950)) ) @@ -507,9 +507,9 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(6 name(VDD) - rect(l3 (1100 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) - rect(l3 (23300 -3500) (1400 3500)) + rect(l3 (600 4500) (600 3500)) + rect(l3 (-100 -3500) (1400 3500)) + rect(l3 (22000 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) rect(l8 (-24690 -1240) (180 180)) rect(l8 (-180 370) (180 180)) @@ -518,11 +518,11 @@ layout( rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l11 (-22340 860) (0 0)) - rect(l11 (-1750 -450) (1200 800)) + rect(l11 (-2350 -450) (600 800)) + rect(l11 (0 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23400 -800) (1200 800)) + rect(l11 (22750 -400) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) @@ -542,23 +542,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(9 name(VSS) - rect(l8 (1710 1610) (180 180)) + rect(l8 (25110 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-22340 -390) (0 0)) - rect(l11 (-1300 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1060 -390) (0 0)) + rect(l11 (22100 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) net(10 name($I22) rect(l11 (7350 2950) (900 300)) diff --git a/testdata/lvs/ringo_simple_simplification_with_align.cir b/testdata/lvs/ringo_simple_simplification_with_align.cir index 4996f57fa..2470e20bc 100644 --- a/testdata/lvs/ringo_simple_simplification_with_align.cir +++ b/testdata/lvs/ringo_simple_simplification_with_align.cir @@ -26,16 +26,16 @@ X$5 6 4 9 6 3 9 INVX1 X$6 6 5 9 6 4 9 INVX1 * cell instance $7 r0 *1 22.2,0 X$7 5 6 7 9 6 9 INVX2 -* cell instance $13 r0 *1 7.8,0 -X$13 6 12 9 6 10 9 INVX1 -* cell instance $14 r0 *1 9.6,0 -X$14 6 13 9 6 12 9 INVX1 -* cell instance $15 r0 *1 11.4,0 -X$15 6 14 9 6 13 9 INVX1 -* cell instance $16 r0 *1 13.2,0 -X$16 6 15 9 6 14 9 INVX1 -* cell instance $17 r0 *1 15,0 -X$17 6 11 9 6 15 9 INVX1 +* cell instance $15 r0 *1 7.8,0 +X$15 6 12 9 6 10 9 INVX1 +* cell instance $16 r0 *1 9.6,0 +X$16 6 13 9 6 12 9 INVX1 +* cell instance $17 r0 *1 11.4,0 +X$17 6 14 9 6 13 9 INVX1 +* cell instance $18 r0 *1 13.2,0 +X$18 6 15 9 6 14 9 INVX1 +* cell instance $19 r0 *1 15,0 +X$19 6 11 9 6 15 9 INVX1 .ENDS RINGO * cell INVX2 diff --git a/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.1 b/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.1 index e92e8e9a5..19e8ddc00 100644 --- a/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.1 +++ b/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.1 @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -199,9 +199,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I18) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -400,10 +400,10 @@ layout( rect(l8 (-180 370) (180 180)) rect(l11 (-240 -790) (300 4790)) rect(l11 (-150 -2500) (0 0)) - rect(l2 (-225 1050) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) - rect(l6 (-450 -4890) (425 950)) - rect(l6 (-400 -950) (425 950)) + rect(l2 (-200 1050) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) + rect(l6 (-400 -4890) (425 950)) + rect(l6 (-450 -950) (425 950)) ) net(4 name(VSS) rect(l8 (410 1770) (180 180)) @@ -507,9 +507,9 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(6 name(VDD) - rect(l3 (1100 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) - rect(l3 (23300 -3500) (1400 3500)) + rect(l3 (600 4500) (600 3500)) + rect(l3 (-100 -3500) (1400 3500)) + rect(l3 (22000 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) rect(l8 (-24690 -1240) (180 180)) rect(l8 (-180 370) (180 180)) @@ -518,11 +518,11 @@ layout( rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l11 (-22340 860) (0 0)) - rect(l11 (-1750 -450) (1200 800)) + rect(l11 (-2350 -450) (600 800)) + rect(l11 (0 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23400 -800) (1200 800)) + rect(l11 (22750 -400) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) @@ -542,23 +542,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(9 name(VSS) - rect(l8 (1710 1610) (180 180)) + rect(l8 (25110 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-22340 -390) (0 0)) - rect(l11 (-1300 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1060 -390) (0 0)) + rect(l11 (22100 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) net(10 name($I22) rect(l11 (7350 2950) (900 300)) @@ -644,7 +644,7 @@ layout( pin(4 6) pin(5 9) ) - circuit(13 INVX1 location(7800 0) + circuit(15 INVX1 location(7800 0) pin(0 6) pin(1 12) pin(2 9) @@ -652,7 +652,7 @@ layout( pin(4 10) pin(5 9) ) - circuit(14 INVX1 location(9600 0) + circuit(16 INVX1 location(9600 0) pin(0 6) pin(1 13) pin(2 9) @@ -660,7 +660,7 @@ layout( pin(4 12) pin(5 9) ) - circuit(15 INVX1 location(11400 0) + circuit(17 INVX1 location(11400 0) pin(0 6) pin(1 14) pin(2 9) @@ -668,7 +668,7 @@ layout( pin(4 13) pin(5 9) ) - circuit(16 INVX1 location(13200 0) + circuit(18 INVX1 location(13200 0) pin(0 6) pin(1 15) pin(2 9) @@ -676,7 +676,7 @@ layout( pin(4 14) pin(5 9) ) - circuit(17 INVX1 location(15000 0) + circuit(19 INVX1 location(15000 0) pin(0 6) pin(1 11) pin(2 9) @@ -1080,11 +1080,11 @@ xref( pin(4 0 match) circuit(2 2 match) circuit(3 3 match) - circuit(13 4 match) - circuit(14 5 match) - circuit(15 6 match) - circuit(16 7 match) - circuit(17 8 match) + circuit(15 4 match) + circuit(16 5 match) + circuit(17 6 match) + circuit(18 7 match) + circuit(19 8 match) circuit(4 9 match) circuit(5 10 match) circuit(6 11 match) diff --git a/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.2 b/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.2 index a0eab7f51..29d601baa 100644 --- a/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.2 +++ b/testdata/lvs/ringo_simple_simplification_with_align.lvsdb.2 @@ -199,7 +199,7 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I5) + net(8 name($I18) rect(l6 (975 1660) (425 950)) rect(l6 (-400 -950) (425 950)) ) @@ -507,9 +507,9 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(6 name(VDD) - rect(l3 (1100 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) - rect(l3 (23300 -3500) (1400 3500)) + rect(l3 (600 4500) (600 3500)) + rect(l3 (-100 -3500) (1400 3500)) + rect(l3 (22000 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) rect(l8 (-24690 -1240) (180 180)) rect(l8 (-180 370) (180 180)) @@ -518,11 +518,11 @@ layout( rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l11 (-22340 860) (0 0)) - rect(l11 (-1750 -450) (1200 800)) + rect(l11 (-2350 -450) (600 800)) + rect(l11 (0 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23400 -800) (1200 800)) + rect(l11 (22750 -400) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) @@ -542,23 +542,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(9 name(VSS) - rect(l8 (1710 1610) (180 180)) + rect(l8 (25110 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-22340 -390) (0 0)) - rect(l11 (-1300 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1060 -390) (0 0)) + rect(l11 (22100 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) net(10 name($I22) rect(l11 (7350 2950) (900 300)) @@ -644,7 +644,7 @@ layout( pin(4 6) pin(5 9) ) - circuit(13 INVX1 location(7800 0) + circuit(15 INVX1 location(7800 0) pin(0 6) pin(1 12) pin(2 9) @@ -652,7 +652,7 @@ layout( pin(4 10) pin(5 9) ) - circuit(14 INVX1 location(9600 0) + circuit(16 INVX1 location(9600 0) pin(0 6) pin(1 13) pin(2 9) @@ -660,7 +660,7 @@ layout( pin(4 12) pin(5 9) ) - circuit(15 INVX1 location(11400 0) + circuit(17 INVX1 location(11400 0) pin(0 6) pin(1 14) pin(2 9) @@ -668,7 +668,7 @@ layout( pin(4 13) pin(5 9) ) - circuit(16 INVX1 location(13200 0) + circuit(18 INVX1 location(13200 0) pin(0 6) pin(1 15) pin(2 9) @@ -676,7 +676,7 @@ layout( pin(4 14) pin(5 9) ) - circuit(17 INVX1 location(15000 0) + circuit(19 INVX1 location(15000 0) pin(0 6) pin(1 11) pin(2 9) @@ -1080,11 +1080,11 @@ xref( pin(4 0 match) circuit(2 2 match) circuit(3 3 match) - circuit(13 4 match) - circuit(14 5 match) - circuit(15 6 match) - circuit(16 7 match) - circuit(17 8 match) + circuit(15 4 match) + circuit(16 5 match) + circuit(17 6 match) + circuit(18 7 match) + circuit(19 8 match) circuit(4 9 match) circuit(5 10 match) circuit(6 11 match) diff --git a/testdata/lvs/ringo_simple_with_tol.lvsdb.1 b/testdata/lvs/ringo_simple_with_tol.lvsdb.1 index ce2a291d8..37dfa8777 100644 --- a/testdata/lvs/ringo_simple_with_tol.lvsdb.1 +++ b/testdata/lvs/ringo_simple_with_tol.lvsdb.1 @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -199,9 +199,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I6) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_with_tol.lvsdb.2 b/testdata/lvs/ringo_simple_with_tol.lvsdb.2 index 03805ce69..3b81a7df9 100644 --- a/testdata/lvs/ringo_simple_with_tol.lvsdb.2 +++ b/testdata/lvs/ringo_simple_with_tol.lvsdb.2 @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_with_tol_early.lvsdb.1 b/testdata/lvs/ringo_simple_with_tol_early.lvsdb.1 index ce2a291d8..37dfa8777 100644 --- a/testdata/lvs/ringo_simple_with_tol_early.lvsdb.1 +++ b/testdata/lvs/ringo_simple_with_tol_early.lvsdb.1 @@ -144,8 +144,8 @@ layout( rect(l11 (-240 -790) (300 1700)) rect(l11 (-1350 0) (2400 800)) rect(l11 (-1150 -400) (0 0)) - rect(l2 (-275 -2150) (425 1500)) - rect(l2 (-400 -1500) (425 1500)) + rect(l2 (-250 -2150) (425 1500)) + rect(l2 (-450 -1500) (425 1500)) ) net(2 name(OUT) rect(l8 (1810 1770) (180 180)) @@ -199,9 +199,9 @@ layout( rect(l11 (-150 -150) (300 300)) ) net(7 name(SUBSTRATE)) - net(8 name($I3) - rect(l6 (975 1660) (425 950)) - rect(l6 (-400 -950) (425 950)) + net(8 name($I6) + rect(l6 (1000 1660) (425 950)) + rect(l6 (-450 -950) (425 950)) ) # Outgoing pins and their connections to nets @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/ringo_simple_with_tol_early.lvsdb.2 b/testdata/lvs/ringo_simple_with_tol_early.lvsdb.2 index 03805ce69..3b81a7df9 100644 --- a/testdata/lvs/ringo_simple_with_tol_early.lvsdb.2 +++ b/testdata/lvs/ringo_simple_with_tol_early.lvsdb.2 @@ -403,27 +403,27 @@ layout( rect(l13 (17740 -400) (400 400)) ) net(12 name(VDD) - rect(l3 (500 4500) (1400 3500)) - rect(l3 (-1900 -3500) (600 3500)) + rect(l3 (0 4500) (600 3500)) rect(l3 (23300 -3500) (1400 3500)) rect(l3 (-100 -3500) (600 3500)) - rect(l8 (-24690 -1240) (180 180)) + rect(l3 (-25300 -3500) (1400 3500)) + rect(l8 (22610 -1240) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 370) (180 180)) rect(l8 (-180 -1280) (180 180)) - rect(l11 (-21740 860) (0 0)) - rect(l11 (-2350 -450) (1200 800)) - rect(l11 (-750 -1450) (300 1400)) - rect(l11 (-100 -350) (0 0)) - rect(l11 (-1250 -400) (600 800)) + rect(l11 (1660 860) (0 0)) + rect(l11 (-2950 -450) (600 800)) rect(l11 (23400 -800) (1200 800)) rect(l11 (-750 -1450) (300 1400)) rect(l11 (-100 -350) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l9 (-24850 -1500) (500 1500)) - rect(l9 (22900 -1500) (500 1500)) + rect(l11 (-25200 -800) (1200 800)) + rect(l11 (-750 -1450) (300 1400)) + rect(l11 (-100 -350) (0 0)) + rect(l9 (23100 -1100) (500 1500)) + rect(l9 (-23900 -1500) (500 1500)) ) net(13 name(OUT) rect(l11 (23440 3840) (320 320)) @@ -438,23 +438,23 @@ layout( rect(l13 (-200 -200) (400 400)) ) net(15 name(VSS) - rect(l8 (1110 1610) (180 180)) + rect(l8 (24510 1610) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l8 (23220 370) (180 180)) + rect(l8 (-23580 370) (180 180)) rect(l8 (-180 -1280) (180 180)) rect(l8 (-180 370) (180 180)) - rect(l11 (-21740 -390) (0 0)) - rect(l11 (-1900 -400) (300 1400)) - rect(l11 (-750 -1450) (1200 800)) - rect(l11 (-550 -400) (0 0)) - rect(l11 (-1250 -400) (600 800)) - rect(l11 (23850 -750) (300 1400)) + rect(l11 (1660 -390) (0 0)) + rect(l11 (21500 -400) (300 1400)) rect(l11 (-750 -1450) (1200 800)) rect(l11 (-550 -400) (0 0)) rect(l11 (550 -400) (600 800)) - rect(l10 (-24850 -800) (500 1500)) - rect(l10 (22900 -1500) (500 1500)) + rect(l11 (-25800 -800) (600 800)) + rect(l11 (450 -750) (300 1400)) + rect(l11 (-750 -1450) (1200 800)) + rect(l11 (-550 -400) (0 0)) + rect(l10 (23100 -400) (500 1500)) + rect(l10 (-23900 -1500) (500 1500)) ) # Outgoing pins and their connections to nets diff --git a/testdata/lvs/soft_connect1.l2n b/testdata/lvs/soft_connect1.l2n index 364e0248a..fb1166fb5 100644 --- a/testdata/lvs/soft_connect1.l2n +++ b/testdata/lvs/soft_connect1.l2n @@ -39,10 +39,10 @@ G(l9 SUBSTRATE) GS(l9 SUBSTRATE) H(W B('Net with incomplete wiring (soft-connected partial nets)') C(TOP) X('soft-connection-check')) H(B('\tPartial net #1: TOP - VDD') C(TOP) Q('(0.6,3.95;0.6,4.85;4.5,4.85;4.5,3.95)')) -H(B('\tPartial net #2: TOP - $I4') C(TOP) Q('(5.1,3.95;5.1,4.85;9,4.85;9,3.95)')) +H(B('\tPartial net #2: TOP - $I5') C(TOP) Q('(5.1,3.95;5.1,4.85;9,4.85;9,3.95)')) H(W B('Net with incomplete wiring (soft-connected partial nets)') C(TOP) X('soft-connection-check')) H(B('\tPartial net #1: TOP - VSS') C(TOP) Q('(0.6,1.15;0.6,2.05;4.5,2.05;4.5,1.15)')) -H(B('\tPartial net #2: TOP - $I1') C(TOP) Q('(5.1,1.15;5.1,2.05;9,2.05;9,1.15)')) +H(B('\tPartial net #2: TOP - $I2') C(TOP) Q('(5.1,1.15;5.1,2.05;9,2.05;9,1.15)')) K(PMOS MOS4) K(NMOS MOS4) D(D$PMOS PMOS diff --git a/testdata/lvs/soft_connect1a.l2n b/testdata/lvs/soft_connect1a.l2n index 9e486321c..826e82f61 100644 --- a/testdata/lvs/soft_connect1a.l2n +++ b/testdata/lvs/soft_connect1a.l2n @@ -40,10 +40,10 @@ G(l9 SUBSTRATE) GS(l9 SUBSTRATE) H(W B('Net with incomplete wiring (soft-connected partial nets)') C(TOP) X('soft-connection-check')) H(B('\tPartial net #1: TOP - VDD') C(TOP) Q('(0.6,3.95;0.6,4.85;4.5,4.85;4.5,3.95)')) -H(B('\tPartial net #2: TOP - $I4') C(TOP) Q('(5.1,3.95;5.1,4.85;9,4.85;9,3.95)')) +H(B('\tPartial net #2: TOP - $I5') C(TOP) Q('(5.1,3.95;5.1,4.85;9,4.85;9,3.95)')) H(W B('Net with incomplete wiring (soft-connected partial nets)') C(TOP) X('soft-connection-check')) H(B('\tPartial net #1: TOP - VSS') C(TOP) Q('(0.6,1.15;0.6,2.05;4.5,2.05;4.5,1.15)')) -H(B('\tPartial net #2: TOP - $I1') C(TOP) Q('(5.1,1.15;5.1,2.05;9,2.05;9,1.15)')) +H(B('\tPartial net #2: TOP - $I2') C(TOP) Q('(5.1,1.15;5.1,2.05;9,2.05;9,1.15)')) K(PMOS MOS4) K(NMOS MOS4) D(D$PMOS PMOS diff --git a/testdata/lvs/soft_connect3.l2n b/testdata/lvs/soft_connect3.l2n index fa0b6f009..bd70fef39 100644 --- a/testdata/lvs/soft_connect3.l2n +++ b/testdata/lvs/soft_connect3.l2n @@ -39,10 +39,10 @@ G(l9 SUBSTRATE) GS(l9 SUBSTRATE) H(W B('Net with incomplete wiring (soft-connected partial nets)') C(TOP) X('soft-connection-check')) H(B('\tPartial net #1: TOP - VDD') C(TOP) Q('(0.6,3.95;0.6,4.85;4.5,4.85;4.5,3.95)')) -H(B('\tPartial net #2: TOP - $I4') C(TOP) Q('(5.1,3.95;5.1,4.85;9,4.85;9,3.95)')) +H(B('\tPartial net #2: TOP - $I5') C(TOP) Q('(5.1,3.95;5.1,4.85;9,4.85;9,3.95)')) H(W B('Net with incomplete wiring (soft-connected partial nets)') C(TOP) X('soft-connection-check')) H(B('\tPartial net #1: TOP - VSS') C(TOP) Q('(0.6,1.15;0.6,2.05;4.5,2.05;4.5,1.15)')) -H(B('\tPartial net #2: TOP - $I1') C(TOP) Q('(5.1,1.15;5.1,2.05;9,2.05;9,1.15)')) +H(B('\tPartial net #2: TOP - $I2') C(TOP) Q('(5.1,1.15;5.1,2.05;9,2.05;9,1.15)')) K(PMOS MOS4) K(NMOS MOS4) D(D$PMOS PMOS diff --git a/testdata/python/dbLayoutToNetlist.py b/testdata/python/dbLayoutToNetlist.py index c71cef68f..ff41aa117 100644 --- a/testdata/python/dbLayoutToNetlist.py +++ b/testdata/python/dbLayoutToNetlist.py @@ -105,15 +105,15 @@ circuit INV2 (OUT=OUT,$2=$3,$3=$4); end; circuit RINGO (); subcircuit INV2 $1 (OUT='FB,OSC',$2=VSS,$3=VDD); - subcircuit INV2 $2 (OUT=$I20,$2=VSS,$3=VDD); - subcircuit INV2 $3 (OUT=$I19,$2=VSS,$3=VDD); - subcircuit INV2 $4 (OUT=$I21,$2=VSS,$3=VDD); - subcircuit INV2 $5 (OUT=$I22,$2=VSS,$3=VDD); + subcircuit INV2 $2 (OUT=$I27,$2=VSS,$3=VDD); + subcircuit INV2 $3 (OUT=$I26,$2=VSS,$3=VDD); + subcircuit INV2 $4 (OUT=$I25,$2=VSS,$3=VDD); + subcircuit INV2 $5 (OUT=$I24,$2=VSS,$3=VDD); subcircuit INV2 $6 (OUT=$I23,$2=VSS,$3=VDD); - subcircuit INV2 $7 (OUT=$I24,$2=VSS,$3=VDD); - subcircuit INV2 $8 (OUT=$I25,$2=VSS,$3=VDD); - subcircuit INV2 $9 (OUT=$I26,$2=VSS,$3=VDD); - subcircuit INV2 $10 (OUT=$I27,$2=VSS,$3=VDD); + subcircuit INV2 $7 (OUT=$I22,$2=VSS,$3=VDD); + subcircuit INV2 $8 (OUT=$I21,$2=VSS,$3=VDD); + subcircuit INV2 $9 (OUT=$I20,$2=VSS,$3=VDD); + subcircuit INV2 $10 (OUT=$I19,$2=VSS,$3=VDD); end; """) @@ -134,7 +134,7 @@ end; for sc in sc_path: a.append(sc.expanded_name()) t = t * sc.trans - self.assertEqual(",".join(a), "$2") + self.assertEqual(",".join(a), "$9") self.assertEqual(str(t), "r0 *1 2.64,0") self.assertEqual(str(l2n.shapes_of_net(n, rmetal1, True)), @@ -206,16 +206,16 @@ circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5); subcircuit TRANS $4 ($1=$4,$2=OUT,$3=$2); end; circuit RINGO (); - subcircuit INV2 $1 (IN=$I8,$2=FB,OUT=OSC,$4=VSS,$5=VDD); + subcircuit INV2 $1 (IN=$I18,$2=FB,OUT=OSC,$4=VSS,$5=VDD); subcircuit INV2 $2 (IN=FB,$2=$I38,OUT=$I19,$4=VSS,$5=VDD); - subcircuit INV2 $3 (IN=$I19,$2=$I39,OUT=$I1,$4=VSS,$5=VDD); - subcircuit INV2 $4 (IN=$I1,$2=$I40,OUT=$I2,$4=VSS,$5=VDD); - subcircuit INV2 $5 (IN=$I2,$2=$I41,OUT=$I3,$4=VSS,$5=VDD); - subcircuit INV2 $6 (IN=$I3,$2=$I42,OUT=$I4,$4=VSS,$5=VDD); - subcircuit INV2 $7 (IN=$I4,$2=$I43,OUT=$I5,$4=VSS,$5=VDD); - subcircuit INV2 $8 (IN=$I5,$2=$I44,OUT=$I6,$4=VSS,$5=VDD); - subcircuit INV2 $9 (IN=$I6,$2=$I45,OUT=$I7,$4=VSS,$5=VDD); - subcircuit INV2 $10 (IN=$I7,$2=$I46,OUT=$I8,$4=VSS,$5=VDD); + subcircuit INV2 $3 (IN=$I17,$2=$I46,OUT=$I18,$4=VSS,$5=VDD); + subcircuit INV2 $4 (IN=$I16,$2=$I45,OUT=$I17,$4=VSS,$5=VDD); + subcircuit INV2 $5 (IN=$I15,$2=$I44,OUT=$I16,$4=VSS,$5=VDD); + subcircuit INV2 $6 (IN=$I14,$2=$I43,OUT=$I15,$4=VSS,$5=VDD); + subcircuit INV2 $7 (IN=$I13,$2=$I42,OUT=$I14,$4=VSS,$5=VDD); + subcircuit INV2 $8 (IN=$I12,$2=$I41,OUT=$I13,$4=VSS,$5=VDD); + subcircuit INV2 $9 (IN=$I11,$2=$I40,OUT=$I12,$4=VSS,$5=VDD); + subcircuit INV2 $10 (IN=$I19,$2=$I39,OUT=$I11,$4=VSS,$5=VDD); end; """) @@ -287,16 +287,16 @@ end; l2n.extract_netlist() self.assertEqual(str(l2n.netlist()), """circuit RINGO (); - subcircuit INV2 $1 (IN=$I8,$2=FB,OUT=OSC,$4=VSS,$5=VDD); + subcircuit INV2 $1 (IN=$I18,$2=FB,OUT=OSC,$4=VSS,$5=VDD); subcircuit INV2 $2 (IN=FB,$2=$I38,OUT=$I19,$4=VSS,$5=VDD); - subcircuit INV2 $3 (IN=$I19,$2=$I39,OUT=$I1,$4=VSS,$5=VDD); - subcircuit INV2 $4 (IN=$I1,$2=$I40,OUT=$I2,$4=VSS,$5=VDD); - subcircuit INV2 $5 (IN=$I2,$2=$I41,OUT=$I3,$4=VSS,$5=VDD); - subcircuit INV2 $6 (IN=$I3,$2=$I42,OUT=$I4,$4=VSS,$5=VDD); - subcircuit INV2 $7 (IN=$I4,$2=$I43,OUT=$I5,$4=VSS,$5=VDD); - subcircuit INV2 $8 (IN=$I5,$2=$I44,OUT=$I6,$4=VSS,$5=VDD); - subcircuit INV2 $9 (IN=$I6,$2=$I45,OUT=$I7,$4=VSS,$5=VDD); - subcircuit INV2 $10 (IN=$I7,$2=$I46,OUT=$I8,$4=VSS,$5=VDD); + subcircuit INV2 $3 (IN=$I17,$2=$I46,OUT=$I18,$4=VSS,$5=VDD); + subcircuit INV2 $4 (IN=$I16,$2=$I45,OUT=$I17,$4=VSS,$5=VDD); + subcircuit INV2 $5 (IN=$I15,$2=$I44,OUT=$I16,$4=VSS,$5=VDD); + subcircuit INV2 $6 (IN=$I14,$2=$I43,OUT=$I15,$4=VSS,$5=VDD); + subcircuit INV2 $7 (IN=$I13,$2=$I42,OUT=$I14,$4=VSS,$5=VDD); + subcircuit INV2 $8 (IN=$I12,$2=$I41,OUT=$I13,$4=VSS,$5=VDD); + subcircuit INV2 $9 (IN=$I11,$2=$I40,OUT=$I12,$4=VSS,$5=VDD); + subcircuit INV2 $10 (IN=$I19,$2=$I39,OUT=$I11,$4=VSS,$5=VDD); end; circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5); device PMOS $1 (S=$2,G=IN,D=$5) (L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5); @@ -402,11 +402,11 @@ end; l2n.extract_netlist() self.assertEqual(str(l2n.netlist()), """circuit RINGO (); - subcircuit INV2PAIR $1 (BULK=VSS,$2=FB,$3=VDD,$4=VSS,$5=$I11,$6=OSC,$7=VDD); + subcircuit INV2PAIR $1 (BULK=VSS,$2=FB,$3=VDD,$4=VSS,$5=$I16,$6=OSC,$7=VDD); subcircuit INV2PAIR $2 (BULK=VSS,$2=$I22,$3=VDD,$4=VSS,$5=FB,$6=$I17,$7=VDD); - subcircuit INV2PAIR $3 (BULK=VSS,$2=$I23,$3=VDD,$4=VSS,$5=$I17,$6=$I9,$7=VDD); - subcircuit INV2PAIR $4 (BULK=VSS,$2=$I24,$3=VDD,$4=VSS,$5=$I9,$6=$I10,$7=VDD); - subcircuit INV2PAIR $5 (BULK=VSS,$2=$I25,$3=VDD,$4=VSS,$5=$I10,$6=$I11,$7=VDD); + subcircuit INV2PAIR $3 (BULK=VSS,$2=$I25,$3=VDD,$4=VSS,$5=$I15,$6=$I16,$7=VDD); + subcircuit INV2PAIR $4 (BULK=VSS,$2=$I24,$3=VDD,$4=VSS,$5=$I14,$6=$I15,$7=VDD); + subcircuit INV2PAIR $5 (BULK=VSS,$2=$I23,$3=VDD,$4=VSS,$5=$I17,$6=$I14,$7=VDD); end; circuit INV2PAIR (BULK=BULK,$2=$I8,$3=$I6,$4=$I5,$5=$I3,$6=$I2,$7=$I1); subcircuit INV2 $1 ($1=$I1,IN=$I3,$3=$I7,OUT=$I4,VSS=$I5,VDD=$I6,BULK=BULK); @@ -431,11 +431,11 @@ end; l2n.netlist().purge() self.assertEqual(str(l2n.netlist()), """circuit RINGO (FB=FB,OSC=OSC,VDD=VDD,VSS=VSS); - subcircuit INV2PAIR $1 (BULK=VSS,$2=FB,$3=VDD,$4=VSS,$5=$I11,$6=OSC,$7=VDD); + subcircuit INV2PAIR $1 (BULK=VSS,$2=FB,$3=VDD,$4=VSS,$5=$I16,$6=OSC,$7=VDD); subcircuit INV2PAIR $2 (BULK=VSS,$2=$I22,$3=VDD,$4=VSS,$5=FB,$6=$I17,$7=VDD); - subcircuit INV2PAIR $3 (BULK=VSS,$2=$I23,$3=VDD,$4=VSS,$5=$I17,$6=$I9,$7=VDD); - subcircuit INV2PAIR $4 (BULK=VSS,$2=$I24,$3=VDD,$4=VSS,$5=$I9,$6=$I10,$7=VDD); - subcircuit INV2PAIR $5 (BULK=VSS,$2=$I25,$3=VDD,$4=VSS,$5=$I10,$6=$I11,$7=VDD); + subcircuit INV2PAIR $3 (BULK=VSS,$2=$I25,$3=VDD,$4=VSS,$5=$I15,$6=$I16,$7=VDD); + subcircuit INV2PAIR $4 (BULK=VSS,$2=$I24,$3=VDD,$4=VSS,$5=$I14,$6=$I15,$7=VDD); + subcircuit INV2PAIR $5 (BULK=VSS,$2=$I23,$3=VDD,$4=VSS,$5=$I17,$6=$I14,$7=VDD); end; circuit INV2PAIR (BULK=BULK,$2=$I8,$3=$I6,$4=$I5,$5=$I3,$6=$I2,$7=$I1); subcircuit INV2 $1 ($1=$I1,IN=$I3,$3=$I7,OUT=$I4,VSS=$I5,VDD=$I6,BULK=BULK); diff --git a/testdata/ruby/dbLayoutToNetlist.rb b/testdata/ruby/dbLayoutToNetlist.rb index be31d1119..33334b387 100644 --- a/testdata/ruby/dbLayoutToNetlist.rb +++ b/testdata/ruby/dbLayoutToNetlist.rb @@ -182,15 +182,15 @@ circuit INV2 (OUT=OUT,$2=$3,$3=$4); end; circuit RINGO (); subcircuit INV2 $1 (OUT='FB,OSC',$2=VSS,$3=VDD); - subcircuit INV2 $2 (OUT=$I20,$2=VSS,$3=VDD); - subcircuit INV2 $3 (OUT=$I19,$2=VSS,$3=VDD); - subcircuit INV2 $4 (OUT=$I21,$2=VSS,$3=VDD); - subcircuit INV2 $5 (OUT=$I22,$2=VSS,$3=VDD); + subcircuit INV2 $2 (OUT=$I27,$2=VSS,$3=VDD); + subcircuit INV2 $3 (OUT=$I26,$2=VSS,$3=VDD); + subcircuit INV2 $4 (OUT=$I25,$2=VSS,$3=VDD); + subcircuit INV2 $5 (OUT=$I24,$2=VSS,$3=VDD); subcircuit INV2 $6 (OUT=$I23,$2=VSS,$3=VDD); - subcircuit INV2 $7 (OUT=$I24,$2=VSS,$3=VDD); - subcircuit INV2 $8 (OUT=$I25,$2=VSS,$3=VDD); - subcircuit INV2 $9 (OUT=$I26,$2=VSS,$3=VDD); - subcircuit INV2 $10 (OUT=$I27,$2=VSS,$3=VDD); + subcircuit INV2 $7 (OUT=$I22,$2=VSS,$3=VDD); + subcircuit INV2 $8 (OUT=$I21,$2=VSS,$3=VDD); + subcircuit INV2 $9 (OUT=$I20,$2=VSS,$3=VDD); + subcircuit INV2 $10 (OUT=$I19,$2=VSS,$3=VDD); end; END @@ -206,7 +206,7 @@ END n = l2n.probe_net(rmetal1, RBA::Point::new(2600, 1000), sc_path) assert_equal(n.to_s, "INV2:$2") assert_equal(sc_path.size, 1) - assert_equal(sc_path.collect(&:expanded_name).join(","), "$2") + assert_equal(sc_path.collect(&:expanded_name).join(","), "$9") assert_equal(sc_path.collect(&:trans).inject(&:*).to_s, "r0 *1 2.64,0") assert_equal(l2n.shapes_of_net(n, rmetal1, true).to_s, @@ -287,16 +287,16 @@ circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5); subcircuit TRANS $4 ($1=$4,$2=OUT,$3=$2); end; circuit RINGO (); - subcircuit INV2 $1 (IN=$I8,$2=FB,OUT=OSC,$4=VSS,$5=VDD); + subcircuit INV2 $1 (IN=$I18,$2=FB,OUT=OSC,$4=VSS,$5=VDD); subcircuit INV2 $2 (IN=FB,$2=$I38,OUT=$I19,$4=VSS,$5=VDD); - subcircuit INV2 $3 (IN=$I19,$2=$I39,OUT=$I1,$4=VSS,$5=VDD); - subcircuit INV2 $4 (IN=$I1,$2=$I40,OUT=$I2,$4=VSS,$5=VDD); - subcircuit INV2 $5 (IN=$I2,$2=$I41,OUT=$I3,$4=VSS,$5=VDD); - subcircuit INV2 $6 (IN=$I3,$2=$I42,OUT=$I4,$4=VSS,$5=VDD); - subcircuit INV2 $7 (IN=$I4,$2=$I43,OUT=$I5,$4=VSS,$5=VDD); - subcircuit INV2 $8 (IN=$I5,$2=$I44,OUT=$I6,$4=VSS,$5=VDD); - subcircuit INV2 $9 (IN=$I6,$2=$I45,OUT=$I7,$4=VSS,$5=VDD); - subcircuit INV2 $10 (IN=$I7,$2=$I46,OUT=$I8,$4=VSS,$5=VDD); + subcircuit INV2 $3 (IN=$I17,$2=$I46,OUT=$I18,$4=VSS,$5=VDD); + subcircuit INV2 $4 (IN=$I16,$2=$I45,OUT=$I17,$4=VSS,$5=VDD); + subcircuit INV2 $5 (IN=$I15,$2=$I44,OUT=$I16,$4=VSS,$5=VDD); + subcircuit INV2 $6 (IN=$I14,$2=$I43,OUT=$I15,$4=VSS,$5=VDD); + subcircuit INV2 $7 (IN=$I13,$2=$I42,OUT=$I14,$4=VSS,$5=VDD); + subcircuit INV2 $8 (IN=$I12,$2=$I41,OUT=$I13,$4=VSS,$5=VDD); + subcircuit INV2 $9 (IN=$I11,$2=$I40,OUT=$I12,$4=VSS,$5=VDD); + subcircuit INV2 $10 (IN=$I19,$2=$I39,OUT=$I11,$4=VSS,$5=VDD); end; END @@ -369,16 +369,16 @@ END assert_equal(l2n.netlist.to_s, <