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iverilog/tgt-vhdl
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Cary R 327cdc77a3 Add some casts in tgt-vhdl to remove warnings. 
The Cygwin compiler is a bit picky. This patch adds some casts
to remove compilation warnings. In the past I have had warnings
off because of problems with the STL, but we may as well get
rid of the warnings we can. It also does not recognize that an
assert(0) or assert(false) ends a routine so it complains about
no return at end of function or variables not being defined.
(cherry picked from commit 3f12a401eb)
 		2009-12-12 08:31:15 -08:00
..
vhpi Move the VHDL support package 2008-07-07 15:36:13 +01:00
Makefile.in Add explicit dependencies on generated header files. 2009-12-04 15:20:03 -08:00
cast.cc Add some casts in tgt-vhdl to remove warnings. 2009-12-12 08:31:15 -08:00
display.cc Handle %m in VHDL $display code 2009-01-25 07:55:20 -08:00
expr.cc Cleanup a few more issues found with cppcheck. 2009-11-01 11:00:53 -08:00
logic.cc Fix some more errors when reading from VHDL outputs 2009-01-25 07:50:03 -08:00
lpm.cc Convert IVL_LPM_CONCAT to use ivl_lpm_size() instead of ivl_lpm_selects() 2009-09-03 17:52:35 -07:00
process.cc Allow labelled begin blocks to contain processes in VHDL target 2009-09-03 18:16:47 -07:00
scope.cc Handle generate scopes with signals in VHDL target 2009-09-03 18:16:35 -07:00
state.cc Add some casts in tgt-vhdl to remove warnings. 2009-12-12 08:31:15 -08:00
state.hh Handle generate scopes with signals in VHDL target 2009-09-03 18:16:35 -07:00
stmt.cc Add some casts in tgt-vhdl to remove warnings. 2009-12-12 08:31:15 -08:00
support.cc Add some casts in tgt-vhdl to remove warnings. 2009-12-12 08:31:15 -08:00
support.hh Tidy up reduction functions in support.cc 2008-09-13 18:20:12 +01:00
vhdl-s.conf Cary R.'s additional system functions, real value error messages, etc. 2008-09-06 12:06:01 +01:00
vhdl.cc Unify the version stamp in the version_*.h header files. 2009-11-27 12:37:11 -08:00
vhdl.conf Remove redundant back-end selections. 2008-09-07 16:43:54 -07:00
vhdl_config.h.in V0.9: Fix memory.h include issues. 2009-10-26 11:16:50 -07:00
vhdl_element.cc Improve memory management in VHDL target 2009-01-18 16:42:10 -08:00
vhdl_element.hh Improve memory management in VHDL target 2009-01-18 16:42:10 -08:00
vhdl_helper.hh Improve memory management in VHDL target 2009-01-18 16:42:10 -08:00
vhdl_syntax.cc VHDL translation for timescale 2009-02-23 16:23:56 -08:00
vhdl_syntax.hh Add some casts in tgt-vhdl to remove warnings. 2009-12-12 08:31:15 -08:00
vhdl_target.h Fix VHDL naming collisions with modules 2009-02-05 14:40:47 -08:00
vhdl_type.cc Generate VHDL array type declarations of Verilog arrays 2008-07-17 13:08:55 +01:00
vhdl_type.hh Generate VHDL array type declarations of Verilog arrays 2008-07-17 13:08:55 +01:00