iverilog/ivtest/ivltests/warn_opt_sys_tf.v

26 lines
420 B
Verilog

// This will not generate a RE if these are calling the correct warning.
module top;
integer res;
initial begin
// $countdrivers is now implemented
res = $getpattern;
$input;
$key;
$nokey;
$list;
$log;
$nolog;
$save;
$restart;
$incsave;
res = $scale;
$scope;
$showscopes;
$showvars;
$sreadmemb;
$sreadmemh;
$display("PASSED");
end
endmodule