38 lines
515 B
Verilog
38 lines
515 B
Verilog
// Check that void casts are supported
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module test;
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int a;
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real b;
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string c;
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function int f1(int x);
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a = x;
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return x;
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endfunction
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function real f2(real x);
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b = x;
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return x;
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endfunction
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function string f3(string x);
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c = x;
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return x;
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endfunction
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initial begin
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void'(f1(10));
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void'(f2(1.0));
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void'(f3("10"));
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if (a === 10 && b == 1.0 && c == "10") begin
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$display("PASSED");
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end else begin
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$display("FAILED");
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end
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end
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endmodule
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