34 lines
739 B
Verilog
34 lines
739 B
Verilog
// Check that it is possible to call functins with empty arguments if they have
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// default values.
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module test;
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bit failed = 1'b0;
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`define check(expr, val) \
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if (expr !== val) begin \
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$display("FAILED. %s, expected %d, got %d", `"expr`", val, expr); \
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failed = 1'b1; \
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end
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function integer f(integer a = 1, integer b = 2, integer c = 3);
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return a * 100 + b * 10 + c;
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endfunction
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initial begin
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`check(f(4, 5, 6), 456);
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`check(f(4, 5, ), 453);
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`check(f(4, , 6), 426);
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`check(f( , 5, 6), 156);
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`check(f(4, , ), 423);
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`check(f( , 5, ), 153);
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`check(f( , , 6), 126);
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`check(f( , , ), 123);
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if (!failed) begin
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$display("PASSED");
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end
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end
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endmodule
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