$date
	Sun May 15 18:09:25 2022
$end
$version
	Icarus Verilog
$end
$timescale
	1s
$end
$scope module top $end
$var reg 8 ! \arr[4] [7:0] $end
$upscope $end
$enddefinitions $end
$comment Show the parameter values. $end
$dumpall
$end
#0
$dumpvars
b0 !
$end
#1
b11111111 !