Commit Graph

5188 Commits

Author SHA1 Message Date
Nick Gasson 0e2628a3fb Minimal implementation of IVL_LPM_MUX
This handles the (common) case of the select being only
1 bit wide. Implemented as a concurrent assignment with
a `when' clause.
2008-08-03 12:46:50 +01:00
Nick Gasson 45dfa28dba Remember signal pin a nexus was attached to
Also modify nexus_to_var_ref to set the correct array
offset when the signal is an array (the offset comes
from the pin).
2008-08-03 11:41:26 +01:00
Nick Gasson c8cbac58f5 Add forward declarations for functions
This patch adds a forward declaration for every user funciton.
This fixes VHDL compile problems if a function calls another
before it has been declared.
2008-08-03 10:50:31 +01:00
Nick Gasson c1b5424ca6 Implement assignment with multiple lvals
Multiple lvals are implemented by first assigning the complete
RHS to a temporary, and then assigning each lval in turn as
bit-selects of the temporary
2008-08-02 18:40:24 +01:00
Nick Gasson c706c94e38 Generate a vhdl_var_ref for every assignment lval
This completes the refactoring of make_assignment
necessary to implement multiple lvals.
2008-08-02 18:20:18 +01:00
Nick Gasson fad8abee34 Start refactoring make_assignment for multiple lvals
This patch lifts the RHS generating code out of the
lval-specific code and sticks a loop around the lvals.
2008-08-02 16:38:44 +01:00
Nick Gasson 9448c5939c Always user Ternary_* support functions for ternary assignments
Previously the code generator expanded ternary assignments to
and `if' statement. This patch replaces that with a single assignment
and a call to a Ternary_* support function. This will make it
much easier to support multiple lvals later.
2008-08-02 15:46:36 +01:00
Nick Gasson 752a90dc2f Insert blank line before VHDL process in output 2008-08-02 10:45:38 +01:00
Nick Gasson a60216ec15 Use ivl_process_* functions for file/line number information 2008-08-02 10:44:03 +01:00
Nick Gasson 5d0df8d880 Change format of line file/line numbers 2008-08-02 10:42:00 +01:00
Nick Gasson 1cd13ecdbd Merge branch 'master' of git://icarus.com/~steve-icarus/verilog into vhdl 2008-08-02 10:37:22 +01:00
Stephen Williams c14987aa18 Merge branch 'master' into verilog-ams 2008-08-01 21:15:11 -07:00
Cary R aeec93a322 $time, $stime and $simtime return an integer rounded value for %f
The $time, $stime, $simtime (integer time) system functions should
return a rounded integer value in a real context.
2008-08-01 20:37:41 -07:00
Cary R 61930c3b6e Add file and line information to processes.
This patch adds file and line information to processes
(initial and always).
2008-08-01 20:13:29 -07:00
Cary R 296f1bacc1 vvp_vector4_t words are unsigned long.
The double to vvp_vector4_t constructor was not using the correct
declaration for the bit words. This worked as long as unsigned and
unsigned long were the same size (usually).
2008-08-01 20:10:52 -07:00
Nick Gasson bb80b432e6 Add comments file/line number comments
Added to entities, architectures, and processes
2008-08-01 21:21:42 +01:00
Stephen Williams be551a6b68 Add a stub vvp_net_t::delete method
Some compilers reference the delete method for the vvp_net_t object
even though it is never used. So provide a stub with an assert.
2008-08-01 09:48:59 -07:00
Nick Gasson e0834f7f38 Add NAND and NOR logic devices 2008-08-01 17:46:04 +01:00
Nick Gasson a26d91557b Add binary NAND and NOR operators 2008-08-01 17:42:26 +01:00
Nick Gasson 3f73c9bb54 Make sure argument to unary - is signed 2008-08-01 16:35:47 +01:00
Nick Gasson 09f3eb4a36 Don't bother calling reduction function if argument is std_logic 2008-08-01 16:27:55 +01:00
Nick Gasson 33885ed891 Merge branch 'master' of git://icarus.com/~steve-icarus/verilog into vhdl 2008-08-01 08:25:38 +01:00
Nick Gasson d21277f1b9 Tidy up whitespace in output 2008-07-31 21:17:49 +01:00
Nick Gasson 7b0f675785 Add check for sequential UDPs 2008-07-31 21:08:59 +01:00
Nick Gasson db339b8fc3 Stub for UDP logic devices 2008-07-31 20:59:20 +01:00
Stephen Williams eca8a46b40 Merge branch 'master' into verilog-ams 2008-07-30 18:18:40 -07:00
Stephen Williams 4ca7f2a9bd Merge branch 'master' of ssh://steve-icarus@icarus.com/~steve-icarus/git/verilog 2008-07-30 18:05:43 -07:00
Stephen Williams 221c63b766 Add some simple error checking. 2008-07-30 18:02:07 -07:00
Stephen Williams 9f04641fc7 Detect and elaborate AMS access functions.
Detect function call expressions that turn out to be calls to the
access function of a nature. Elaborate the access function and stub
the emit code. This gets the access function just short of the code
generator.
2008-07-30 18:01:41 -07:00
Cary R 3191b3efcb An included file should start at line 1.
The preprocessor was incorrectly setting the line when starting
an include file to the line it was called from instead of 1.
This would give incorrect line numbers for errors/warnings in
the included file.
2008-07-30 15:04:19 -07:00
Cary R 1a41ac3145 Update real to int conversion: -inf is 'b0 not 'b1 like +inf.
The new real to int conversion was incorrectly setting the
bits for minus infinity to all ones. This is incorrect in a
two's complement encoding where the largest negative number
would be a leading 1 followed by an infinite number of zeros.
2008-07-30 14:59:13 -07:00
nog 6d4dd5ae3b Fix macro argument replacements
When searching for macro arguments to replace, make sure that the
argument is not the begining of another identifier.
2008-07-30 14:52:04 -07:00
Cary R 6cb3d86d15 Update %cvt/vr to use new double to vector conversion (constructor).
This patch updates the %cvt/vr command to use the new double to vector
constructor. This allows the resulting bit pattern to be larger than
a long. The old method was producing incorrect results without a
warning for large bit values.
2008-07-30 14:40:14 -07:00
Cary R 7a4f85d382 Make .part/pv strength aware and resolv vec8_pv aware.
This patch makes .part/pv strength aware, resolv vec8_pv
aware. vvp_net_fun_t adds vec8_pv as a virtual function
with an appropriate error default. vvp_fun_signal should
full support vec8_pv (not tested and may not be needed).
2008-07-30 14:31:33 -07:00
Cary R 5207be0778 Use ivl_signal_dimensions to find arrays not ivl_signal_array_count
ivl_signal_dimensions() is the correct call to use to determine
if a signal is part of an array. If it is greater than zero the
signal is an array.
2008-07-30 14:25:29 -07:00
Cary R 2ceb0539af IVL_VT_LOGIC is default localparam type not IVL_VT_NO_TYPE
This patch fixes a bug where a local parameter with only a range
was incorrectly setting the default parameter type to IVL_VT_NO_TYPE.
This would create a compile time assert for any untyped
parameter/localparam immediately following it.
2008-07-30 14:16:18 -07:00
Cary R f9c67e21b2 Some variable part select arguments must be drawn before the part select.
Some variable part selects need to draw the select argument before the
variable part select is printed e.g.(.array/port).
2008-07-30 14:07:03 -07:00
Nick Gasson baa2363e85 Split logic device code into separate file 2008-07-30 10:13:08 +01:00
Nick Gasson e5b8abfb23 Remove debugging output 2008-07-29 21:15:51 +01:00
Nick Gasson 9f6f711f8d Remove unused variable 2008-07-29 21:08:50 +01:00
Nick Gasson 9a5b7bb0b0 Connect signals together if joined in a nexus 2008-07-29 21:03:00 +01:00
Nick Gasson eaf1cc9120 Fix assertion failure with arrayed signals 2008-07-29 19:47:17 +01:00
Nick Gasson 3bcd42dc8f Fix case where logic device has no valid output 2008-07-29 19:39:20 +01:00
Nick Gasson 744fbed783 Finish re-writing nexus code 2008-07-29 19:33:40 +01:00
Nick Gasson c9454b346e Fix module3.12B 2008-07-29 19:04:41 +01:00
Nick Gasson 5ec2c37e7e Get functions working again 2008-07-29 15:29:49 +01:00
Nick Gasson 25602e487d Comment 2008-07-29 15:12:51 +01:00
Nick Gasson e037ffd952 Create temporaries for LPM outputs 2008-07-29 15:09:58 +01:00
Nick Gasson 48c1a7982c Make seen_nexus private 2008-07-29 14:24:04 +01:00
Nick Gasson a842b327c7 Generate constant drivers as concurrent assignments 2008-07-29 14:02:05 +01:00