Commit Graph

4977 Commits

Author SHA1 Message Date
Stephen Williams 7d6b391572 In continuous assignment, r-value is sized or lossless, never self determined.
The r-value expression takes on at least the width of the l-value. If
there is a sized width greater then the l-value width, take that on
instead. But if the r-value is unsized, there are unsized sub-expressions
that cause the expression as a whole to be unlimited width, so elaborate
and evalulate the r-value as lossless.
2008-09-13 17:40:19 -07:00
Stephen Williams 804f5a94d5 Manage expression types for ternary a little better.
The true and false expression clauses must have compatible types,
which are not necesarily identical. In particular, VT_BOOL and
VT_LOGIC are compatible for the purposes of ternary arguments. The
test in NetETernary::synthesize was incorrect.

In the process, fix the type handling of NetConst objects to allow
for IVL_VT_BOOL constants. This is information that the downstream
may find useful, so should be handled correctly.
2008-09-13 16:43:39 -07:00
Cary R 3d5998cd63 Allow variable delay in continuous assignments.
Add the ability to delay continuous assignments using a
variable delay.
2008-09-13 15:01:23 -07:00
Nick Gasson eda1df5df2 Avoid processing tgt-vhdl/Makefile.in twice
It's processed once by AC_OUTPUT in configure.in and then again
by AC_OUTPUT in tgt-vhdl/configure.in. This is a bug from when I
first started on the VHDL target, and was basing it on the tgt-vvp
code. The call to configure in the tgt-vhdl directory is not
actually necessary either, since it doesn't do any checks not
performed elsewhere, so that should proably be removed later.
2008-09-13 14:57:33 -07:00
Stephen Williams 3d86cc1a15 Reduce the size of Link class objects.
Put the enumerated members of the Link class into bit fields to keep
the size down to a minimum.
2008-09-13 14:51:42 -07:00
Nick Gasson c5263268ed Tidy up reduction functions in support.cc
This removes some unnecessary code duplication as the functions
only differ (or need to differ) in two places.
2008-09-13 18:20:12 +01:00
Nick Gasson e5abe182c1 Add reduction XOR/XNOR in expressions 2008-09-13 18:09:11 +01:00
Nick Gasson e5343ef73f Implement arithmetic right shift >>>
This is currently implemented using the numeric_std
shift_right function as the sra operator is not defined on
signed/unsigned types before VHDL-2006.
2008-09-13 15:23:42 +01:00
Cary R 1f9f73a4be Modify $realtime to use vpiScaledRealTime
$realtime should use vpiScaledRealTime instead of scaling the
time itself. This also allows it to work for time over 32 bits.
2008-09-12 20:36:08 -07:00
Cary R 1e60754ff0 Partial non-blocking event control implementation
This patch pushes the non-blocking event control information to
the code generator. It adds the %evctl statements that are used
to put the event control information into the special thread
event control registers. The signed version (%evctl/s) required
the implementation of %ix/getv/s to load a signed value into
an index register. It then adds %assign/wr/e event control based
non-blocking assignment for real values. It also fixes the other
non-blocking real assignments to use Transport instead of inertial
delays.
2008-09-12 20:00:28 -07:00
Larry Doolittle cdfb2315cf One more signed vs unsigned comparison fix
Introduced in a8ad505af7
Various improgements to expression ::synthesize methods
2008-09-12 19:39:15 -07:00
Nick Gasson 2516d63805 A basic translation of the Verilog power operator to VHDL
The exponentiation operator in VHDL is not defined for numeric_std
types. We can get around this by converting the operands to integers,
performing the operation, then converting the result back to the
original type. This will work OK in simulation but certainly will not
synthesise unless the operands are constant.

However, even this does not work quite correctly. The Integer type in
VHDL is signed and usually only 32 bits, therefore any result larger
than this will overflow and raise an exception. I can't see a way
around this at the moment.
2008-09-12 20:19:22 +01:00
Stephen Williams 3abf51dcad Get rid of names attached to Links.
This is simply no need for the names on links,
other then for debug messages, and there are
better ways to handle that.
2008-09-10 19:34:28 -07:00
Stephen Williams 5dfecb3789 Remove useless Link instance number. 2008-09-10 07:29:23 -07:00
Cary R 088c7f3feb Add calculated delay, real valued, non-blocking assignments.
This patch add the ability to do a non-blocking assignment
for real values using a non-constant (calculated) delay.
2008-09-09 20:09:49 -07:00
Cary R 3982781e97 Add cast to remove warning. 2008-09-09 19:24:14 -07:00
Larry Doolittle f233793061 Spelling fixes
No code changes.
2008-09-09 19:21:42 -07:00
Larry Doolittle 8704e3e34f Compatibility with gcc-4.3
Add "include"s to fix errors flagged by gcc-4.3.2
2008-09-09 19:19:51 -07:00
Nick Gasson ec2511da64 Use British spelling and fix a few typos 2008-09-09 19:57:32 +01:00
Stephen Williams 05f129211e Remove the elaborate_net methods.
These methods are no longer in use, their functionality taked over
by a compination of elab_and_eval and NetExpr::synthesize methods.
2008-09-08 21:26:26 -07:00
Stephen Williams eb9d037bf0 Remove elaborate_net from all elaborations.
Use elaborate_expr and synthesize() methods in place of the
elaborate_net methods, so that elaboration is more consistent.
2008-09-08 19:13:49 -07:00
Stephen Williams 90f55a1d00 Merge branch 'elaborate-net-rework' 2008-09-08 18:02:51 -07:00
Stephen Williams 527f5c4849 The -V flag gets version information from all parts.
When the -V flag is passed to the iverilog command, we can easily
print the version information for the driver itself, but it is also
valuable to probe all the components that would have been used for
a real compile. So the driver executes the preprocessor and the ivl
core to have them print version information.

The ivl core program also tries to load the target code generator
and get version information to print. For this to work, create a new
optional entry point "target_query" that takes a query key string as
an argument and returns a const string as the result. Use this with
the key "version" to get version information out of the target.
2008-09-07 21:54:46 -07:00
Stephen Williams 4898cd04c6 Remove redundant back-end selections.
Target selection is done by the DLL target code generator, so there
is no value having a layer of target selection ahead of it. Remove
all that redundant code and simplify the target config files to reflect
this.
2008-09-07 16:43:54 -07:00
Stephen Williams 6411e96193 Generate delay devices for sign-extend devices.
It is possible for signe-extend to have a delay attached to it. (Same
for repeat.) Handle it like other LPM devices, by stuffing a .delay
device into the output path of the device, if appropriate.
2008-09-06 18:05:18 -07:00
Stephen Williams dd47599d55 Merge branch 'master' into elaborate-net-rework 2008-09-06 17:20:14 -07:00
Nick Gasson 8fc35fa32a Avoid emitting empty string at end of $display translation
This happened if the last part of a format string was a % code.
2008-09-06 13:23:55 +01:00
Nick Gasson 6fe7583784 Cary R.'s additional system functions, real value error messages, etc.
I've changed the find_entity() error messages to asserts since
this should be fixed by the previous patch.
2008-09-06 12:06:01 +01:00
Nick Gasson a34348bb35 Add (temporary) error for ICT_SCOPE_GENERATE
Generate scopes were previously ignored, and this would cause a segfault
later on. This patch gives an error whenever it encounters a generate
scope. This should be removed once generate statements are implemented.
2008-09-06 11:38:37 +01:00
Stephen Williams 8717a85f7f Prepare for snapshot 20080905 2008-09-05 17:44:41 -07:00
Cary R 5bf55485d5 Pass file and line number information for expression constants.
This patch passes the file and line number information for
constants that are used in expressions.
2008-09-05 17:33:45 -07:00
Stephen Williams 38970fea65 Merge branch 'vhdl' 2008-09-05 14:40:48 -07:00
Cary R 90fbac6e33 Add callbacks to vpiMemory objects.
This patch adds the ability to set a global array callback.
These type of callbacks will be called when any element of
the array changes.
2008-09-04 21:37:50 -07:00
Larry Doolittle 66949122cf Non-controversial whitespace cleanup
Nothing to do with tab width!  Eliminates useless
trailing spaces and tabs, and nearly all <space><tab>
pairings.  No change to derived files (e.g., .vvp),
non-master files (e.g., lxt2_write.c) or the new tgt-vhdl
directory.

Low priority, simple entropy reduction.  Please apply
unless it deletes some steganographic content you want
to keep.
2008-09-04 21:31:30 -07:00
Stephen Williams 6f002935d7 Parse attributes on statements within event statements.
Statements can have attributes attached to them. Handle a few cases in
the parser where attributes may be attached to statements, and get them
as far as the pform.
2008-09-04 21:27:21 -07:00
Stephen Williams 5f0b723534 Merge branch 'master' into elaborate-net-rework 2008-09-03 19:59:31 -07:00
Cary R 7beb059d90 Add blocking repeat event control, make repeat sign aware
This patch adds blocking repeat event controls and also makes the
base repeat statement sign aware. If the argument to repeat is
negative (it must be a signed variable) then this is treated just
like an argument of 0 (there is no looping). Doing this allows us
to model the repeat event control as follows.

  lhs = repeat(count) @(event) rhs;

is translated to:

  begin
    temp = rhs;
    repeat (count) @(event);
    lhs = temp;
  end

This patch also pushes the non-blocking event control
information to the elaboration phase where it will report they
are not currently supported.
2008-09-03 19:35:54 -07:00
Stephen Williams 60169f6353 Get generate block scope from generate case.
The generate block is a placeholder for the generate items, and it
is the items themselves that can specify the name of the generate
block that is created.
2008-09-03 17:59:39 -07:00
Stephen Williams e4411777ed Remove unused net_force.cc source file. 2008-09-02 18:38:04 -07:00
Stephen Williams 456fffa7ed Remove last vestiges of XNF.
XNF hasn't been supported in a while. Xilinx doesn't put any effort
into it either, for that matter.
2008-09-02 18:23:48 -07:00
Nick Gasson 4cb2090978 Fix vhdl_expr::cast when expression has no assigned type
This avoids a couple of segfaults
2008-09-02 20:22:50 +01:00
Nick Gasson ff766899b0 Add IVL_LPM_CMP_GT 2008-09-02 19:07:38 +01:00
Nick Gasson 122890fef4 Make sure LPM expression is cast to the output type
This fixes some signed/unsigned bugs identified by the signedX tests.
2008-09-02 19:02:54 +01:00
Cary R 1944f372c5 Fix a couple uninitialized value problems found with tgt-vhdl.
This patch fixes two uninitialized variable problems found
with valgrind when testing the VHDL code generator.
2008-09-01 21:23:58 -07:00
Cary R 8fbfdffe91 Allow .array/port input access generate statement.
For nested array accesses the .array/port statement must
evaluate its input argument before it starts printing the
actual .array/port statement.
2008-09-01 14:04:51 -07:00
Larry Doolittle 23127852c7 Compatibility with gcc-4.3
Add "include" to fix error with abort() in dup_expr.cc
Add "include" to AStatement.h so usage of struct PExpr works
Get rid of eval_tree.cc:577: warning: suggest parentheses around comparison in operand of ^
2008-09-01 13:55:57 -07:00
Stephen Williams c150223a3a Fix problem with vvp_vector2_t right shift
that trips only when starting with perfectly
aligned inputs.
2008-09-01 13:55:42 -07:00
Stephen Williams c0a4b7c670 Fix a bug in vector evaluation of abs().
The calculation of the abs of a signed value
was inverting the value if it was signed,
and not if it was negative.
2008-08-30 17:35:57 -07:00
Stephen Williams 319b886118 Build files compatible with snapshot 20080830 2008-08-30 17:09:51 -07:00
Stephen Williams fc476aa281 Fix right shift of vvp_vector2_t.
The right shift of vvp_vector2_t needs to
account for and mask off shifted bits. Otherwise
there will be unexpected results after
a vvp_vector2_t::trim method.
2008-08-30 15:30:22 -07:00