Move check of the value $fatal is called with from the compiletf to
the calltf routine, since the value may not be known at compiletf
time. If the value is invalid, it just prints a warning that $fatal
was called with a bad finish_number, and resets it to the default 1.
Changes the compile time check for a numeric argument to a warning.
Also, fixes bug where $fatal called without an argument causes problems.
When selecting bits from unsized literals, we do not put a limit
on the size of the literal, so there is no top above which we
stop getting literal bits.
Icarus does not support interconnect delays so INTERCONNECT is
currently ignored. The SDF parser does not currently support a
bit select as a port_instance. Since we are already ignoring
the INTERCONNECT I added support for bit selects there. This
is probably the most common place to find them.
This is part of the 1800-2009 standard (Section 23.3.2.3) and allows
ports of module instances to be declared like:
modname instance(.foo, .bar);
instead of
modname instead(.foo(foo), .bar(bar));
The only tricky part about this is the implicit port connection shall
not create an implicit net declaration. To make this happen, the path
of least resistance was to add a bool to PEIdent indicating that it
should not implicitely create a net.
This does not rely on the generation flag to be 2009, following the
trend that new port naming convention (like ANSI style ports) work
regardless of the generation.
Added generation flag -g2009 which enables support for 1800-2009
constructs. Added related support such as "1800-2009" in the
`begin_keywords directive.
Keeps 2005 as the default generation for now.
Removed the -gsytem-verilog flag and folded the 1800-2005 stuff into
1800-2009. The rationale behind this is we have so little of
1800-2005 actually implemented that it does not make sense to
distinguish between 1800-2005 and 1800-2009 SystemVerilog extensions,
so we just count them all as the new 1800-2009 Verilog language.
When using MinGW, routines registered via atexit() inside a
DLL are only called when the DLL is detached. If not detached
manually, DLLs are automatically detached *after* all remaining
open files are closed. This meant that by the time the LXT or
LXT2 close_dumpfile routine was called, the dump file handle
was no longer valid, so any remaining output was lost. This
patch fixes the problem by manually detaching the VPI modules.
Like I did for SystemVerilog the other day this patch adds all the
Verilog-AMS 2.3.1 keywords. This necessitated adding one my byte
to the gperf -k argument (byte 9) to make the laplace_?? tokens
have a unique hash.
This patch adds the SystemVerilog keywords to Icarus. This allows
use to easily verify that out plain Verilog does not contain any
SystemVerilog keywords. The keywords are not parsed in any way.
When parsing a Verilog file using -gsystem-verilog any identifier
that is a keyword will cause a parse error. It is the users
responsibility to figure out the problem since bison does not
give nice error message when it finds a keyword instead of an
identifier.
When handling the $signed/$unsigned system functions, the compiler
was applying the new signed/unsigned property to the NetExpr object
representing the input argument. This caused the input argument to
be evaluated incorrectly. This patch fixes this by applying the new
property to the NetExpr object created to pad the result to the
required size.
In testing this fix, it was also discovered that the width of the
input argument expression was not being calculated correctly. This
patch also fixes this issue.
Creation of implicit nets requires knowledge of whether an identifier
has been declared before it is used. Currently implicit nets are
created during elaboration, but by this stage the order of declaration
and use is not known. This patch moves the creation of implicit nets
into the parser stage.
After changing an array word, vvp propagates the change to every port
attached to the array. The code did not properly handle the case of
an array port declared in an automatic scope with an associated array
declared in a static scope.
The process of inverting and copying can be collapsed into a single
operation that should run a little faster. Also, inverting readily
vectorizes itself. I've also possibly reduced useless vvp_not_fun
iterations.
Also, include some minor tweaks to the vvp_vector8_t handling of
vector copies. This is more to clean up code, although it should
slightly improve performance as well.
The zero element was already returned so it can not be reused a
second time. This was crashing when things went off the end of
the list since the do all functor was off by one.
In a typical debug simulation run, a user tracing all the signals
in the simulation may wind up creating millions of these. Rework
the vcd_info structure to be more compact and possibly faster to
scan.
The scope thread rework broek --with-valgrind builds due to the
different handling of the list of threads. Rework valgrind enabled
handling of the thread set within a scope.
Rather then lock/unlock the work queue ring for every item, save
tons of pthread lock manipulation by allocating to the producer
in batches. Over the long run, this doesn't change the CPU balance
or hold up either thread, but it eliminates almost 3/4 of the
lock/unlock episodes.
The time change is usually a trivial operation, so instead carry
a timestamp on all the work items and let the work thread decide
on its own when to do a SET_TIME operation. This reduces some
pthread overhead and thus gets us some better performance.
The scope contains the threads running within. The rework of this
patch allows all threads to know their scope, and cleans up the
handling of threads listed in the scope.
The padding for a signal select was using the signal to determine
if the padding should be singed or not. In reality this should be
unsigned padding unless the select was enclosed in a $signed().