af8d6fbf01
NetAssign handles lvalues as pin links
...
instead of a signal pointer,
Wire attributes added,
Ability to parse UDP descriptions added,
XNF generates EXT records for signals with
the PAD attribute.
1998-11-23 00:20:22 +00:00
ebad845fc3
Add procedural while loops,
...
Parse procedural for loops,
Add procedural wait statements,
Add constant nodes,
Add XNOR logic gate,
Make vvm output look a bit prettier.
1998-11-09 18:55:33 +00:00
b118634189
Handle procedural conditional, and some
...
of the conditional expressions.
Elaborate signals and identifiers differently,
allowing the netlist to hold signal information.
1998-11-07 17:05:05 +00:00
3fb7a053be
Introduce verilog to CVS.
1998-11-03 23:28:49 +00:00
steve