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3 Commits

Author SHA1 Message Date
steve ea96c3ef66 Support initialization of FF Q value. 2000-05-14 17:55:04 +00:00
steve b90cda1f3f Carry strength values from Verilog source to the 
pform and netlist for gates.

 Change vvm constants to use the driver_t to drive
 a constant value. This works better if there are
 multiple drivers on a signal.
 2000-05-07 04:37:55 +00:00
steve 2094a2f466 Catch some simple identity compareoptimizations. 2000-04-20 00:28:03 +00:00