Commit Graph

6240 Commits

Author SHA1 Message Date
steve 8e135a1020 Non blocking assign to memory words. 2005-03-06 17:07:48 +00:00
steve 0fb1fd36ee Handle memory words in l-value concatenations. 2005-03-05 05:47:42 +00:00
steve e7c2e06260 Check that lead.mv vector width matches word. 2005-03-05 05:45:18 +00:00
steve 73997f813c Get read width of unitialized memory words right. 2005-03-05 05:44:32 +00:00
steve 75af32bd3c Get base address from word ranges that VPI user passed. 2005-03-05 05:43:03 +00:00
steve 4ccbb4f0b2 Get rval width right for arguments into task calls. 2005-03-05 05:38:33 +00:00
steve 85286cc086 Rearrange how memories are supported as vvp_vector4 arrays. 2005-03-03 04:33:10 +00:00
steve 04604188df Clock compression fix from Tony. 2005-02-19 16:45:01 +00:00
steve f7dc4307bd Fix duplicate delete from pr1073. 2005-02-19 16:44:38 +00:00
steve 257e1f9516 Support shifts and divide. 2005-02-19 02:43:38 +00:00
steve 5fe5d9184d Handle signed divide. 2005-02-19 02:41:23 +00:00
steve 589eb1d315 Implement .arith/div. 2005-02-19 01:32:52 +00:00
steve 2fcaac4060 Support constant part select writes to l-values, and large part select reads from signals. 2005-02-15 07:12:55 +00:00
steve 4051f7d986 Handle bitmux lvalues for constant r-values. 2005-02-14 05:00:11 +00:00
steve 02d0719529 l-value input may be a vector. 2005-02-14 04:58:50 +00:00
steve aaf35ab1a9 Handle bit selects in l-values to assignments. 2005-02-14 01:51:39 +00:00
steve c5e7e2ec0a Signals may receive part vectors from %set/x0
instructions. Re-implement the %set/x0 to do
 just that. Remove the useless %set/x0/x instruction.
2005-02-14 01:50:23 +00:00
steve ff067bb959 tri0 and tri1 resolvers must replace HiZ with 0/1 after resolution. 2005-02-13 05:26:30 +00:00
steve 1d7235b4f1 Replace supply nets with wires connected to pullup/down supply devices. 2005-02-13 01:15:07 +00:00
steve 97e0723bd1 Cleanup unused truth tables. 2005-02-12 23:05:25 +00:00
steve d4eb4d38bc Implement a-b muxes as vector devices 2005-02-12 22:54:29 +00:00
steve d00e3fc9a9 Check IVL_LPM_MUX configuration. 2005-02-12 22:53:41 +00:00
steve 9ec00e1288 Fix copyright notice. 2005-02-12 22:52:45 +00:00
steve 85d9ebded8 Implement the vvp_fun_muxz functor. 2005-02-12 22:50:52 +00:00
steve d74177634c Restructure NetMux devices to pass vectors.
Generate NetMux devices from ternary expressions,
 Reduce NetMux devices to bufif when appropriate.
2005-02-12 06:25:40 +00:00
steve eca4f4fa97 Draw C4 and C8 constants to account for strength. 2005-02-12 06:25:15 +00:00
steve 6b7b82758a Check nexus widths of IVL_LO_ nodes. 2005-02-12 06:17:43 +00:00
steve 355ead0002 Add debug dumps for vectors, and fix vvp_scaler_t make from BIT4_X values. 2005-02-12 06:13:22 +00:00
steve 4fce321900 Support C8 constants. 2005-02-12 03:27:18 +00:00
steve 2e6d2f8e98 Support scheduling vvp_vector8_t objects. 2005-02-12 03:26:14 +00:00
steve 55b5bf9d39 distinguish between single port namy instances, and single instances many sub-ports. 2005-02-10 04:56:58 +00:00
steve 1979fca239 Get the C4 width right for undriven nexa. 2005-02-10 04:55:45 +00:00
steve a0583ef124 Simplify vvp_scaler strength representation. 2005-02-10 04:54:41 +00:00
steve ee5bb5fcaf Add the NetRepeat node, and code generator support. 2005-02-08 00:12:36 +00:00
steve ca1bbc79a3 Add .repeat functor and BIFIF functors. 2005-02-07 22:42:42 +00:00
steve e74127e1fc Support .concat with arbitrary input counts. 2005-02-04 05:13:57 +00:00
steve b48abb2148 Add wide .arith/mult, and vvp_vector2_t vectors. 2005-02-04 05:13:02 +00:00
steve 97f83ffbe3 laborate reduction gates into LPM_RED_ nodes. 2005-02-03 04:56:20 +00:00
steve 018014368b Add support for reduction logic gates. 2005-02-03 04:55:13 +00:00
steve 20be0351ae Elaborate unary subtract and NOT in netlist
contexts, and concatenation too.
2005-01-30 05:20:38 +00:00
steve 68a788221e Support LPM_SUB 2005-01-30 05:09:04 +00:00
steve 84b3e8e2dc Get .arith/sub working. 2005-01-30 05:06:49 +00:00
steve e6cdd32c19 Clarify width argument to NetNet constructor. 2005-01-30 01:43:48 +00:00
steve c23a35a033 Debug messages for PGAssign elaboration. 2005-01-30 01:42:05 +00:00
steve 609b6a7baa Netlist boolean expressions generate gate vectors. 2005-01-29 18:46:18 +00:00
steve 0609c5f18c Use scheduler to initialize constant functor inputs. 2005-01-29 17:53:25 +00:00
steve d51503ffd8 move AND to buitin instead of table. 2005-01-29 17:52:06 +00:00
steve 7625a6c3e7 Check width of constant attached to nexus. 2005-01-29 16:47:52 +00:00
steve 695718d691 Clarify width of nexus. 2005-01-29 16:47:20 +00:00
steve e04fb5c083 Elaborate parameter reference to desired width without concats. 2005-01-29 16:46:22 +00:00