a1a4f47894
vhdlpp: Unnecessary comment.
2015-02-19 17:07:41 +01:00
e569e07d4e
vhdlpp: Type 'NATURAL' is translated to 'int unsigned'.
2015-02-19 17:07:41 +01:00
ee840391d6
vhdlpp: std_logic_vector, signed & unsigned are considered global types.
2015-02-19 17:07:41 +01:00
0046e9eca0
vhdlpp: ActiveScope::is_vector_name() checks also for constants.
2015-02-19 17:07:41 +01:00
f51c037432
vhdlpp: Generics from external packages are accepted (warning instead of error).
2015-02-19 17:07:37 +01:00
763c6fe3c9
vhdlpp: Support for shift operators (SRL, SRR, SRA, SLA).
...
To be done: ROR & ROL.
2015-02-17 10:15:57 +01:00
49b6ddf93c
vhdlpp: Signal/variable assignments can have labels.
2015-02-17 10:15:57 +01:00
12b4914b63
vhdlpp: ExpName resolves enum values.
2015-02-17 10:15:57 +01:00
fc0728ab6f
vhdlpp: Forward typedefs.
...
It was required to make it possible to use typedefs in port types.
Types from packages are emitted in `ifdef..`endif instead of package..endpackage.
The purest solution is to keep package..endpackage and emit appropriate prefix.
Also, it would be great to have constants emitted in the same way.
2015-02-17 10:15:57 +01:00
cdf18de10e
vhdlpp: Make integer expressions sized during the emission step.
2015-02-05 16:20:49 +01:00
19ff6a434b
vhdlpp: Alternative way of dealing with unbounded vectors in fuctions (instances).
2015-02-05 12:00:25 +01:00
5349ca9a55
vhdlpp: Added Subprogram::write_to_stream_body() method.
2015-02-05 12:00:25 +01:00
5b7b980ead
vhdlpp: Support for multiple choices in case statements.
2015-02-05 12:00:25 +01:00
a1c2a8e605
vhdlpp: Generic syntax errors display messages.
2015-02-05 11:25:03 +01:00
8777cd8e7c
vhdlpp: Fixed ExpBitstring & ExpRelation write_to_stream() method.
2015-02-05 11:25:03 +01:00
11bb7ac348
vhdlpp: Expression::write_to_stream becomes const.
2015-02-05 11:25:03 +01:00
9de69f2f24
vhdlpp: SequentialStmts write_to_stream() methods.
2015-02-05 11:25:03 +01:00
dae3410dcd
vhdlpp: Variable::write_to_stream().
2015-02-05 11:25:03 +01:00
1a367c84b6
vhdlpp: Subprograms can have instances that take a different set of parameter types.
2015-02-05 11:25:03 +01:00
8a854affa6
vhdlpp: Clone routines for Expression & VType classes.
2015-02-05 11:25:03 +01:00
60077f4f06
vhdlpp: ExpBitstring elaborate_expr().
2015-02-05 11:25:03 +01:00
51ce9f1a60
vhdlpp: Minor correction for casting to integer.
2015-02-05 11:25:03 +01:00
48265ecd9b
vhdlpp: Subprograms return types have their ranges evaluated if possible.
...
Added VTypeArray::evaluate_ranges() method.
2015-02-05 11:24:59 +01:00
abbcea64d0
vhdlpp: Array attributes can be evaluated in packages/functions.
2015-02-04 16:57:43 +01:00
25c3798248
vhdlpp: Elaborate and emit functions work with ScopeBase instead of Architecture.
2015-02-04 16:57:43 +01:00
90293d8e0a
vhdlpp: VTypeArray::is_variable_length() uses ScopeBase to determine if variable has constant length.
2015-02-04 16:57:43 +01:00
621cf37339
vhdlpp: Added ScopeBase::find_param() method.
2015-02-04 16:57:43 +01:00
6d75af86e6
vhdlpp: Added Subprogram::fix_variables() method.
2015-02-04 16:57:43 +01:00
5d26f0e28d
vhdlpp: Added VTypeArray::is_variable_length() method.
2015-02-04 16:57:43 +01:00
774609fbbb
vhdlpp: VTypeArray stores parent type, in case it is a subtype.
2015-02-04 16:57:43 +01:00
9ba7694484
vhdlpp: Minor assert.
2015-02-04 16:57:43 +01:00
870a826225
vhdlpp: Corrected VTypeDef::emit_def() to allow typedefed names in function headers.
2015-02-04 16:57:43 +01:00
2ecfed0baa
vhdlpp: Moved part of check_unb_vector() to fix_logic_darray().
2015-02-04 16:57:43 +01:00
56e410f386
vhdlpp: SigVarBase::peek_name_() method made public.
2015-02-04 16:57:43 +01:00
d4dd635bf6
vhdlpp: Added ExpNew class.
2015-02-04 16:57:43 +01:00
c287281bbe
vhdlpp: Tries to determine if function return type is fixed size.
...
Added Subprogram::fixed_return_type() method.
2015-02-04 16:57:43 +01:00
962330f20a
vhdlpp: Functions support unbounded vectors as return type and parameters.
2015-02-04 16:57:43 +01:00
777e7e0a3d
vhdlpp: Added ExpFunc::func_ret_type() method.
2015-02-04 16:57:43 +01:00
839f9cd7ae
vhdlpp: Added ReturnStmt::cast_to() method.
2015-02-04 16:57:43 +01:00
b8b2f53027
vhdlpp: Added VType::get_generic_typename() method.
2015-02-04 16:57:43 +01:00
9b3bd039bb
vhdlpp: Added ExpCast class.
2015-02-04 16:57:42 +01:00
51b9191021
vhdlpp: Added VType::is_unbounded() method.
2015-02-04 16:57:42 +01:00
ff5b696569
vhdlpp: Improved SequentialStmt visitor.
2015-02-04 16:02:38 +01:00
b05a19dffc
vhdlpp: VTypeArray emits dimensions in a bit smarter way.
2015-02-04 16:02:38 +01:00
e6b22a2bea
vhdlpp: Visitor for SequentialStmt.
2015-02-04 16:02:38 +01:00
0592ba042e
vhdlpp: For-loop emission rewritten to handle 'range in subprograms.
2015-02-04 16:02:38 +01:00
6fd10dedb6
Add some implicit support for std and textio libraries
...
Patch submitted by Fabrizio Ferrandi.
2014-12-18 08:20:19 -08:00
2e8c4e3dbc
Basic patch from github #44
2014-11-04 11:39:01 -08:00
c55a013162
vhdlpp: Support for integer() function.
...
Note: I could not find any info about the integer() function, but it is
used in the VHDL standard packages (e.g. math_real, see:
http://www.csee.umbc.edu/portal/help/VHDL/packages/mathpack.vhd )
Real numbers are rounded, this is compatible with ModelSim behavior.
2014-10-17 14:53:59 +02:00
dfbca0b186
vhdlpp: Emit use_types in Architecture.
2014-10-17 14:13:06 +02:00
4a779f43bd
vhdlpp: Fix error message for 'right attribute.
2014-10-17 14:13:06 +02:00
97df6183a9
vhdlpp: Emit '-' std_logic value as 'x'.
...
Note: It is not a direct ("don't care" vs "unknown"), but I could not
find anything that suits better.
2014-10-17 14:13:06 +02:00
95faed8e9d
vhdlpp: Added basic support for concatenated expressions.
2014-10-15 10:51:21 +02:00
76aab15798
vhdlpp: Minor code cleaning.
2014-10-15 10:51:21 +02:00
e896f0c8e6
Remove some compile warnings in the vhdlpp code
2014-10-14 09:03:42 -07:00
9ff9cbf4aa
vhdlpp: Smarter determining the direction in for loops.
2014-10-10 18:39:14 +02:00
a992f3ce7c
vhdlpp: Evaluation for 'left and 'right attributes.
2014-10-10 18:35:17 +02:00
8cac72192f
vhdlpp: Fix array typedefs in packages.
2014-10-09 10:37:33 +02:00
7f6100be2a
vhdlpp: Emit VHDL 'integer' as SystemVerilog 'int'.
2014-10-09 10:29:14 +02:00
4b60d2737e
vhdlpp: Skip signed & unsigned in types dump in packages.
2014-10-09 10:28:35 +02:00
c7beef907d
vhdlpp: Support for 'range and 'reverse_range attributes.
2014-10-08 11:18:06 +02:00
44da7de651
vhdlpp: prange_t may have the direction determined automatically.
2014-10-08 10:26:37 +02:00
6887c82540
vhdlpp: Added ExpAttribute::write_to_stream().
2014-10-08 10:21:03 +02:00
1333bc54a2
vhdlpp: Support for 'left & 'right attributes.
2014-10-08 10:05:04 +02:00
fddb3ec129
vhdlpp: ForLoopStatement emits range boundaries expressions instead of evaluating them.
...
Unfortunately without evaluation it is not possible to warn against
degenerated loops, so it had to be removed.
2014-10-07 14:25:00 +02:00
fde6525acb
vhdlpp: Libraries are searched for subprograms during the ExpFunc elaboration.
2014-10-01 14:56:32 +02:00
194a950f8d
vhdlpp: Elaboration of ExpFunc parameters fallbacks to the types given in the Subprogram header.
2014-09-30 15:59:46 +02:00
9951521212
vhdlpp: Subprogram parameters are taken into account when distinguishing between function calls and vector elements.
2014-09-30 15:59:46 +02:00
9e856810b9
vhdlpp: Workaround to avoid translation of variables to wires in functions.
2014-09-30 15:59:45 +02:00
675b7d8efa
vhdlpp: Support for std_logic_vector return type in functions.
...
VHDL does not allow to specify the size of returned std_logic_vector,
whereas Verilog requires the size to be known in advance. The size of
the vector is determined by checking the type of expression used in the
return statement.
2014-09-30 15:58:26 +02:00
e352bea476
vhdlpp: Support for variable declarations in subprograms.
...
Fixes sorrymsg: "variable_declaration not supported."
2014-09-30 15:58:13 +02:00
747e656a0e
vhdlpp: Added ScopeBase::transfer_from() method.
2014-09-30 15:00:55 +02:00
7b5470c8a7
vhdlpp: Subprogram class inherits from ScopeBase.
2014-09-30 15:00:55 +02:00
f5dd2ac87e
vhdlpp: Aggregate expressions for records can be specified in any order.
2014-09-17 16:32:56 +02:00
94abef195a
vhdlpp: Commented out named assignment for records.
2014-09-17 16:30:44 +02:00
54696e0127
vhdlpp: Elaboration & emit support for aggregate initializer expressions in records.
2014-09-17 11:24:16 +02:00
9842035d89
vhdlpp: Simplified the initalization for signals/variables.
2014-09-16 16:31:18 +02:00
e330a0bd6e
vhdlpp: Corrected VTypeArray::write_to_stream().
...
Now it outputs "typedef(range)" instead of "array (range) of type".
2014-09-15 12:10:05 +02:00
cb03802a17
vhdlpp: Added VTypeArray::basic_type() to cope with
...
arrays based on typedefs.
2014-09-15 12:10:05 +02:00
22d18cb28d
vhdlpp: Typedefs in packages are emitted before constants.
2014-09-15 12:10:04 +02:00
c98c3e5d14
vhdlpp: Inlined a few functions.
2014-09-15 12:10:04 +02:00
a63289c2fc
vhdlpp: VTypeArray::range_t handles direction (to/downto).
2014-09-15 12:10:04 +02:00
251b75003f
vhdlpp: Skip writing '=>' for ExpAggregates if there are no fields specified.
2014-09-15 12:10:04 +02:00
01b4d49d4a
vhdlpp: Do not emit constants from packages.
...
They are elaborated and emitted by architectures that make use of packages.
2014-09-15 12:10:04 +02:00
f851fc6981
vhdlpp: Fixed ExpAggregate::write_to_stream().
2014-09-15 12:10:04 +02:00
a25cde3bc7
vhdlpp: Added ExpString::write_to_stream().
2014-09-15 12:10:04 +02:00
51b121ae7a
vhdlpp: Added ExpBitString::write_to_stream().
2014-09-15 12:10:04 +02:00
94caa4881e
vhdlpp: Added VTypeEnum::write_to_stream().
2014-09-15 12:10:04 +02:00
ef7ac5ed03
vhdlpp: Elaborate all types of initializing expressions.
2014-09-15 12:10:04 +02:00
684c2fe19e
Fixed enum typedefs.
2014-08-28 11:04:25 +02:00
0f728b9150
vhdlpp: Minor cleaning, fixed copyright notices.
2014-08-25 17:29:35 +02:00
b0c79d5d1c
vhdlpp: Added VType::emit_name() that skips emission of a name if it is empty (otherwise '\' is outputted).
2014-08-25 17:05:15 +02:00
150fe088a6
vhdlpp: VTypeRecord is marked as acceptable in packed arrays. VTypeDef is accepted depending on the base type.
2014-08-25 16:56:46 +02:00
bb66ed8b9d
vhdlpp: "integer" is emitted as "bool[31:0" but is marked as accepted to be used in packed arrays.
2014-08-25 16:51:35 +02:00
b1d15436fd
Removed ExpReal::evaluate().Its signature does not match the one meant to be overridden.
2014-08-22 16:55:47 +02:00
c846b2cf3f
vhdlpp: 'integer' is emitted as 'integer' instead of 'bool [31:0]'.
2014-08-22 16:45:17 +02:00
10446df80e
vhdlpp: Invert range in ExpAggregate when necessary.
2014-08-22 16:23:22 +02:00
0a2100c87f
vhdlpp: Turn on the reg_flag for types that cannot be packed.
2014-08-22 16:22:59 +02:00
27730395ca
vhdlpp: Type of an array is selected depending on the element type.
2014-08-22 10:49:55 +02:00
8e9c25a23e
vhdlpp: Added 'packed' property for VTypes.
...
It detetermines if a type can be used as the base type of a packed array.
2014-08-22 10:45:02 +02:00
Maciej Suminski
Stephen Williams
Cary R