Cary R
fb237fb006
Update the user visible copyright to be 2020
2020-05-31 13:41:38 -07:00
Larry Doolittle
77a01f65d0
Remove fixable unused-parameter warnings
...
I see other warnings within vhdlpp/lexor.cc caused by a flex bug
(see http://sourceforge.net/p/flex/bugs/115/ ), which I won't try to work around.
2014-01-30 15:34:08 -08:00
Cary R
f054500fe2
Fix space issues in tgt-blif
2013-08-06 17:09:37 -07:00
Stephen Williams
dddaacc6fd
Follow non-canonical bit numbering.
...
The signal bit numbering should be used for signals. This is
necessary for .model ports because the user specified numbers
are part of the interface, but once that is done, it is trivial
to follow it internally as well.
2013-08-01 17:28:03 -07:00
Stephen Williams
e0c9efd129
Implement blif support for constants and some logic/lpm gates.
...
This starts the handling of various logic gates.
2013-08-01 17:28:03 -07:00
Stephen Williams
d2034a6458
Initial BLIF code generator.
...
Add the -tblif code generator target, and include some basic
useful behavior.
2013-08-01 17:28:03 -07:00