From fde7cd8f10323e2ae106b3fcb34e2245165f0753 Mon Sep 17 00:00:00 2001
From: steve <steve>
Date: Fri, 24 May 2002 00:44:54 +0000
Subject: [PATCH]  Add support for $bits (SystemVerilog)

---
 README.txt   | 16 +++++++++++-----
 elab_expr.cc | 14 +++++++++++---
 2 files changed, 22 insertions(+), 8 deletions(-)

diff --git a/README.txt b/README.txt
index 229f20302..d2a0df9d1 100644
--- a/README.txt
+++ b/README.txt
@@ -311,18 +311,23 @@ constructs.
   - force to nets are not supported. Force to variables, and
     assign/deassign, are supported.
 
-5.1 Nonstandard Constructs
+5.1 Nonstandard Constructs or Behaviors
 
 Icarus Verilog includes some features that are not part of the
-IEEE1364 standard, but have well defined meaning. These are extensions
-to the language.
+IEEE1364 standard, but have well defined meaning, and also sometimes
+gives nonstandard (but extended) meanings to some features of the
+language that are defined.
 
     $sizeof(<expr>)
-	This system function returns the size in bits of the
+    $bits(<expr>)
+	The $bits system function returns the size in bits of the
 	expression that is its argument. The result of this
 	function is undefined if the argument doesn't have a
 	self-determined size.
 
+	The $sizeof function is deprecated in favor of $bits, which is
+	the same thing, but included in the SystemVerilog definition.
+
     Builtin system functions
 
 	Certain of the system functions have well defined meanings, so
@@ -330,9 +335,10 @@ to the language.
 	using runtime VPI code. Doing so means that VPI cannot
 	override the definitions of functions handled in this
 	manner. On the other hand, this makes them synthesizeable, and
-	also allows for more agressive constant propagation. The
+	also allows for more aggressive constant propagation. The
 	functions handled in this manner are:
 
+		$bits
 		$signed
 		$sizeof
 		$unsigned
diff --git a/elab_expr.cc b/elab_expr.cc
index ff12ee23f..6165865a5 100644
--- a/elab_expr.cc
+++ b/elab_expr.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: elab_expr.cc,v 1.59 2002/05/06 02:30:27 steve Exp $"
+#ident "$Id: elab_expr.cc,v 1.60 2002/05/24 00:44:54 steve Exp $"
 #endif
 
 # include "config.h"
@@ -186,14 +186,19 @@ NetExpr* PECallFunction::elaborate_sfunc_(Design*des, NetScope*scope) const
 	   the bit width of the sub-expression. The value of the
 	   sub-expression is not used, so the expression itself can be
 	   deleted. */
-      if (strcmp(path_.peek_name(0), "$sizeof") == 0) {
+      if ((strcmp(path_.peek_name(0), "$sizeof") == 0)
+	  || (strcmp(path_.peek_name(0), "$bits") == 0)) {
 	    if ((parms_.count() != 1) || (parms_[0] == 0)) {
-		  cerr << get_line() << ": error: The $sizeof() function "
+		  cerr << get_line() << ": error: The $bits() function "
 		       << "takes exactly one(1) argument." << endl;
 		  des->errors += 1;
 		  return 0;
 	    }
 
+	    if (strcmp(path_.peek_name(0), "$sizeof") == 0)
+		  cerr << get_line() << ": warning: $sizeof is deprecated."
+		       << " Use $bits() instead." << endl;
+
 	    PExpr*expr = parms_[0];
 	    NetExpr*sub = expr->elaborate_expr(des, scope, true);
 	    verinum val (sub->expr_width(), sizeof(unsigned));
@@ -864,6 +869,9 @@ NetExpr* PEUnary::elaborate_expr(Design*des, NetScope*scope, bool) const
 
 /*
  * $Log: elab_expr.cc,v $
+ * Revision 1.60  2002/05/24 00:44:54  steve
+ *  Add support for $bits (SystemVerilog)
+ *
  * Revision 1.59  2002/05/06 02:30:27  steve
  *  Allow parameters in concatenation of widths are defined.
  *