From f82c6c7b3ada873015348f728aa3087cdb6661a6 Mon Sep 17 00:00:00 2001 From: Cary R Date: Tue, 1 Jul 2025 00:00:53 -0700 Subject: [PATCH] Add missing gold and fix VHDL inout test --- ivtest/gold/br_gh1222.gold | 7 +++++++ ivtest/ivltests/vhdl_inout.v | 5 +++-- 2 files changed, 10 insertions(+), 2 deletions(-) create mode 100644 ivtest/gold/br_gh1222.gold diff --git a/ivtest/gold/br_gh1222.gold b/ivtest/gold/br_gh1222.gold new file mode 100644 index 000000000..3bd179e7d --- /dev/null +++ b/ivtest/gold/br_gh1222.gold @@ -0,0 +1,7 @@ +./ivltests/br_gh1222.v:6: error: variable rout_ca1; cannot be driven by a primitive or continuous assignment with non-default strength. +./ivltests/br_gh1222.v:6: error: variable rout_ca2; cannot be driven by a primitive or continuous assignment with non-default strength. +./ivltests/br_gh1222.v:7: error: variable lout_ca1; cannot be driven by a primitive or continuous assignment with non-default strength. +./ivltests/br_gh1222.v:7: error: variable lout_ca2; cannot be driven by a primitive or continuous assignment with non-default strength. +./ivltests/br_gh1222.v:12: error: variable rout_gt; cannot be driven by a primitive or continuous assignment with non-default strength. +./ivltests/br_gh1222.v:13: error: variable lout_gt; cannot be driven by a primitive or continuous assignment with non-default strength. +10 error(s) during elaboration. diff --git a/ivtest/ivltests/vhdl_inout.v b/ivtest/ivltests/vhdl_inout.v index 3ce0dce66..93567ec00 100644 --- a/ivtest/ivltests/vhdl_inout.v +++ b/ivtest/ivltests/vhdl_inout.v @@ -1,4 +1,4 @@ -// Copyright (c) 2015 CERN +// Copyright (c) 2015-2025 CERN // @author Maciej Suminski // // This source code is free software; you can redistribute it @@ -20,7 +20,8 @@ // Test for port inout mode. module vhdl_inout_test; -logic a, b, c; +wire a; // An inout port cannot connect to a variable, so make it a wire. +logic b, c; vhdl_inout dut(a, b, c); initial begin