From f50cc35d2fa4849cbe79860c5a3574234d03d632 Mon Sep 17 00:00:00 2001 From: Cary R Date: Mon, 4 Sep 2023 14:14:45 -0700 Subject: [PATCH] Fix space issues --- ivtest/ivltests/sdf_interconnect4.sdf | 6 +++--- ivtest/ivltests/sdf_interconnect4.v | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/ivtest/ivltests/sdf_interconnect4.sdf b/ivtest/ivltests/sdf_interconnect4.sdf index ee4a6f244..6c6959836 100644 --- a/ivtest/ivltests/sdf_interconnect4.sdf +++ b/ivtest/ivltests/sdf_interconnect4.sdf @@ -13,7 +13,7 @@ (CELL (CELLTYPE "my_design") - (INSTANCE) + (INSTANCE) (DELAY (ABSOLUTE (INTERCONNECT a[0] buffer0.in (0.000:0.020:0.000) (0.000:0.020:0.000)) @@ -35,7 +35,7 @@ ) ) ) - + (CELL (CELLTYPE "buffer") (INSTANCE buffer1) @@ -45,7 +45,7 @@ ) ) ) - + (CELL (CELLTYPE "buffer") (INSTANCE buffer2) diff --git a/ivtest/ivltests/sdf_interconnect4.v b/ivtest/ivltests/sdf_interconnect4.v index b944ec719..918a34a98 100644 --- a/ivtest/ivltests/sdf_interconnect4.v +++ b/ivtest/ivltests/sdf_interconnect4.v @@ -45,10 +45,10 @@ module top; $sdf_annotate("ivltests/sdf_interconnect4.sdf", my_design_inst); $monitor("time=%0t a=%b b=%b", $realtime, a, b); end - + reg [2:0] a; wire [2:0] b; - + initial begin #5; a <= 3'b000; @@ -57,7 +57,7 @@ module top; #10; $finish; end - + my_design my_design_inst ( .a (a), .b (b)