From ed3e67926f15d6232db140a53f583682df7e0a24 Mon Sep 17 00:00:00 2001
From: Maciej Suminski <maciej.suminski@cern.ch>
Date: Wed, 15 Jun 2016 17:19:27 +0200
Subject: [PATCH] vhdlpp: Evaluate conditional signal assignments upon
 simulation start.

---
 vhdlpp/architec_emit.cc | 30 ++++++++++++++++--------------
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/vhdlpp/architec_emit.cc b/vhdlpp/architec_emit.cc
index 46695543e..0c72d3bd3 100644
--- a/vhdlpp/architec_emit.cc
+++ b/vhdlpp/architec_emit.cc
@@ -152,22 +152,9 @@ int CondSignalAssignment::emit(ostream&out, Entity*ent, Architecture*arc)
     int errors = 0;
 
     out << "// " << get_fileline() << endl;
-    out << "always @(";
-
+    out << "always begin" << endl;
     bool first = true;
-    for(list<const ExpName*>::const_iterator it = sens_list_.begin();
-            it != sens_list_.end(); ++it) {
-        if(first)
-            first = false;
-        else
-            out << ",";
 
-        errors += (*it)->emit(out, ent, arc);
-    }
-
-    out << ") begin" << endl;
-
-    first = true;
     for(list<ExpConditional::case_t*>::iterator it = options_.begin();
             it != options_.end(); ++it) {
         ExpConditional::case_t*cas = *it;
@@ -192,6 +179,21 @@ int CondSignalAssignment::emit(ostream&out, Entity*ent, Architecture*arc)
         out << ";" << endl;
     }
 
+    // Sensitivity list
+    first = true;
+    out << "@(";
+
+    for(list<const ExpName*>::const_iterator it = sens_list_.begin();
+            it != sens_list_.end(); ++it) {
+        if(first)
+            first = false;
+        else
+            out << ",";
+
+        errors += (*it)->emit(out, ent, arc);
+    }
+
+    out << ");" << endl;
     out << "end" << endl;
 
     return errors;