From ec0e718151824a096c0d14d2a52619c2c7dbdfcc Mon Sep 17 00:00:00 2001
From: Cary R <cygcary@yahoo.com>
Date: Tue, 18 Nov 2008 12:59:07 -0800
Subject: [PATCH] VHDL: make casez support 'x' and handle a full don't care
 case.

The VHDL converter erroneously treated a casez and casex exactly
the same. In reality a casez compares a 'x' value (it is not a
don't care). It also adds support for a full don't care case by
just returning True for the condition.
---
 tgt-vhdl/stmt.cc | 42 ++++++++++++++++++++++++------------------
 1 file changed, 24 insertions(+), 18 deletions(-)

diff --git a/tgt-vhdl/stmt.cc b/tgt-vhdl/stmt.cc
index 0e86ebf6c..c319abb34 100644
--- a/tgt-vhdl/stmt.cc
+++ b/tgt-vhdl/stmt.cc
@@ -608,30 +608,36 @@ int draw_casezx(vhdl_procedural *proc, stmt_container *container,
 
          vhdl_binop_expr *all =
             new vhdl_binop_expr(VHDL_BINOP_AND, vhdl_type::boolean());
+         bool just_dont_care = true;
          for (unsigned i = 0; i < ivl_expr_width(net); i++) {
             switch (bits[i]) {
+            case 'x':
+               if (ivl_statement_type(stmt) == IVL_ST_CASEZ) break;
             case '?':
             case 'z':
-            case 'x':
                // Ignore it
-               break;
-            default:
-               {
-                  // Generate a comparison for this bit position
-                  vhdl_binop_expr *cmp =
-                     new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean());
-
-                  vhdl_type *type = vhdl_type::nunsigned(ivl_expr_width(net));
-                  vhdl_var_ref *lhs =
-                     new vhdl_var_ref(test->get_name().c_str(), type);
-                  lhs->set_slice(new vhdl_const_int(i));
-
-                  cmp->add_expr(lhs);
-                  cmp->add_expr(new vhdl_const_bit(bits[i]));
-
-                  all->add_expr(cmp);
-               }
+               continue;
             }
+
+            // Generate a comparison for this bit position
+            vhdl_binop_expr *cmp =
+               new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean());
+
+            vhdl_type *type = vhdl_type::nunsigned(ivl_expr_width(net));
+            vhdl_var_ref *lhs =
+               new vhdl_var_ref(test->get_name().c_str(), type);
+            lhs->set_slice(new vhdl_const_int(i));
+
+            cmp->add_expr(lhs);
+            cmp->add_expr(new vhdl_const_bit(bits[i]));
+
+            all->add_expr(cmp);
+            just_dont_care = false;
+         }
+
+         // If there are no bits comparisons then just put a True
+         if (just_dont_care) {
+            all->add_expr(new vhdl_const_bool(true));
          }
 
          if (result)