From e66fbc9bf97220e418675b01a3dd98861a80a20a Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Sat, 26 Sep 2020 13:24:01 -0700 Subject: [PATCH] Prepare for Version 11.0 --- scripts/MAKE_RELEASE.sh | 12 ++++++------ verilog.spec | 13 +++---------- version_base.h | 2 +- 3 files changed, 10 insertions(+), 17 deletions(-) diff --git a/scripts/MAKE_RELEASE.sh b/scripts/MAKE_RELEASE.sh index 939b3473f..4204217c5 100644 --- a/scripts/MAKE_RELEASE.sh +++ b/scripts/MAKE_RELEASE.sh @@ -4,13 +4,13 @@ # the number for a snapshot and the path to a temporary directory. # for example: # -# sh scripts/MAKE_RELEASE.sh 10.1 ~/tmp +# sh scripts/MAKE_RELEASE.sh 11.0 ~/tmp # -# The above assumes that there is a tag "v0_9_1" at the point +# The above assumes that there is a tag "v11_0" at the point # to be released. (The tag has the "v", but the argument to this # script does not have the "v"). This script extracts based on the # tag, uses the temporary directory to stage intermediate results, -# and finally creates a file called verilog-0.9.1.tar.gz that +# and finally creates a file called verilog-11.0.tar.gz that # contains the release ready to go. # # The complete steps to make a release x.y generally are: @@ -19,11 +19,11 @@ # # Edit verilog.spec to suit. # -# git tag -a v10_1 +# git tag -a v11_0 # (Make the tag in the local git repository.) # -# sh scripts/MAKE_RELEASE.sh 10.1 ~/tmp -# (Make the snapshot bundle verilog-10.1.tar.gz) +# sh scripts/MAKE_RELEASE.sh 11.0 ~/tmp +# (Make the snapshot bundle verilog-11.0.tar.gz) # # git push --tags # (Publish the tag to the repository.) diff --git a/verilog.spec b/verilog.spec index 97a0e3c1a..db58fe9ab 100644 --- a/verilog.spec +++ b/verilog.spec @@ -1,6 +1,5 @@ #norootforbuild # -%define rev_date 20150815 # Normally, the suff-ix is %nil, meaning the suffix is to not be used. # But if the builder wants to make a suffixed package, he may set this # to a value (i.e. -test) to cause suffixes to be put in all the right @@ -10,11 +9,11 @@ # Summary: Icarus Verilog Name: verilog%{suff} -Version: 11.0.%{rev_date} +Version: 11.0 Release: 0 License: GPL Group: Productivity/Scientific/Electronics -Source: verilog%{suff}-%{rev_date}.tar.gz +Source: verilog%{suff}-%{version}.tar.gz URL: http://www.icarus.com/eda/verilog/index.html Packager: Stephen Williams @@ -32,7 +31,7 @@ engineering formats, including simulation. It strives to be true to the IEEE-1364 standard. %prep -%setup -n verilog%{suff}-%{rev_date} +%setup -n verilog%{suff}-%{version} %build if test X%{suff} != X @@ -92,17 +91,11 @@ rm -rf $RPM_BUILD_ROOT %attr(-,root,root) %{_libdir}/ivl%{suff}/pcb.tgt %attr(-,root,root) %{_libdir}/ivl%{suff}/pcb.conf %attr(-,root,root) %{_libdir}/ivl%{suff}/pcb-s.conf -%attr(-,root,root) %{_libdir}/ivl%{suff}/system.sft %attr(-,root,root) %{_libdir}/ivl%{suff}/system.vpi -%attr(-,root,root) %{_libdir}/ivl%{suff}/va_math.sft %attr(-,root,root) %{_libdir}/ivl%{suff}/va_math.vpi -%attr(-,root,root) %{_libdir}/ivl%{suff}/v2005_math.sft %attr(-,root,root) %{_libdir}/ivl%{suff}/v2005_math.vpi -%attr(-,root,root) %{_libdir}/ivl%{suff}/v2009.sft %attr(-,root,root) %{_libdir}/ivl%{suff}/v2009.vpi -%attr(-,root,root) %{_libdir}/ivl%{suff}/vhdl_sys.sft %attr(-,root,root) %{_libdir}/ivl%{suff}/vhdl_sys.vpi -%attr(-,root,root) %{_libdir}/ivl%{suff}/vhdl_textio.sft %attr(-,root,root) %{_libdir}/ivl%{suff}/vhdl_textio.vpi %attr(-,root,root) %{_libdir}/ivl%{suff}/vpi_debug.vpi %attr(-,root,root) %{_libdir}/ivl%{suff}/cadpli.vpl diff --git a/version_base.h b/version_base.h index 39a3fa0b9..ef9241ce9 100644 --- a/version_base.h +++ b/version_base.h @@ -10,7 +10,7 @@ * This will be appended to the version. Use this to mark development * versions and the like. */ -# define VERSION_EXTRA " (devel)" +# define VERSION_EXTRA "" # define VERSION_STRINGIFY(x) #x # define VERSION_STR(a,b,extra) VERSION_STRINGIFY(a.b) extra