diff --git a/vhdlpp/architec_elaborate.cc b/vhdlpp/architec_elaborate.cc
index 6533ee465..e44563681 100644
--- a/vhdlpp/architec_elaborate.cc
+++ b/vhdlpp/architec_elaborate.cc
@@ -66,6 +66,9 @@ int ComponentInstantiation::elaborate(Entity*ent, Architecture*arc)
 		  continue;
 	    }
 
+        ExpName* tmp;
+        if (cur->second && (tmp = dynamic_cast<ExpName*>(cur->second)))
+            errors += tmp->elaborate_rval(ent, arc);
 	      /* It is possible for the port to be explicitly
 		 unconnected. In that case, the Expression will be nil */
 	    if (cur->second)
diff --git a/vhdlpp/expression.h b/vhdlpp/expression.h
index fdec70340..57f06e9d3 100644
--- a/vhdlpp/expression.h
+++ b/vhdlpp/expression.h
@@ -322,6 +322,7 @@ class ExpName : public Expression {
 
     public: // Base methods
       int elaborate_lval(Entity*ent, Architecture*arc, bool);
+      int elaborate_rval(Entity*ent, Architecture*arc);
       const VType* probe_type(Entity*ent, Architecture*arc) const;
       int elaborate_expr(Entity*ent, Architecture*arc, const VType*ltype);
       int emit(ostream&out, Entity*ent, Architecture*arc);
diff --git a/vhdlpp/expression_elaborate.cc b/vhdlpp/expression_elaborate.cc
index e2c93374c..84b8e16dd 100644
--- a/vhdlpp/expression_elaborate.cc
+++ b/vhdlpp/expression_elaborate.cc
@@ -71,6 +71,25 @@ int ExpName::elaborate_lval(Entity*ent, Architecture*arc, bool is_sequ)
       return errors;
 }
 
+int ExpName::elaborate_rval(Entity*ent, Architecture*arc)
+{
+      int errors = 0;
+
+      if (const InterfacePort*cur = ent->find_port(name_)) {
+	      /* OK */
+
+      } else if (Signal* fs = arc->find_signal(name_)) {
+	      /* OK */
+
+      } else {
+            cerr << get_fileline() << ": error: No port or signal " << name_
+		 << " to be used as r-value." << endl;
+            errors += 1;
+      }
+
+      return errors;
+}
+
 int ExpNameALL::elaborate_lval(Entity*ent, Architecture*arc, bool is_sequ)
 {
       return Expression::elaborate_lval(ent, arc, is_sequ);