From d8351ec1b2fe25d701049d268b47b4b7fcbc3bd1 Mon Sep 17 00:00:00 2001
From: Nick Gasson <nick@nickg.me.uk>
Date: Sun, 20 Jul 2008 15:13:20 +0100
Subject: [PATCH] Fix reduction OR in procedural code

---
 tgt-vhdl/expr.cc | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tgt-vhdl/expr.cc b/tgt-vhdl/expr.cc
index 4f420a3a0..8582c7eeb 100644
--- a/tgt-vhdl/expr.cc
+++ b/tgt-vhdl/expr.cc
@@ -137,7 +137,9 @@ static vhdl_expr *translate_unary(ivl_expr_t e)
          vhdl_fcall *f =
             new vhdl_fcall(support_function::function_name(SF_REDUCE_OR),
                            vhdl_type::std_logic());
-         f->add_expr(operand);
+
+         vhdl_type std_logic_vector(VHDL_TYPE_STD_LOGIC_VECTOR);
+         f->add_expr(operand->cast(&std_logic_vector));
          if ('N' == opcode)
             return new vhdl_unaryop_expr(VHDL_UNARYOP_NOT, f, vhdl_type::std_logic());
          else