diff --git a/vvp/opcodes.txt b/vvp/opcodes.txt
index 8716a4bab..6189b38b8 100644
--- a/vvp/opcodes.txt
+++ b/vvp/opcodes.txt
@@ -284,6 +284,10 @@ variable. This is similar to %set, but it uses the cassign port
 signal responds differently. See "VARIABLE STATEMENTS" in the
 README.txt file.
 
+The %cassign/vec4/off instruction will check the flags[4] flag, and if
+it is 1, it will suppress the assignment. This is so that failed index
+calculations can report the failure by setting the flag.
+
 * %cassign/wr <var-label>
 
 Perform a continuous assign of a constant real value to the target
@@ -582,6 +586,10 @@ part comes from the width of the popped value, and the <off> is an
 index register that contains the cannonical offset where the value
 sets written.
 
+The %foce/vec4/off instruction will test the value if flags[4], and if
+it is 1, will suppress the actual assignment. This is intended to help
+with detection of invalid index expressions.
+
 * %force/wr <var-label>
 
 Force a constant real value to the target variable. See %force/v
diff --git a/vvp/vthread.cc b/vvp/vthread.cc
index 5648d54ee..1e8aef1d1 100644
--- a/vvp/vthread.cc
+++ b/vvp/vthread.cc
@@ -1719,6 +1719,9 @@ bool of_CASSIGN_VEC4_OFF(vthread_t thr, vvp_code_t cp)
       vvp_vector4_t value = thr->pop_vec4();
       unsigned wid = value.size();
 
+      if (thr->flags[4] == BIT4_1)
+	    return true;
+
       vvp_signal_value*sig = dynamic_cast<vvp_signal_value*> (net->fil);
       assert(sig);
 
@@ -3059,6 +3062,9 @@ bool of_FORCE_VEC4_OFF(vthread_t thr, vvp_code_t cp)
 
       assert(net->fil);
 
+      if (thr->flags[4] == BIT4_1)
+	    return true;
+
 	// This is the width of the target vector.
       unsigned use_size = net->fil->filter_size();