diff --git a/compiler.h b/compiler.h index 47f6cc6a8..014603578 100644 --- a/compiler.h +++ b/compiler.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: compiler.h,v 1.14 2003/01/30 16:23:07 steve Exp $" +#ident "$Id: compiler.h,v 1.15 2003/02/22 04:12:49 steve Exp $" #endif # include @@ -72,6 +72,9 @@ extern bool error_implicit; /* inherit timescales across files. */ extern bool warn_timescale; +/* Warn about legal but questionable module port bindings. */ +extern bool warn_portbinding; + /* This is true if verbose output is requested. */ extern bool verbose_flag; @@ -95,6 +98,9 @@ extern char*ivlpp_string; /* * $Log: compiler.h,v $ + * Revision 1.15 2003/02/22 04:12:49 steve + * Add the portbind warning. + * * Revision 1.14 2003/01/30 16:23:07 steve * Spelling fixes. * diff --git a/driver/iverilog.man b/driver/iverilog.man index de077b171..2aadba208 100644 --- a/driver/iverilog.man +++ b/driver/iverilog.man @@ -1,4 +1,4 @@ -.TH iverilog 1 "$Date: 2002/06/23 20:10:51 $" Version "$Date: 2002/06/23 20:10:51 $" +.TH iverilog 1 "$Date: 2003/02/22 04:12:49 $" Version "$Date: 2003/02/22 04:12:49 $" .SH NAME iverilog - Icarus Verilog compiler @@ -200,6 +200,12 @@ This enables warnings for creation of implicit declarations. For example, if a scalar wire X is used but not declared in the Verilog source, this will print a warning at its first use. +.TP 8 +.B portbind +This enables warnings for ports of module instantiations that are not +connected but probably should be. Dangling input ports, for example, +will generate a warning. + .TP 8 .B timescale This enables warnings for inconsistent use of the timescale diff --git a/driver/main.c b/driver/main.c index 7f35cf183..cb015ec5a 100644 --- a/driver/main.c +++ b/driver/main.c @@ -16,7 +16,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ -#ident "$Id: main.c,v 1.50 2003/01/10 19:01:04 steve Exp $" +#ident "$Id: main.c,v 1.51 2003/02/22 04:12:49 steve Exp $" # include "config.h" @@ -251,11 +251,14 @@ static void process_warning_switch(const char*name) strcpy(warning_flags, "-W"); if (strcmp(name,"all") == 0) { - strcat(warning_flags, "it"); + strcat(warning_flags, "ipt"); } else if (strcmp(name,"implicit") == 0) { if (! strchr(warning_flags+2, 'i')) strcat(warning_flags, "i"); + } else if (strcmp(name,"portbind") == 0) { + if (! strchr(warning_flags+2, 'p')) + strcat(warning_flags, "i"); } else if (strcmp(name,"timescale") == 0) { if (! strchr(warning_flags+2, 't')) strcat(warning_flags, "t"); @@ -265,6 +268,12 @@ static void process_warning_switch(const char*name) cp[0] = cp[1]; cp += 1; } + } else if (strcmp(name,"no-portbind") == 0) { + char*cp = strchr(warning_flags+2, 'p'); + if (cp) while (*cp) { + cp[0] = cp[1]; + cp += 1; + } } else if (strcmp(name,"no-timescale") == 0) { char*cp = strchr(warning_flags+2, 't'); if (cp) while (*cp) { @@ -688,6 +697,9 @@ int main(int argc, char **argv) /* * $Log: main.c,v $ + * Revision 1.51 2003/02/22 04:12:49 steve + * Add the portbind warning. + * * Revision 1.50 2003/01/10 19:01:04 steve * Only use libiberty.h if available. * diff --git a/elaborate.cc b/elaborate.cc index 0a5cfd302..947f36a23 100644 --- a/elaborate.cc +++ b/elaborate.cc @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: elaborate.cc,v 1.273 2003/02/08 19:49:21 steve Exp $" +#ident "$Id: elaborate.cc,v 1.274 2003/02/22 04:12:49 steve Exp $" #endif # include "config.h" @@ -579,8 +579,36 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const // Skip unconnected module ports. This happens when a // null parameter is passed in. - if ((*pins)[idx] == 0) + + if ((*pins)[idx] == 0) { + + // While we're here, look to see if this + // unconnected (from the outside) port is an + // input. If so, consider printing a port binding + // warning. + if (warn_portbinding) { + svector mport = rmod->get_port(idx); + if (mport.count() == 0) + continue; + + NetNet*tmp = des->find_signal(my_scope, + mport[0]->path()); + assert(tmp); + + if (tmp->port_type() == NetNet::PINPUT) { + cerr << get_line() << ": warning: " + << "Instantiating module " + << rmod->mod_name() + << " with dangling input port " + << rmod->ports[idx]->name + << "." << endl; + } + } + continue; + } + + // Inside the module, the port is zero or more signals // that were already elaborated. List all those signals @@ -2474,6 +2502,9 @@ Design* elaborate(listroots) /* * $Log: elaborate.cc,v $ + * Revision 1.274 2003/02/22 04:12:49 steve + * Add the portbind warning. + * * Revision 1.273 2003/02/08 19:49:21 steve * Calculate delay statement delays using elaborated * expressions instead of pre-elaborated expression diff --git a/main.cc b/main.cc index 7a160fabb..b9a9601dd 100644 --- a/main.cc +++ b/main.cc @@ -19,7 +19,7 @@ const char COPYRIGHT[] = * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: main.cc,v 1.64 2002/08/18 22:06:29 steve Exp $" +#ident "$Id: main.cc,v 1.65 2003/02/22 04:12:49 steve Exp $" #endif # include "config.h" @@ -90,6 +90,7 @@ FILE *depend_file = NULL; */ bool warn_implicit = false; bool warn_timescale = false; +bool warn_portbinding = false; bool error_implicit = false; @@ -421,6 +422,9 @@ int main(int argc, char*argv[]) case 'i': warn_implicit = true; break; + case 'p': + warn_portbinding = true; + break; case 't': warn_timescale = true; break; @@ -605,6 +609,9 @@ int main(int argc, char*argv[]) /* * $Log: main.cc,v $ + * Revision 1.65 2003/02/22 04:12:49 steve + * Add the portbind warning. + * * Revision 1.64 2002/08/18 22:06:29 steve * Terminate if the functors signal errors. *