diff --git a/vvp/compile.cc b/vvp/compile.cc index 7f9dbed43..71f5a6fa9 100644 --- a/vvp/compile.cc +++ b/vvp/compile.cc @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: compile.cc,v 1.186 2005/02/12 03:27:18 steve Exp $" +#ident "$Id: compile.cc,v 1.187 2005/02/14 01:50:23 steve Exp $" #endif # include "arith.h" @@ -148,8 +148,8 @@ const static struct opcode_table_s opcode_table[] = { { "%set/m", of_SET_MEM,2, {OA_MEM_PTR, OA_BIT1, OA_NONE} }, { "%set/v", of_SET_VEC,3, {OA_FUNC_PTR, OA_BIT1, OA_BIT2} }, { "%set/wr", of_SET_WORDR,2,{OA_VPI_PTR, OA_BIT1, OA_NONE} }, - { "%set/x0", of_SET_X0, 3, {OA_FUNC_PTR, OA_BIT1, OA_BIT2} }, - { "%set/x0/x",of_SET_X0_X,3,{OA_FUNC_PTR, OA_BIT1, OA_BIT2} }, + { "%set/x0", of_SET_X0, 2, {OA_FUNC_PTR, OA_BIT1, OA_NONE} }, +// { "%set/x0/x",of_SET_X0_X,3,{OA_FUNC_PTR, OA_BIT1, OA_BIT2} }, { "%shiftl/i0", of_SHIFTL_I0, 2, {OA_BIT1,OA_NUMBER, OA_NONE} }, { "%shiftr/i0", of_SHIFTR_I0, 2, {OA_BIT1,OA_NUMBER, OA_NONE} }, { "%shiftr/s/i0", of_SHIFTR_S_I0,2,{OA_BIT1,OA_NUMBER, OA_NONE} }, @@ -1618,6 +1618,11 @@ void compile_param_string(char*label, char*name, char*str, char*value) /* * $Log: compile.cc,v $ + * Revision 1.187 2005/02/14 01:50:23 steve + * Signals may receive part vectors from %set/x0 + * instructions. Re-implement the %set/x0 to do + * just that. Remove the useless %set/x0/x instruction. + * * Revision 1.186 2005/02/12 03:27:18 steve * Support C8 constants. * diff --git a/vvp/opcodes.txt b/vvp/opcodes.txt index e43eb1ac0..59f5419ad 100644 --- a/vvp/opcodes.txt +++ b/vvp/opcodes.txt @@ -1,7 +1,7 @@ /* * Copyright (c) 2001-2003 Stephen Williams (steve@icarus.com) * - * $Id: opcodes.txt,v 1.59 2005/01/22 00:58:22 steve Exp $ + * $Id: opcodes.txt,v 1.60 2005/02/14 01:50:23 steve Exp $ */ @@ -520,22 +520,18 @@ sets only a single bit. This instruction writes a real word to the specified VPI-like object. -* %set/x0 , , -* %set/x0/x , , +* %set/x0 , -This sets the bit of a variable functor, the address calculated by -using the index register 0 to index the functor address of -. +This sets the bit of a signal vector, the address calculated by +using the index register 0 to index the bit within the vector of +. The destination must be a signal of some sort. Otherwise, +the instrution will fail. If the index value in index register is <0 (for example if %ix/get converted an unknown value into the register) then the set is not -performed. Also, if the index value is > the immediate top value, then -the set is not performed. The 0 and values suffice to provide -complete bounds checking. - -The %set/x0/x instruction is the same, except the bound value is in -a word register instead of in the opcode. This allows for bounds that -are larger then 0xffff. +performed. Also, if the index value is beyond the width of the target +signal, then the set is not performed. The instruction gets the +dimensions of the target signal from the signal itself. * %shiftl/i0 , diff --git a/vvp/vthread.cc b/vvp/vthread.cc index 5abb7f9e3..8cde85e6e 100644 --- a/vvp/vthread.cc +++ b/vvp/vthread.cc @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: vthread.cc,v 1.128 2005/02/12 06:13:22 steve Exp $" +#ident "$Id: vthread.cc,v 1.129 2005/02/14 01:50:23 steve Exp $" #endif # include "config.h" @@ -2657,64 +2657,39 @@ bool of_SET_WORDR(vthread_t thr, vvp_code_t cp) /* * Implement the %set/x instruction: * - * %set/x , , + * %set/x , * * The single bit goes into the indexed functor. Abort the instruction - * if the index is <0. + * if the index is outside the target vector dimensions. Get the + * target vector dimensions from the vvp_fun_signal addressed by the + * vvp_net pointer. */ bool of_SET_X0(vthread_t thr, vvp_code_t cp) { - unsigned char bit_val = thr_get_bit(thr, cp->bit_idx[0]); + vvp_net_t*net = cp->net; + vvp_bit4_t bit_val = thr_get_bit(thr, cp->bit_idx[0]); + + // Implicitly, we get the base into the target vector from the + // X0 register. long idx = thr->words[0].w_int; + vvp_fun_signal*sig = dynamic_cast (net->fun); + /* If idx < 0, then the index value is probably generated from an undefined value. At any rate, this is defined to have no effect so quit now. */ if (idx < 0) return true; - if ((unsigned)idx > cp->bit_idx[1]) + if ((unsigned)idx >= sig->size()) return true; -#if 0 - /* Form the functor pointer from the base pointer and the - index from the index register. */ - vvp_ipoint_t itmp = ipoint_index(cp->iptr, idx); + // Make a 1-bit vector that will go to the target + vvp_vector4_t bit (1); + bit.set_bit(0, bit_val); - /* Set the value. */ - functor_set(itmp, bit_val, strong_values[bit_val], true); -#else - fprintf(stderr, "XXXX forgot how to implement %%set/x0\n"); -#endif - - return true; -} - -bool of_SET_X0_X(vthread_t thr, vvp_code_t cp) -{ - unsigned char bit_val = thr_get_bit(thr, cp->bit_idx[0]); - long idx = thr->words[0].w_int; - long lim = thr->words[cp->bit_idx[1]].w_int; - - /* If idx < 0, then the index value is probably generated from - an undefined value. At any rate, this is defined to have no - effect so quit now. */ - if (idx < 0) - return true; - - if (idx > lim) - return true; - -#if 0 - /* Form the functor pointer from the base pointer and the - index from the index register. */ - vvp_ipoint_t itmp = ipoint_index(cp->iptr, idx); - - /* Set the value. */ - functor_set(itmp, bit_val, strong_values[bit_val], true); -#else - fprintf(stderr, "XXXX forgot how to implement %%set/x0/x\n"); -#endif + vvp_net_ptr_t ptr (net, 0); + vvp_send_vec4_pv(ptr, bit, idx, 1, sig->size()); return true; } @@ -3067,6 +3042,11 @@ bool of_JOIN_UFUNC(vthread_t thr, vvp_code_t cp) /* * $Log: vthread.cc,v $ + * Revision 1.129 2005/02/14 01:50:23 steve + * Signals may receive part vectors from %set/x0 + * instructions. Re-implement the %set/x0 to do + * just that. Remove the useless %set/x0/x instruction. + * * Revision 1.128 2005/02/12 06:13:22 steve * Add debug dumps for vectors, and fix vvp_scaler_t make from BIT4_X values. * diff --git a/vvp/vvp_net.cc b/vvp/vvp_net.cc index b0f97543a..899cba17a 100644 --- a/vvp/vvp_net.cc +++ b/vvp/vvp_net.cc @@ -16,7 +16,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ -#ident "$Id: vvp_net.cc,v 1.16 2005/02/12 06:13:22 steve Exp $" +#ident "$Id: vvp_net.cc,v 1.17 2005/02/14 01:50:23 steve Exp $" # include "vvp_net.h" # include @@ -607,6 +607,7 @@ void vvp_net_fun_t::recv_long(vvp_net_ptr_t, long) /* **** vvp_fun_signal methods **** */ vvp_fun_signal::vvp_fun_signal(unsigned wid) +: bits4_(wid) { vpi_callbacks = 0; continuous_assign_active_ = false; @@ -657,6 +658,31 @@ void vvp_fun_signal::recv_vec4(vvp_net_ptr_t ptr, vvp_vector4_t bit) } } +void vvp_fun_signal::recv_vec4_pv(vvp_net_ptr_t ptr, vvp_vector4_t bit, + unsigned base, unsigned wid, unsigned vwid) +{ + assert(bit.size() == wid); + assert(bits4_.size() == vwid); + + switch (ptr.port()) { + case 0: // Normal input + if (! continuous_assign_active_) { + for (unsigned idx = 0 ; idx < wid ; idx += 1) { + if (base+idx >= bits4_.size()) + break; + bits4_.set_bit(base+idx, bit.value(idx)); + } + vvp_send_vec4(ptr.ptr()->out, bits4_); + run_vpi_callbacks(); + } + break; + + default: + assert(0); + break; + } +} + void vvp_fun_signal::recv_vec8(vvp_net_ptr_t ptr, vvp_vector8_t bit) { // Only port-0 supports vector8_t inputs. @@ -1098,6 +1124,11 @@ vvp_bit4_t compare_gtge_signed(const vvp_vector4_t&a, /* * $Log: vvp_net.cc,v $ + * Revision 1.17 2005/02/14 01:50:23 steve + * Signals may receive part vectors from %set/x0 + * instructions. Re-implement the %set/x0 to do + * just that. Remove the useless %set/x0/x instruction. + * * Revision 1.16 2005/02/12 06:13:22 steve * Add debug dumps for vectors, and fix vvp_scaler_t make from BIT4_X values. * diff --git a/vvp/vvp_net.h b/vvp/vvp_net.h index 31d22b6fb..af4918790 100644 --- a/vvp/vvp_net.h +++ b/vvp/vvp_net.h @@ -18,7 +18,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ -#ident "$Id: vvp_net.h,v 1.16 2005/02/13 05:26:30 steve Exp $" +#ident "$Id: vvp_net.h,v 1.17 2005/02/14 01:50:23 steve Exp $" # include # include @@ -338,7 +338,23 @@ extern void vvp_send_real(vvp_net_ptr_t ptr, double val); extern void vvp_send_long(vvp_net_ptr_t ptr, long val); /* - * Part-vector versions of above functions. + * Part-vector versions of above functions. This function uses the + * corresponding recv_vec4_pv method in the vvp_net_fun_t functor to + * deliver parts of a vector. + * + * The ptr is the destination input port to write to. + * + * is the vector to be written. The width of this vector must + * exactly match the vector. + * + * The is where in the receiver the bit vector is to be + * written. This address is given in cannonical units; 0 is the LSB, 1 + * is the next bit, and so on. + * + * The is the width of the destination vector that this part is + * part of. This is used by intermediate nodes, i.e. resolvers, to + * know how wide to pad with Z, if it needs to transform the part to a + * mirror of the destination vector. */ extern void vvp_send_vec4_pv(vvp_net_ptr_t ptr, vvp_vector4_t val, unsigned base, unsigned wid, unsigned vwid); @@ -548,6 +564,10 @@ class vvp_fun_signal : public vvp_net_fun_t { void recv_vec8(vvp_net_ptr_t port, vvp_vector8_t bit); void recv_long(vvp_net_ptr_t port, long bit); + // Part select variants of above + void recv_vec4_pv(vvp_net_ptr_t port, vvp_vector4_t bit, + unsigned base, unsigned wid, unsigned vwid); + // Get information about the vector value. unsigned size() const; vvp_bit4_t value(unsigned idx) const; @@ -575,6 +595,11 @@ class vvp_fun_signal : public vvp_net_fun_t { /* * $Log: vvp_net.h,v $ + * Revision 1.17 2005/02/14 01:50:23 steve + * Signals may receive part vectors from %set/x0 + * instructions. Re-implement the %set/x0 to do + * just that. Remove the useless %set/x0/x instruction. + * * Revision 1.16 2005/02/13 05:26:30 steve * tri0 and tri1 resolvers must replace HiZ with 0/1 after resolution. *