diff --git a/vvp/codes.h b/vvp/codes.h index 5cd2d0616..5893a84e9 100644 --- a/vvp/codes.h +++ b/vvp/codes.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) -#ident "$Id: codes.h,v 1.33 2001/07/22 00:04:50 steve Exp $" +#ident "$Id: codes.h,v 1.34 2001/08/26 22:59:32 steve Exp $" #endif @@ -40,6 +40,7 @@ extern bool of_AND(vthread_t thr, vvp_code_t code); extern bool of_ANDR(vthread_t thr, vvp_code_t code); extern bool of_ASSIGN(vthread_t thr, vvp_code_t code); extern bool of_ASSIGN_MEM(vthread_t thr, vvp_code_t code); +extern bool of_ASSIGN_X0(vthread_t thr, vvp_code_t code); extern bool of_BREAKPOINT(vthread_t thr, vvp_code_t code); extern bool of_CMPS(vthread_t thr, vvp_code_t code); extern bool of_CMPU(vthread_t thr, vvp_code_t code); @@ -74,6 +75,7 @@ extern bool of_OR(vthread_t thr, vvp_code_t code); extern bool of_ORR(vthread_t thr, vvp_code_t code); extern bool of_SET(vthread_t thr, vvp_code_t code); extern bool of_SET_MEM(vthread_t thr, vvp_code_t code); +extern bool of_SET_X(vthread_t thr, vvp_code_t code); extern bool of_SHIFTL_I0(vthread_t thr, vvp_code_t code); extern bool of_SHIFTR_I0(vthread_t thr, vvp_code_t code); extern bool of_SUB(vthread_t thr, vvp_code_t code); @@ -138,6 +140,9 @@ extern vvp_code_t codespace_index(vvp_cpoint_t ptr); /* * $Log: codes.h,v $ + * Revision 1.34 2001/08/26 22:59:32 steve + * Add the assign/x0 and set/x opcodes. + * * Revision 1.33 2001/07/22 00:04:50 steve * Add the load/x instruction for bit selects. * diff --git a/vvp/compile.cc b/vvp/compile.cc index de7b9cb79..fda375c28 100644 --- a/vvp/compile.cc +++ b/vvp/compile.cc @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) -#ident "$Id: compile.cc,v 1.97 2001/08/25 17:22:32 steve Exp $" +#ident "$Id: compile.cc,v 1.98 2001/08/26 22:59:32 steve Exp $" #endif # include "arith.h" @@ -81,6 +81,7 @@ const static struct opcode_table_s opcode_table[] = { { "%and/r", of_ANDR, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} }, { "%assign", of_ASSIGN, 3, {OA_FUNC_PTR, OA_BIT1, OA_BIT2} }, { "%assign/m",of_ASSIGN_MEM,3,{OA_MEM_PTR,OA_BIT1, OA_BIT2} }, + { "%assign/x0",of_ASSIGN_X0,3,{OA_FUNC_PTR,OA_BIT1, OA_BIT2} }, { "%breakpoint", of_BREAKPOINT, 0, {OA_NONE, OA_NONE, OA_NONE} }, { "%cmp/s", of_CMPS, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} }, { "%cmp/u", of_CMPU, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} }, @@ -113,6 +114,7 @@ const static struct opcode_table_s opcode_table[] = { { "%or/r", of_ORR, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} }, { "%set", of_SET, 2, {OA_FUNC_PTR, OA_BIT1, OA_NONE} }, { "%set/m", of_SET_MEM,2, {OA_MEM_PTR, OA_BIT1, OA_NONE} }, + { "%set/x", of_SET_X, 3, {OA_FUNC_PTR, OA_BIT1, OA_BIT2} }, { "%shiftl/i0", of_SHIFTL_I0, 2, {OA_BIT1,OA_NUMBER, OA_NONE} }, { "%shiftr/i0", of_SHIFTR_I0, 2, {OA_BIT1,OA_NUMBER, OA_NONE} }, { "%sub", of_SUB, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} }, @@ -1627,6 +1629,9 @@ vvp_ipoint_t debug_lookup_functor(const char*name) /* * $Log: compile.cc,v $ + * Revision 1.98 2001/08/26 22:59:32 steve + * Add the assign/x0 and set/x opcodes. + * * Revision 1.97 2001/08/25 17:22:32 steve * Only use fvectors for nets and vars. * diff --git a/vvp/opcodes.txt b/vvp/opcodes.txt index 6dc15b778..2088a5187 100644 --- a/vvp/opcodes.txt +++ b/vvp/opcodes.txt @@ -1,7 +1,7 @@ /* * Copyright (c) 2001 Stephen Williams (steve@icarus.com) * - * $Id: opcodes.txt,v 1.27 2001/07/22 00:04:50 steve Exp $ + * $Id: opcodes.txt,v 1.28 2001/08/26 22:59:32 steve Exp $ */ @@ -58,6 +58,19 @@ by index register 3. Bit address zero is the LSB of the first memory word. +* %assign/x0 , , + +This does a non-blocking assignment to a functor, similar to the +%assign instruction. The identifies the base functor of +the affected variable, and the gives the delay when the +assignment takes place. The delay may be 0. The actual functor used is +calculated by using as a base, and indexing with the +index[0] index register. This supports indexed assignment. + +The is the address of the thread register that contains the bit +value to assign. + + * %breakpoint This instruction unconditionally breaks the simulator into the @@ -307,6 +320,13 @@ address zero is the LSB of the first memory word. This instruction sets only a single bit. +* %set/x , , + +This sets the bit of a variable functor, the address calculated by +using the index register (0, 1, 2 or 3) to index the functor +address of . + + * %shiftl/i0 , This instruction shifts the vector left (towards more significant diff --git a/vvp/vthread.cc b/vvp/vthread.cc index 00970c183..4ec9df4a3 100644 --- a/vvp/vthread.cc +++ b/vvp/vthread.cc @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) -#ident "$Id: vthread.cc,v 1.52 2001/08/08 00:53:50 steve Exp $" +#ident "$Id: vthread.cc,v 1.53 2001/08/26 22:59:32 steve Exp $" #endif # include "vthread.h" @@ -377,6 +377,14 @@ bool of_ASSIGN(vthread_t thr, vvp_code_t cp) return true; } +bool of_ASSIGN_X0(vthread_t thr, vvp_code_t cp) +{ + unsigned char bit_val = thr_get_bit(thr, cp->bit_idx2); + vvp_ipoint_t itmp = ipoint_index(cp->iptr, thr->index[0]); + schedule_assign(itmp, bit_val, cp->bit_idx1); + return true; +} + bool of_ASSIGN_MEM(vthread_t thr, vvp_code_t cp) { unsigned char bit_val = thr_get_bit(thr, cp->bit_idx2); @@ -1140,6 +1148,15 @@ bool of_SET_MEM(vthread_t thr, vvp_code_t cp) return true; } +bool of_SET_X(vthread_t thr, vvp_code_t cp) +{ + unsigned char bit_val = thr_get_bit(thr, cp->bit_idx1); + vvp_ipoint_t itmp = ipoint_index(cp->iptr, thr->index[cp->bit_idx2&3]); + functor_set(itmp, bit_val, strong_values[bit_val], true); + + return true; +} + bool of_SHIFTL_I0(vthread_t thr, vvp_code_t cp) { unsigned base = cp->bit_idx1; @@ -1336,6 +1353,9 @@ bool of_ZOMBIE(vthread_t thr, vvp_code_t) /* * $Log: vthread.cc,v $ + * Revision 1.53 2001/08/26 22:59:32 steve + * Add the assign/x0 and set/x opcodes. + * * Revision 1.52 2001/08/08 00:53:50 steve * signed/unsigned warnings? *