From c045f51a7f9f56a898de9f7a5b2a30260a9ccc5e Mon Sep 17 00:00:00 2001 From: steve Date: Mon, 26 Feb 2007 19:51:38 +0000 Subject: [PATCH] Spelling fixes (larry doolittle) --- cadpli/configure.in | 2 +- configure.in | 2 +- cprop.cc | 7 +++++-- expr_synth.cc | 7 +++++-- libveriuser/configure.in | 2 +- solaris/README-solaris_pkg.txt | 8 ++++---- tgt-edif/configure.in | 2 +- tgt-edif/edif.h | 9 ++++++--- tgt-edif/tables.c | 7 +++++-- tgt-edif/xilinx.c | 13 ++++++++----- tgt-edif/xilinx.h | 7 +++++-- tgt-fpga/configure.in | 2 +- tgt-fpga/edif.h | 9 ++++++--- tgt-fpga/xilinx.c | 11 +++++++---- tgt-fpga/xilinx.h | 7 +++++-- tgt-pal/fit_log.c | 7 +++++-- tgt-pal/priv.h | 7 +++++-- tgt-verilog/verilog.c | 7 +++++-- tgt-vvp/configure.in | 2 +- tgt-vvp/draw_mux.c | 9 ++++++--- tgt-vvp/eval_expr.c | 17 ++++++++++------- tgt-vvp/eval_real.c | 7 +++++-- tgt-vvp/vector.c | 7 +++++-- tgt-vvp/vvp_priv.h | 7 +++++-- tgt-vvp/vvp_process.c | 7 +++++-- tgt-vvp/vvp_scope.c | 9 ++++++--- vpi/configure.in | 2 +- vpip/vpi_memory.c | 7 +++++-- 28 files changed, 125 insertions(+), 65 deletions(-) diff --git a/cadpli/configure.in b/cadpli/configure.in index b95b0a84e..79bf30b03 100644 --- a/cadpli/configure.in +++ b/cadpli/configure.in @@ -37,7 +37,7 @@ AC_SUBST(DLLIB) AX_CPP_PRECOMP -# Compiler option for position independent code, needed whan making shared objects. +# Compiler option for position independent code, needed when making shared objects. AX_C_PICFLAG # Linker option used when compiling the target diff --git a/configure.in b/configure.in index f1eec543f..b56c12013 100644 --- a/configure.in +++ b/configure.in @@ -96,7 +96,7 @@ AC_C_BIGENDIAN AX_LD_EXTRALIBS -# Compiler option for position independent code, needed whan making shared objects. +# Compiler option for position independent code, needed when making shared objects. # CFLAGS inherited by cadpli/Makefile? AX_C_PICFLAG diff --git a/cprop.cc b/cprop.cc index 5792293be..34197bc88 100644 --- a/cprop.cc +++ b/cprop.cc @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: cprop.cc,v 1.47.2.6 2006/11/12 01:20:45 steve Exp $" +#ident "$Id: cprop.cc,v 1.47.2.7 2007/02/26 19:51:38 steve Exp $" #endif # include "config.h" @@ -1070,7 +1070,7 @@ void cprop_functor::lpm_mux_large(Design*des, NetMux*obj) throughout. If we find any, we can reduce the width of the MUX to eliminate the fixed value. */ - /* After the following for look, this array of bools will + /* After the following for loop, this array of bools will contain "true" for each bit slice that is constant and identical, and "false" otherwise. The reduce_width will count the number of true entries in the flags array. */ @@ -1336,6 +1336,9 @@ void cprop(Design*des) /* * $Log: cprop.cc,v $ + * Revision 1.47.2.7 2007/02/26 19:51:38 steve + * Spelling fixes (larry doolittle) + * * Revision 1.47.2.6 2006/11/12 01:20:45 steve * Prevent constant mux outputs from confusing itself. * diff --git a/expr_synth.cc b/expr_synth.cc index 57492b2a3..761292368 100644 --- a/expr_synth.cc +++ b/expr_synth.cc @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: expr_synth.cc,v 1.59.2.10 2006/11/26 01:54:05 steve Exp $" +#ident "$Id: expr_synth.cc,v 1.59.2.11 2007/02/26 19:51:38 steve Exp $" #endif # include "config.h" @@ -709,7 +709,7 @@ NetNet* NetEMemory::synthesize(Design*des) cerr << get_line() << ": debug: synthesize read of " << explode->pin_count() << " bit exploded memory." << endl; - /* Only make a muc big enough to address the words that + /* Only make a mux big enough to address the words that the address can generate. (If the address is 0-extended, then only the low words are addressable.) */ unsigned use_count = mem_->count(); @@ -1096,6 +1096,9 @@ NetNet* NetESignal::synthesize(Design*des) /* * $Log: expr_synth.cc,v $ + * Revision 1.59.2.11 2007/02/26 19:51:38 steve + * Spelling fixes (larry doolittle) + * * Revision 1.59.2.10 2006/11/26 01:54:05 steve * Add synthesis of user defined functions. * diff --git a/libveriuser/configure.in b/libveriuser/configure.in index 6c686194e..a66c623e6 100644 --- a/libveriuser/configure.in +++ b/libveriuser/configure.in @@ -23,7 +23,7 @@ AC_CHECK_SIZEOF(unsigned) # may modify CPPFLAGS and CFLAGS AX_CPP_PRECOMP -# Compiler option for position independent code, needed whan making shared objects. +# Compiler option for position independent code, needed when making shared objects. AX_C_PICFLAG AC_SUBST(EXEEXT) diff --git a/solaris/README-solaris_pkg.txt b/solaris/README-solaris_pkg.txt index 002ccb2df..5c9e680cc 100644 --- a/solaris/README-solaris_pkg.txt +++ b/solaris/README-solaris_pkg.txt @@ -1,8 +1,8 @@ -# $Id: README-solaris_pkg.txt,v 1.2 2004/10/04 01:10:56 steve Exp $ +# $Id: README-solaris_pkg.txt,v 1.2.2.1 2007/02/26 19:51:39 steve Exp $ Notes about the solaris package. -I. Installing a prebuild solaris package +I. Installing a prebuilt solaris package ----------------------------------------- To install the solaris package do the following as root on your machine: @@ -24,10 +24,10 @@ To install the solaris package do the following as root on your machine: this will install the package. The package will be registered under the name "IVLver" -II. Deinstalling the solaris package +II. Uninstalling the solaris package ------------------------------------- -To deinstall an installed solaris package do the following as root on your machine: +To uninstall an installed solaris package do the following as root on your machine: pkgrm IVLver diff --git a/tgt-edif/configure.in b/tgt-edif/configure.in index d1b25240c..56d7b4003 100644 --- a/tgt-edif/configure.in +++ b/tgt-edif/configure.in @@ -19,7 +19,7 @@ AC_CHECK_HEADERS(malloc.h) # may modify CPPFLAGS and CFLAGS AX_CPP_PRECOMP -# Compiler option for position independent code, needed whan making shared objects. +# Compiler option for position independent code, needed when making shared objects. AX_C_PICFLAG # linker options when building a shared library diff --git a/tgt-edif/edif.h b/tgt-edif/edif.h index 79eb82414..f3a96d2bc 100644 --- a/tgt-edif/edif.h +++ b/tgt-edif/edif.h @@ -27,7 +27,7 @@ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifdef HAVE_CVS_IDENT -#ident "$Id: edif.h,v 1.1.2.2 2005/09/25 16:35:36 steve Exp $" +#ident "$Id: edif.h,v 1.1.2.3 2007/02/26 19:51:39 steve Exp $" #endif # include @@ -55,7 +55,7 @@ * * Declare external libraries with edif_xlibrary_create * Normally, this is the single technology library that contains - * the primitive cells that the code generator intendes to + * the primitive cells that the code generator intends to * use. The library is given a name, such as VIRTEX or whatever * the implementation tools expect. Cells are attached to the * library later. An edif netlist may include multiple external @@ -204,7 +204,7 @@ extern edif_cellref_t edif_cellref_create(edif_t edf, edif_cell_t cell); /* Instances can have properties attached to them. The name and value given here are turned into a (property (string "val")) - sexpression attached to the instance. + expression attached to the instance. Examples of string properties commonly attached to cellref devices include such things as the INIT= to initialize LUT cells in @@ -251,6 +251,9 @@ extern FILE*xnf; /* * $Log: edif.h,v $ + * Revision 1.1.2.3 2007/02/26 19:51:39 steve + * Spelling fixes (larry doolittle) + * * Revision 1.1.2.2 2005/09/25 16:35:36 steve * Add Xilinx virtex as a reference EDIF device. * diff --git a/tgt-edif/tables.c b/tgt-edif/tables.c index 8fe7fcf6a..6bc9eedbe 100644 --- a/tgt-edif/tables.c +++ b/tgt-edif/tables.c @@ -25,7 +25,7 @@ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifdef HAVE_CVS_IDENT -#ident "$Id: tables.c,v 1.1.2.2 2005/09/25 16:35:37 steve Exp $" +#ident "$Id: tables.c,v 1.1.2.3 2007/02/26 19:51:39 steve Exp $" #endif # include "device.h" @@ -35,7 +35,7 @@ /* * This is where you hook new device types into the module. Simply * declare your struct device_s objects (as done with d_lpm_edif) and - * add an enty in to the edif_device_table so that the user may invoke + * add an entry in to the edif_device_table so that the user may invoke * it via the -parch= command line switch. */ extern const struct device_s d_lpm_edif; @@ -49,6 +49,9 @@ const struct device_table_s edif_device_table[] = { /* * $Log: tables.c,v $ + * Revision 1.1.2.3 2007/02/26 19:51:39 steve + * Spelling fixes (larry doolittle) + * * Revision 1.1.2.2 2005/09/25 16:35:37 steve * Add Xilinx virtex as a reference EDIF device. * diff --git a/tgt-edif/xilinx.c b/tgt-edif/xilinx.c index ccdf29543..428a94473 100644 --- a/tgt-edif/xilinx.c +++ b/tgt-edif/xilinx.c @@ -25,13 +25,13 @@ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifdef HAVE_CVS_IDENT -#ident "$Id: xilinx.c,v 1.1.2.1 2005/09/25 16:35:37 steve Exp $" +#ident "$Id: xilinx.c,v 1.1.2.2 2007/02/26 19:51:39 steve Exp $" #endif /* * This source file contains common functions used by Xilinx * devices. The functions here do not support any specific Xilinx part - * fimily, but instead provide some core functions that are used by + * family, but instead provide some core functions that are used by * specific devices. * * For example, some xilinx_* functions are suitable for placing @@ -295,7 +295,7 @@ edif_cell_t xilinx_cell_xorcy(edif_xlibrary_t xlib) /* * This function does a lot of the stuff common to the header - * functions of various Xilinx familes. This includes creating the edf + * functions of various Xilinx families. This includes creating the edf * object that holds the netlist. */ void xilinx_common_header(ivl_design_t des) @@ -857,14 +857,14 @@ void xilinx_shiftl(ivl_lpm_t net) /* Allocate a matrix of edif_cellref_t variables. A devices will be addressed by the expression table[sdx][qdx]; - This should make the algorighm code easier to read. */ + This should make the algorithm code easier to read. */ cells = calloc(nsel * width, sizeof(edif_cellref_t)); table = calloc(nsel, sizeof(edif_cellref_t*)); for (sdx = 0 ; sdx < nsel ; sdx += 1) table[sdx] = cells + sdx*width; - /* Make a 0 valued pad bit. I wlil use this for all the shifin + /* Make a 0 valued pad bit. I will use this for all the shift in values that are beyond the input. */ pad0_cell = edif_cellref_create(edf, cell_0); pad0 = edif_joint_create(edf); @@ -973,6 +973,9 @@ void xilinx_shiftl(ivl_lpm_t net) /* * $Log: xilinx.c,v $ + * Revision 1.1.2.2 2007/02/26 19:51:39 steve + * Spelling fixes (larry doolittle) + * * Revision 1.1.2.1 2005/09/25 16:35:37 steve * Add Xilinx virtex as a reference EDIF device. * diff --git a/tgt-edif/xilinx.h b/tgt-edif/xilinx.h index 931b8aa2e..c5226db1e 100644 --- a/tgt-edif/xilinx.h +++ b/tgt-edif/xilinx.h @@ -27,13 +27,13 @@ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifdef HAVE_CVS_IDENT -#ident "$Id: xilinx.h,v 1.1.2.1 2005/09/25 16:35:37 steve Exp $" +#ident "$Id: xilinx.h,v 1.1.2.2 2007/02/26 19:51:39 steve Exp $" #endif /* * This header file includes XILINX library support functions. They * manage the creation and reference of cells from the library. Use - * the xililx_cell_* functions to get an edif_cell_t from the + * the xilinx_cell_* functions to get an edif_cell_t from the * library. The function will create the cell in the library if * needed, or will return the existing cell if it was already called. * @@ -142,6 +142,9 @@ extern void xilinx_shiftl(ivl_lpm_t net); /* * $Log: xilinx.h,v $ + * Revision 1.1.2.2 2007/02/26 19:51:39 steve + * Spelling fixes (larry doolittle) + * * Revision 1.1.2.1 2005/09/25 16:35:37 steve * Add Xilinx virtex as a reference EDIF device. * diff --git a/tgt-fpga/configure.in b/tgt-fpga/configure.in index daa6c05d8..33b36baee 100644 --- a/tgt-fpga/configure.in +++ b/tgt-fpga/configure.in @@ -19,7 +19,7 @@ AC_CHECK_HEADERS(malloc.h) # may modify CPPFLAGS and CFLAGS AX_CPP_PRECOMP -# Compiler option for position independent code, needed whan making shared objects. +# Compiler option for position independent code, needed when making shared objects. AX_C_PICFLAG # linker options when building a shared library diff --git a/tgt-fpga/edif.h b/tgt-fpga/edif.h index e8fd9b5c0..7bb588307 100644 --- a/tgt-fpga/edif.h +++ b/tgt-fpga/edif.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: edif.h,v 1.7.2.1 2005/08/27 22:29:31 steve Exp $" +#ident "$Id: edif.h,v 1.7.2.2 2007/02/26 19:51:39 steve Exp $" #endif # include @@ -47,7 +47,7 @@ * * Declare external libraries with edif_xlibrary_create * Normally, this is the single technology library that contains - * the primitive cells that the code generator intendes to + * the primitive cells that the code generator intends to * use. The library is given a name, such as VIRTEX or whatever * the implementation tools expect. Cells are attached to the * library later. An edif netlist may include multiple external @@ -196,7 +196,7 @@ extern edif_cellref_t edif_cellref_create(edif_t edf, edif_cell_t cell); /* Instances can have properties attached to them. The name and value given here are turned into a (property (string "val")) - sexpression attached to the instance. + expression attached to the instance. Examples of string properties commonly attached to cellref devices include such things as the INIT= to initialize LUT cells in @@ -233,6 +233,9 @@ extern void edif_print(FILE*fd, edif_t design); /* * $Log: edif.h,v $ + * Revision 1.7.2.2 2007/02/26 19:51:39 steve + * Spelling fixes (larry doolittle) + * * Revision 1.7.2.1 2005/08/27 22:29:31 steve * Back-port edif_nexus_to_joint from tgt-edif. * diff --git a/tgt-fpga/xilinx.c b/tgt-fpga/xilinx.c index 6684febe5..608b20d03 100644 --- a/tgt-fpga/xilinx.c +++ b/tgt-fpga/xilinx.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: xilinx.c,v 1.12 2004/02/15 18:03:30 steve Exp $" +#ident "$Id: xilinx.c,v 1.12.2.1 2007/02/26 19:51:39 steve Exp $" #endif # include "edif.h" @@ -273,7 +273,7 @@ edif_cell_t xilinx_cell_xorcy(edif_xlibrary_t xlib) /* * This function does a lot of the stuff common to the header - * functions of various Xilinx familes. This includes creating the edf + * functions of various Xilinx families. This includes creating the edf * object that holds the netlist. */ void xilinx_common_header(ivl_design_t des) @@ -835,14 +835,14 @@ void xilinx_shiftl(ivl_lpm_t net) /* Allocate a matrix of edif_cellref_t variables. A devices will be addressed by the expression table[sdx][qdx]; - This should make the algorighm code easier to read. */ + This should make the algorithm code easier to read. */ cells = calloc(nsel * width, sizeof(edif_cellref_t)); table = calloc(nsel, sizeof(edif_cellref_t*)); for (sdx = 0 ; sdx < nsel ; sdx += 1) table[sdx] = cells + sdx*width; - /* Make a 0 valued pad bit. I wlil use this for all the shifin + /* Make a 0 valued pad bit. I will use this for all the shift in values that are beyond the input. */ pad0_cell = edif_cellref_create(edf, cell_0); pad0 = edif_joint_create(edf); @@ -951,6 +951,9 @@ void xilinx_shiftl(ivl_lpm_t net) /* * $Log: xilinx.c,v $ + * Revision 1.12.2.1 2007/02/26 19:51:39 steve + * Spelling fixes (larry doolittle) + * * Revision 1.12 2004/02/15 18:03:30 steve * Cleanup of warnings. * diff --git a/tgt-fpga/xilinx.h b/tgt-fpga/xilinx.h index 429de9907..4341d669e 100644 --- a/tgt-fpga/xilinx.h +++ b/tgt-fpga/xilinx.h @@ -19,13 +19,13 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: xilinx.h,v 1.8 2003/08/15 02:23:53 steve Exp $" +#ident "$Id: xilinx.h,v 1.8.2.1 2007/02/26 19:51:39 steve Exp $" #endif /* * This header file includes XILINX library support functions. They * manage the creation and reference of cells from the library. Use - * the xililx_cell_* functions to get an edif_cell_t from the + * the xilinx_cell_* functions to get an edif_cell_t from the * library. The function will create the cell in the library if * needed, or will return the existing cell if it was already called. */ @@ -130,6 +130,9 @@ extern void xilinx_shiftl(ivl_lpm_t net); /* * $Log: xilinx.h,v $ + * Revision 1.8.2.1 2007/02/26 19:51:39 steve + * Spelling fixes (larry doolittle) + * * Revision 1.8 2003/08/15 02:23:53 steve * Add synthesis support for synchronous reset. * diff --git a/tgt-pal/fit_log.c b/tgt-pal/fit_log.c index e212d0111..18166d694 100644 --- a/tgt-pal/fit_log.c +++ b/tgt-pal/fit_log.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: fit_log.c,v 1.5 2002/08/12 01:35:03 steve Exp $" +#ident "$Id: fit_log.c,v 1.5.2.1 2007/02/26 19:51:39 steve Exp $" #endif # include "config.h" @@ -29,7 +29,7 @@ # include "priv.h" /* - * By the time we get here, all the flip-flops iave been placed in + * By the time we get here, all the flip-flops have been placed in * macrocells, and enables attached to them. So all that's left is to * work backwards from each macrocell, making terms and sum-of-terms * from the asynchronous logic until we get to the table inputs. @@ -128,6 +128,9 @@ int fit_logic(void) /* * $Log: fit_log.c,v $ + * Revision 1.5.2.1 2007/02/26 19:51:39 steve + * Spelling fixes (larry doolittle) + * * Revision 1.5 2002/08/12 01:35:03 steve * conditional ident string using autoconfig. * diff --git a/tgt-pal/priv.h b/tgt-pal/priv.h index 5af74f9ef..581136ee7 100644 --- a/tgt-pal/priv.h +++ b/tgt-pal/priv.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: priv.h,v 1.7 2002/08/12 01:35:03 steve Exp $" +#ident "$Id: priv.h,v 1.7.2.1 2007/02/26 19:51:39 steve Exp $" #endif # include @@ -88,7 +88,7 @@ extern struct pal_bind_s* bind_pin; /* - * These are various stepps in the fitting process. + * These are various steps in the fitting process. */ extern int get_pad_bindings(ivl_scope_t net, void*x); @@ -102,6 +102,9 @@ extern int emit_jedec(const char*path); /* * $Log: priv.h,v $ + * Revision 1.7.2.1 2007/02/26 19:51:39 steve + * Spelling fixes (larry doolittle) + * * Revision 1.7 2002/08/12 01:35:03 steve * conditional ident string using autoconfig. * diff --git a/tgt-verilog/verilog.c b/tgt-verilog/verilog.c index 96d3cbe37..f2b515290 100644 --- a/tgt-verilog/verilog.c +++ b/tgt-verilog/verilog.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: verilog.c,v 1.28 2004/02/15 18:03:30 steve Exp $" +#ident "$Id: verilog.c,v 1.28.2.1 2007/02/26 19:51:39 steve Exp $" #endif # include "config.h" @@ -141,7 +141,7 @@ static int draw_logic(ivl_net_logic_t net) } /* - * Scan the scope and its children for logic gates. Ise the draw_logic + * Scan the scope and its children for logic gates. Use the draw_logic * function to draw the actual gate. */ static int draw_scope_logic(ivl_scope_t scope, void*x) @@ -439,6 +439,9 @@ int target_design(ivl_design_t des) /* * $Log: verilog.c,v $ + * Revision 1.28.2.1 2007/02/26 19:51:39 steve + * Spelling fixes (larry doolittle) + * * Revision 1.28 2004/02/15 18:03:30 steve * Cleanup of warnings. * diff --git a/tgt-vvp/configure.in b/tgt-vvp/configure.in index c27205e5a..9c0b847b7 100644 --- a/tgt-vvp/configure.in +++ b/tgt-vvp/configure.in @@ -28,7 +28,7 @@ esac AC_CHECK_FUNCS(fopen64) -# Compiler option for position independent code, needed whan making shared objects. +# Compiler option for position independent code, needed when making shared objects. AX_C_PICFLAG # linker options when building a shared library diff --git a/tgt-vvp/draw_mux.c b/tgt-vvp/draw_mux.c index fd4b98f6f..e009090b9 100644 --- a/tgt-vvp/draw_mux.c +++ b/tgt-vvp/draw_mux.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: draw_mux.c,v 1.7 2003/12/19 01:27:10 steve Exp $" +#ident "$Id: draw_mux.c,v 1.7.2.1 2007/02/26 19:51:39 steve Exp $" #endif # include "vvp_priv.h" @@ -30,7 +30,7 @@ /* * This draws a general mux, a slice at a time. Use MUXX so that - * unknows lead to unknown output. + * unknowns lead to unknown output. */ static void draw_lpm_mux_bitslice(ivl_lpm_t net, unsigned slice) { @@ -146,7 +146,7 @@ static void draw_lpm_mux_ab(ivl_lpm_t net) ivl_nexus_t s; unsigned idx, width; - /* Only support A-B muxes at this oint. */ + /* Only support A-B muxes at this point. */ assert(ivl_lpm_size(net) == 2); assert(ivl_lpm_selects(net) == 1); @@ -185,6 +185,9 @@ void draw_lpm_mux(ivl_lpm_t net) /* * $Log: draw_mux.c,v $ + * Revision 1.7.2.1 2007/02/26 19:51:39 steve + * Spelling fixes (larry doolittle) + * * Revision 1.7 2003/12/19 01:27:10 steve * Fix various unsigned compare warnings. * diff --git a/tgt-vvp/eval_expr.c b/tgt-vvp/eval_expr.c index 122e27a5f..7dba33365 100644 --- a/tgt-vvp/eval_expr.c +++ b/tgt-vvp/eval_expr.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: eval_expr.c,v 1.110.2.1 2006/03/12 07:34:20 steve Exp $" +#ident "$Id: eval_expr.c,v 1.110.2.2 2007/02/26 19:51:40 steve Exp $" #endif # include "vvp_priv.h" @@ -101,7 +101,7 @@ unsigned long get_number_immediate(ivl_expr_t ex) /* * The STUFF_OK_XZ bit is true if the output is going to be further - * processed so that x and z values are equivilent. This may allow for + * processed so that x and z values are equivalent. This may allow for * new optimizations. */ static struct vector_info draw_eq_immediate(ivl_expr_t exp, unsigned ewid, @@ -443,7 +443,7 @@ static struct vector_info draw_binary_expr_lor(ivl_expr_t exp, unsigned wid) lv = draw_eval_expr(le, STUFF_OK_XZ); /* if the left operand has width, then evaluate the single-bit - logical equivilent. */ + logical equivalent. */ if ((lv.base >= 4) && (lv.wid > 1)) { struct vector_info tmp; clr_vector(lv); @@ -457,7 +457,7 @@ static struct vector_info draw_binary_expr_lor(ivl_expr_t exp, unsigned wid) rv = draw_eval_expr(re, STUFF_OK_XZ); /* if the right operand has width, then evaluate the single-bit - logical equivilent. */ + logical equivalent. */ if ((rv.base >= 4) && (rv.wid > 1)) { struct vector_info tmp; clr_vector(rv); @@ -1002,7 +1002,7 @@ static struct vector_info draw_binary_expr_arith(ivl_expr_t exp, unsigned wid) /* The arithmetic instructions replace the left operand with the result. If the left operand is a replicated constant, - then I need to make a writeable copy so that the + then I need to make a writable copy so that the instruction can operate. */ if (lv.base < 4) { struct vector_info tmp; @@ -1160,7 +1160,7 @@ static struct vector_info draw_bitsel_expr(ivl_expr_t exp, unsigned wid) /* * The concatenation operator is evaluated by evaluating each sub- - * expression, then copying it into the continguous vector of the + * expression, then copying it into the contiguous vector of the * result. Do this until the result vector is filled. */ static struct vector_info draw_concat_expr(ivl_expr_t exp, unsigned wid) @@ -1621,7 +1621,7 @@ static struct vector_info draw_select_expr(ivl_expr_t exp, unsigned wid) clr_vector(shiv); /* If the subv result is a magic constant, then make a copy in - writeable vector space and work from there instead. */ + writable vector space and work from there instead. */ if (subv.base < 4) { res.base = allocate_vector(subv.wid); res.wid = subv.wid; @@ -2177,6 +2177,9 @@ struct vector_info draw_eval_expr(ivl_expr_t exp, int stuff_ok_flag) /* * $Log: eval_expr.c,v $ + * Revision 1.110.2.2 2007/02/26 19:51:40 steve + * Spelling fixes (larry doolittle) + * * Revision 1.110.2.1 2006/03/12 07:34:20 steve * Fix the memsynth1 case. * diff --git a/tgt-vvp/eval_real.c b/tgt-vvp/eval_real.c index c5be1b35f..ace229b73 100644 --- a/tgt-vvp/eval_real.c +++ b/tgt-vvp/eval_real.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: eval_real.c,v 1.11.2.1 2006/10/11 00:19:04 steve Exp $" +#ident "$Id: eval_real.c,v 1.11.2.2 2007/02/26 19:51:40 steve Exp $" #endif /* @@ -116,7 +116,7 @@ static int draw_number_real(ivl_expr_t exp) } /* If this is actually a negative number, then get the - positive equivilent, and set the sign bit in the exponent + positive equivalent, and set the sign bit in the exponent field. */ if (ivl_expr_signed(exp) && (bits[wid-1] == '1')) { mant = (0-mant) & ((1UL< 64k bit) registers. */ #define MAX_VEC (256*1024) @@ -211,6 +211,9 @@ unsigned allocate_vector_exp(ivl_expr_t exp, unsigned wid) /* * $Log: vector.c,v $ + * Revision 1.4.2.1 2007/02/26 19:51:40 steve + * Spelling fixes (larry doolittle) + * * Revision 1.4 2003/07/03 17:44:10 steve * Wider thread vector limit. * diff --git a/tgt-vvp/vvp_priv.h b/tgt-vvp/vvp_priv.h index da7a1361a..512717b3d 100644 --- a/tgt-vvp/vvp_priv.h +++ b/tgt-vvp/vvp_priv.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: vvp_priv.h,v 1.28 2004/01/20 21:00:47 steve Exp $" +#ident "$Id: vvp_priv.h,v 1.28.2.1 2007/02/26 19:51:40 steve Exp $" #endif # include "vvp_config.h" @@ -28,7 +28,7 @@ /* * The target_design entry opens the output file that receives the - * compiled design, and sets the vvp_out to the descripter. + * compiled design, and sets the vvp_out to the descriptor. */ extern FILE* vvp_out; @@ -193,6 +193,9 @@ extern unsigned thread_count; /* * $Log: vvp_priv.h,v $ + * Revision 1.28.2.1 2007/02/26 19:51:40 steve + * Spelling fixes (larry doolittle) + * * Revision 1.28 2004/01/20 21:00:47 steve * Isolate configure from containing config.h * diff --git a/tgt-vvp/vvp_process.c b/tgt-vvp/vvp_process.c index 7aca49717..ca6ac310a 100644 --- a/tgt-vvp/vvp_process.c +++ b/tgt-vvp/vvp_process.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: vvp_process.c,v 1.93.2.2 2005/01/28 18:29:29 steve Exp $" +#ident "$Id: vvp_process.c,v 1.93.2.3 2007/02/26 19:51:40 steve Exp $" #endif # include "vvp_priv.h" @@ -1402,7 +1402,7 @@ static int show_stmt_while(ivl_statement_t net, ivl_scope_t sscope) rc += show_statement(ivl_stmt_sub_stmt(net), sscope); /* This is the bottom of the loop. branch to the top where the - test is repeased, and also draw the out label. */ + test is repeated, and also draw the out label. */ fprintf(vvp_out, " %%jmp T_%d.%d;\n", thread_count, top_label); fprintf(vvp_out, "T_%d.%d ;\n", thread_count, out_label); clear_expression_lookaside(); @@ -1649,6 +1649,9 @@ int draw_func_definition(ivl_scope_t scope) /* * $Log: vvp_process.c,v $ + * Revision 1.93.2.3 2007/02/26 19:51:40 steve + * Spelling fixes (larry doolittle) + * * Revision 1.93.2.2 2005/01/28 18:29:29 steve * Add ability to compile real values into index registers. * diff --git a/tgt-vvp/vvp_scope.c b/tgt-vvp/vvp_scope.c index 87ef5d9f6..8fea7cc72 100644 --- a/tgt-vvp/vvp_scope.c +++ b/tgt-vvp/vvp_scope.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: vvp_scope.c,v 1.103.2.6 2006/04/16 19:26:41 steve Exp $" +#ident "$Id: vvp_scope.c,v 1.103.2.7 2007/02/26 19:51:40 steve Exp $" #endif # include "vvp_priv.h" @@ -29,7 +29,7 @@ # include /* - * Escape non-symbol chararacters in ids, and quotes in strings. + * Escape non-symbol characters in ids, and quotes in strings. */ inline static char hex_digit(unsigned i) @@ -519,7 +519,7 @@ const char* draw_net_input(ivl_nexus_t nex) break; /* Catch the special cases that the nets are supply - nets. Drive constant values uncomditionally. */ + nets. Drive constant values unconditionally. */ case IVL_SIT_SUPPLY0: nex_private = "C"; ivl_nexus_set_private(nex, nex_private); @@ -1886,6 +1886,9 @@ int draw_scope(ivl_scope_t net, ivl_scope_t parent) /* * $Log: vvp_scope.c,v $ + * Revision 1.103.2.7 2007/02/26 19:51:40 steve + * Spelling fixes (larry doolittle) + * * Revision 1.103.2.6 2006/04/16 19:26:41 steve * Fix handling of exploded memories with partial or missing resets. * diff --git a/vpi/configure.in b/vpi/configure.in index 721958670..868c4f822 100644 --- a/vpi/configure.in +++ b/vpi/configure.in @@ -75,7 +75,7 @@ AC_SUBST(file64_support) # $host -# Compiler option for position independent code, needed whan making shared objects. +# Compiler option for position independent code, needed when making shared objects. AX_C_PICFLAG AX_LD_EXTRALIBS diff --git a/vpip/vpi_memory.c b/vpip/vpi_memory.c index 71323b68f..12704dcd8 100644 --- a/vpip/vpi_memory.c +++ b/vpip/vpi_memory.c @@ -19,14 +19,14 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * --- - * You should also have recieved a copy of the Picture Elements + * You should also have received a copy of the Picture Elements * Binary Software License offer along with the source. This offer * allows you to obtain the right to redistribute the software in * binary (compiled) form. If you have not received it, contact * Picture Elements, Inc., 777 Panoramic Way, Berkeley, CA 94704. */ #ifdef HAVE_CVS_IDENT -#ident "$Id: vpi_memory.c,v 1.3 2002/08/12 01:35:05 steve Exp $" +#ident "$Id: vpi_memory.c,v 1.3.2.1 2007/02/26 19:51:41 steve Exp $" #endif # include "vpi_priv.h" @@ -201,6 +201,9 @@ vpiHandle vpip_make_memory(struct __vpiMemory*ref, const char*name, } /* * $Log: vpi_memory.c,v $ + * Revision 1.3.2.1 2007/02/26 19:51:41 steve + * Spelling fixes (larry doolittle) + * * Revision 1.3 2002/08/12 01:35:05 steve * conditional ident string using autoconfig. *