From bcc0730b6b341956b3f462976f6c8c62413ed6f9 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Sat, 23 Apr 2022 09:04:45 +0200 Subject: [PATCH] Add regression test for module port with array typedef Check that for a module port with an array type identifier the type is elaborated in the right scope. Signed-off-by: Lars-Peter Clausen --- ivtest/ivltests/module_port_typedef_array1.v | 32 ++++++++++++++++++++ ivtest/regress-sv.list | 1 + ivtest/regress-vlog95.list | 1 + 3 files changed, 34 insertions(+) create mode 100644 ivtest/ivltests/module_port_typedef_array1.v diff --git a/ivtest/ivltests/module_port_typedef_array1.v b/ivtest/ivltests/module_port_typedef_array1.v new file mode 100644 index 000000000..f84d27e36 --- /dev/null +++ b/ivtest/ivltests/module_port_typedef_array1.v @@ -0,0 +1,32 @@ +// Check that an array type identifier used for a module port is elaborated in +// the correct scope. + +localparam A = 2; +localparam B = 4; + +typedef logic [A-1:0] T[B]; + +module test ( + input T x +); + + localparam A = 5; + localparam B = 10; + + bit failed = 1'b0; + + `define check(expr, val) \ + if (expr !== val) begin \ + $display("FAILED: %s, expected %0d, got %0d", `"expr`", val, expr); \ + failed = 1'b1; \ + end + + initial begin + `check($size(x, 1), 4); + `check($size(x, 2), 2); + if (!failed) begin + $display("PASSED"); + end + end + +endmodule diff --git a/ivtest/regress-sv.list b/ivtest/regress-sv.list index acc997669..547a3752c 100644 --- a/ivtest/regress-sv.list +++ b/ivtest/regress-sv.list @@ -368,6 +368,7 @@ module_nonansi_struct2 normal,-g2005-sv ivltests module_nonansi_struct_fail CE,-g2005-sv ivltests module_output_port_sv_var1 normal,-g2005-sv ivltests module_output_port_sv_var2 normal,-g2005-sv ivltests +module_port_typedef_array1 normal,-g2005-sv ivltests named_begin normal,-g2009 ivltests named_begin_fail CE,-g2009 ivltests named_fork normal,-g2009 ivltests diff --git a/ivtest/regress-vlog95.list b/ivtest/regress-vlog95.list index 0aeb61f90..6853f3969 100644 --- a/ivtest/regress-vlog95.list +++ b/ivtest/regress-vlog95.list @@ -225,6 +225,7 @@ br_ml20171017 CE ivltests genvar_scopes CE ivltests meminit2 CE ivltests memsynth4 CE,-S ivltests # Synthesized net array +module_port_typedef_array1 CE,-g2005-sv ivltests # Module port array negative_genvar CE ivltests pr1565544 CE ivltests pr1657307 CE ivltests