diff --git a/PExpr.cc b/PExpr.cc
index 0680defb1..8d932ad53 100644
--- a/PExpr.cc
+++ b/PExpr.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PExpr.cc,v 1.17 2000/05/04 03:37:58 steve Exp $"
+#ident "$Id: PExpr.cc,v 1.18 2000/05/07 04:37:55 steve Exp $"
 #endif
 
 # include  "PExpr.h"
@@ -45,7 +45,9 @@ bool PExpr::is_constant(Module*) const
 NetNet* PExpr::elaborate_net(Design*des, const string&path, unsigned,
 			     unsigned long,
 			     unsigned long,
-			     unsigned long) const
+			     unsigned long,
+			     Link::strength_t,
+			     Link::strength_t) const
 {
       cerr << get_line() << ": error: Unable to elaborate `"
 	   << *this << "' as gates." << endl;
@@ -212,6 +214,14 @@ bool PETernary::is_constant(Module*) const
 
 /*
  * $Log: PExpr.cc,v $
+ * Revision 1.18  2000/05/07 04:37:55  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.17  2000/05/04 03:37:58  steve
  *  Add infrastructure for system functions, move
  *  $time to that structure and add $random.
diff --git a/PExpr.h b/PExpr.h
index ab0bf5877..49aef8c2e 100644
--- a/PExpr.h
+++ b/PExpr.h
@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PExpr.h,v 1.36 2000/05/04 03:37:58 steve Exp $"
+#ident "$Id: PExpr.h,v 1.37 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 # include  <string>
@@ -66,7 +66,10 @@ class PExpr : public LineInfo {
 				    unsigned lwidth,
 				    unsigned long rise,
 				    unsigned long fall,
-				    unsigned long decay) const;
+				    unsigned long decay,
+				    Link::strength_t drive0 =Link::STRONG,
+				    Link::strength_t drive1 =Link::STRONG)
+	    const;
 
 	// This method elaborates the expression as gates, but
 	// restricted for use as l-values of continuous assignments.
@@ -107,7 +110,9 @@ class PEConcat : public PExpr {
 				    unsigned width,
 				    unsigned long rise,
 				    unsigned long fall,
-				    unsigned long decay) const;
+				    unsigned long decay,
+				    Link::strength_t drive0,
+				    Link::strength_t drive1) const;
       virtual NetExpr*elaborate_expr(Design*des, NetScope*) const;
       virtual bool is_constant(Module*) const;
 
@@ -159,7 +164,9 @@ class PEIdent : public PExpr {
 				    unsigned lwidth,
 				    unsigned long rise,
 				    unsigned long fall,
-				    unsigned long decay) const;
+				    unsigned long decay,
+				    Link::strength_t drive0,
+				    Link::strength_t drive1) const;
 
       virtual NetExpr*elaborate_expr(Design*des, NetScope*) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
@@ -201,7 +208,9 @@ class PENumber : public PExpr {
 				    unsigned lwidth,
 				    unsigned long rise,
 				    unsigned long fall,
-				    unsigned long decay) const;
+				    unsigned long decay,
+				    Link::strength_t drive0,
+				    Link::strength_t drive1) const;
       virtual NetEConst*elaborate_expr(Design*des, NetScope*) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
       virtual verinum* eval_const(const Design*des, const string&path) const;
@@ -240,7 +249,9 @@ class PEUnary : public PExpr {
 				    unsigned width,
 				    unsigned long rise,
 				    unsigned long fall,
-				    unsigned long decay) const;
+				    unsigned long decay,
+				    Link::strength_t drive0,
+				    Link::strength_t drive1) const;
       virtual NetEUnary*elaborate_expr(Design*des, NetScope*) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
 
@@ -262,7 +273,9 @@ class PEBinary : public PExpr {
 				    unsigned width,
 				    unsigned long rise,
 				    unsigned long fall,
-				    unsigned long decay) const;
+				    unsigned long decay,
+				    Link::strength_t drive0,
+				    Link::strength_t drive1) const;
       virtual NetEBinary*elaborate_expr(Design*des, NetScope*) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
       virtual verinum* eval_const(const Design*des, const string&path) const;
@@ -326,9 +339,11 @@ class PETernary : public PExpr {
       virtual void dump(ostream&out) const;
       virtual NetNet* elaborate_net(Design*des, const string&path,
 				    unsigned width,
-				    unsigned long rise =0,
-				    unsigned long fall =0,
-				    unsigned long decay =0) const;
+				    unsigned long rise,
+				    unsigned long fall,
+				    unsigned long decay,
+				    Link::strength_t drive0,
+				    Link::strength_t drive1) const;
       virtual NetETernary*elaborate_expr(Design*des, NetScope*) const;
       virtual verinum* eval_const(const Design*des, const string&path) const;
 
@@ -360,6 +375,14 @@ class PECallFunction : public PExpr {
 
 /*
  * $Log: PExpr.h,v $
+ * Revision 1.37  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.36  2000/05/04 03:37:58  steve
  *  Add infrastructure for system functions, move
  *  $time to that structure and add $random.
diff --git a/cprop.cc b/cprop.cc
index 07d7f7019..ce538f029 100644
--- a/cprop.cc
+++ b/cprop.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: cprop.cc,v 1.8 2000/04/28 21:00:28 steve Exp $"
+#ident "$Id: cprop.cc,v 1.9 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 # include  "netlist.h"
@@ -29,14 +29,14 @@
  * this link are constant. It will also return true if there are no
  * drivers at all.
  */
-static bool all_drivers_constant(const NetObj::Link&lnk)
+static bool all_drivers_constant(const Link&lnk)
 {
-      for (const NetObj::Link*cur = lnk.next_link()
+      for (const Link*cur = lnk.next_link()
 		 ; *cur != lnk ; cur = cur->next_link()) {
 
-	    if (cur->get_dir() == NetObj::Link::INPUT)
+	    if (cur->get_dir() == Link::INPUT)
 		  continue;
-	    if (cur->get_dir() == NetObj::Link::PASSIVE)
+	    if (cur->get_dir() == Link::PASSIVE)
 		  continue;
 	    if (! dynamic_cast<const NetConst*>(cur->get_obj()))
 		  return false;
@@ -50,9 +50,9 @@ static bool all_drivers_constant(const NetObj::Link&lnk)
  * or Vz if there is no constant. The results of this function are
  * only meaningful if all_drivers_constant(lnk) == true.
  */
-static verinum::V driven_value(const NetObj::Link&lnk)
+static verinum::V driven_value(const Link&lnk)
 {
-      for (const NetObj::Link*cur = lnk.next_link()
+      for (const Link*cur = lnk.next_link()
 		 ; *cur != lnk ; cur = cur->next_link()) {
 
 	    const NetConst*obj;
@@ -319,6 +319,14 @@ void cprop(Design*des)
 
 /*
  * $Log: cprop.cc,v $
+ * Revision 1.9  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.8  2000/04/28 21:00:28  steve
  *  Over agressive signal elimination in constant probadation.
  *
diff --git a/design_dump.cc b/design_dump.cc
index bc3fc4818..98917456e 100644
--- a/design_dump.cc
+++ b/design_dump.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: design_dump.cc,v 1.82 2000/05/04 03:37:58 steve Exp $"
+#ident "$Id: design_dump.cc,v 1.83 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 /*
@@ -42,6 +42,30 @@ static ostream& operator<< (ostream&o, NetBlock::Type t)
       return o;
 }
 
+ostream& operator << (ostream&o, Link::strength_t str)
+{
+      switch (str) {
+	  case Link::HIGHZ:
+	    o << "highz";
+	    break;
+	  case Link::WEAK:
+	    o << "weak";
+	    break;
+	  case Link::PULL:
+	    o << "pull";
+	    break;
+	  case Link::STRONG:
+	    o << "strong";
+	    break;
+	  case Link::SUPPLY:
+	    o << "supply";
+	    break;
+	  default:
+	    assert(0);
+      }
+      return o;
+}
+
 /* Dump a net. This can be a wire or register. */
 void NetNet::dump_net(ostream&o, unsigned ind) const
 {
@@ -118,7 +142,9 @@ void NetObj::dump_node_pins(ostream&o, unsigned ind) const
 		  o << " O";
 		  break;
 	    }
-	    o << ":";
+
+	    o << " (" << pin(idx).drive0() << "0 "
+	      << pin(idx).drive1() << "1):";
 
 	    unsigned cpin;
 	    const NetObj*cur;
@@ -929,6 +955,14 @@ void Design::dump(ostream&o) const
 
 /*
  * $Log: design_dump.cc,v $
+ * Revision 1.83  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.82  2000/05/04 03:37:58  steve
  *  Add infrastructure for system functions, move
  *  $time to that structure and add $random.
diff --git a/elab_net.cc b/elab_net.cc
index 1df20a8db..91f064752 100644
--- a/elab_net.cc
+++ b/elab_net.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: elab_net.cc,v 1.33 2000/05/03 21:21:36 steve Exp $"
+#ident "$Id: elab_net.cc,v 1.34 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 # include  "PExpr.h"
@@ -34,7 +34,9 @@ NetNet* PEBinary::elaborate_net(Design*des, const string&path,
 				unsigned width,
 				unsigned long rise,
 				unsigned long fall,
-				unsigned long decay) const
+				unsigned long decay,
+				Link::strength_t drive0,
+				Link::strength_t drive1) const
 {
       switch (op_) {
 	  case '*':
@@ -805,7 +807,9 @@ NetNet* PEConcat::elaborate_net(Design*des, const string&path,
 				unsigned,
 				unsigned long rise,
 				unsigned long fall,
-				unsigned long decay) const
+				unsigned long decay,
+				Link::strength_t drive0,
+				Link::strength_t drive1) const
 {
       NetScope*scope = des->find_scope(path);
       assert(scope);
@@ -883,7 +887,9 @@ NetNet* PEIdent::elaborate_net(Design*des, const string&path,
 			       unsigned lwidth,
 			       unsigned long rise,
 			       unsigned long fall,
-			       unsigned long decay) const
+			       unsigned long decay,
+			       Link::strength_t drive0,
+			       Link::strength_t drive1) const
 {
       NetScope*scope = des->find_scope(path);
       NetNet*sig = des->find_signal(scope, text_);
@@ -1141,7 +1147,9 @@ NetNet* PENumber::elaborate_net(Design*des, const string&path,
 				unsigned lwidth,
 				unsigned long rise,
 				unsigned long fall,
-				unsigned long decay) const
+				unsigned long decay,
+				Link::strength_t drive0,
+				Link::strength_t drive1) const
 {
       NetScope*scope = des->find_scope(path);
       assert(scope);
@@ -1160,8 +1168,11 @@ NetNet* PENumber::elaborate_net(Design*des, const string&path,
 		  num.set(idx, value_->get(idx));
 
 	    NetConst*tmp = new NetConst(des->local_symbol(path), num);
-	    for (idx = 0 ;  idx < net->pin_count() ;  idx += 1)
+	    for (idx = 0 ;  idx < net->pin_count() ;  idx += 1) {
+		  tmp->pin(idx).drive0(drive0);
+		  tmp->pin(idx).drive1(drive1);
 		  connect(net->pin(idx), tmp->pin(idx));
+	    }
 
 	    des->add_node(tmp);
 	    return net;
@@ -1237,7 +1248,9 @@ NetNet* PETernary::elaborate_net(Design*des, const string&path,
 				 unsigned width,
 				 unsigned long rise,
 				 unsigned long fall,
-				 unsigned long decay) const
+				 unsigned long decay,
+				 Link::strength_t drive0,
+				 Link::strength_t drive1) const
 {
       NetScope*scope = des->find_scope(path);
       assert(scope);
@@ -1303,7 +1316,9 @@ NetNet* PEUnary::elaborate_net(Design*des, const string&path,
 			       unsigned width,
 			       unsigned long rise,
 			       unsigned long fall,
-			       unsigned long decay) const
+			       unsigned long decay,
+			       Link::strength_t drive0,
+			       Link::strength_t drive1) const
 {
       NetScope*scope = des->find_scope(path);
       assert(scope);
@@ -1447,6 +1462,14 @@ NetNet* PEUnary::elaborate_net(Design*des, const string&path,
 
 /*
  * $Log: elab_net.cc,v $
+ * Revision 1.34  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.33  2000/05/03 21:21:36  steve
  *  Allow ternary result to be padded to result width.
  *
diff --git a/elaborate.cc b/elaborate.cc
index db78dcab9..8d3f5771b 100644
--- a/elaborate.cc
+++ b/elaborate.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: elaborate.cc,v 1.168 2000/05/02 16:27:38 steve Exp $"
+#ident "$Id: elaborate.cc,v 1.169 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 /*
@@ -41,6 +41,24 @@
 static const map<string,Module*>* modlist = 0;
 static const map<string,PUdp*>*   udplist = 0;
 
+static Link::strength_t drive_type(PGate::strength_t drv)
+{
+      switch (drv) {
+	  case PGate::HIGHZ:
+	    return Link::HIGHZ;
+	  case PGate::WEAK:
+	    return Link::WEAK;
+	  case PGate::PULL:
+	    return Link::PULL;
+	  case PGate::STRONG:
+	    return Link::STRONG;
+	  case PGate::SUPPLY:
+	    return Link::SUPPLY;
+	  default:
+	    assert(0);
+      }
+      return Link::STRONG;
+}
 
 
 void PGate::elaborate(Design*des, const string&path) const
@@ -58,6 +76,9 @@ void PGAssign::elaborate(Design*des, const string&path) const
       unsigned long rise_time, fall_time, decay_time;
       eval_delays(des, path, rise_time, fall_time, decay_time);
 
+      Link::strength_t drive0 = drive_type(strength0());
+      Link::strength_t drive1 = drive_type(strength1());
+
       assert(pin(0));
       assert(pin(1));
 
@@ -74,7 +95,8 @@ void PGAssign::elaborate(Design*des, const string&path) const
 	   generated NetNet. */
       NetNet*rval = pin(1)->elaborate_net(des, path,
 					  lval->pin_count(),
-					  rise_time, fall_time, decay_time);
+					  rise_time, fall_time, decay_time,
+					  drive0, drive1);
       if (rval == 0) {
 	    cerr << get_line() << ": error: Unable to elaborate r-value: "
 		 << *pin(1) << endl;
@@ -2328,6 +2350,14 @@ Design* elaborate(const map<string,Module*>&modules,
 
 /*
  * $Log: elaborate.cc,v $
+ * Revision 1.169  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.168  2000/05/02 16:27:38  steve
  *  Move signal elaboration to a seperate pass.
  *
diff --git a/link_const.cc b/link_const.cc
index f9f3197b1..66e80fbb3 100644
--- a/link_const.cc
+++ b/link_const.cc
@@ -17,18 +17,18 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: link_const.cc,v 1.1 2000/04/20 00:28:03 steve Exp $"
+#ident "$Id: link_const.cc,v 1.2 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 # include  "netlist.h"
 # include  "netmisc.h"
 
-NetConst* link_const_value(NetObj::Link&pin, unsigned&idx)
+NetConst* link_const_value(Link&pin, unsigned&idx)
 {
       NetConst*robj = 0;
       unsigned ridx = 0;
 
-      for (NetObj::Link*cur = pin.next_link()
+      for (Link*cur = pin.next_link()
 		 ; *cur != pin ;  cur = cur->next_link()) {
 
 	    NetConst*tmp;
@@ -49,6 +49,14 @@ NetConst* link_const_value(NetObj::Link&pin, unsigned&idx)
 
 /*
  * $Log: link_const.cc,v $
+ * Revision 1.2  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.1  2000/04/20 00:28:03  steve
  *  Catch some simple identity compareoptimizations.
  *
diff --git a/netlist.cc b/netlist.cc
index cabc3708c..a60036f9f 100644
--- a/netlist.cc
+++ b/netlist.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: netlist.cc,v 1.122 2000/05/04 03:37:58 steve Exp $"
+#ident "$Id: netlist.cc,v 1.123 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 # include  <cassert>
@@ -75,7 +75,7 @@ ostream& operator<< (ostream&o, NetNet::Type t)
 }
 
 
-void connect(NetObj::Link&l, NetObj::Link&r)
+void connect(Link&l, Link&r)
 {
       assert(&l != &r);
       assert(l.next_->prev_ == &l);
@@ -83,9 +83,9 @@ void connect(NetObj::Link&l, NetObj::Link&r)
       assert(r.next_->prev_ == &r);
       assert(r.prev_->next_ == &r);
 
-      NetObj::Link* cur = &l;
+      Link* cur = &l;
       do {
-	    NetObj::Link*tmp = cur->next_;
+	    Link*tmp = cur->next_;
 
 	      // If I stumble on r in the nexus, then stop now because
 	      // we are already connected.
@@ -111,29 +111,66 @@ void connect(NetObj::Link&l, NetObj::Link&r)
       assert(r.prev_->next_ == &r);
 }
 
-NetObj::Link::Link()
-: dir_(PASSIVE), inst_(0), next_(this), prev_(this)
+Link::Link()
+: dir_(PASSIVE), drive0_(STRONG), drive1_(STRONG),
+  inst_(0), next_(this), prev_(this)
 {
 }
 
-NetObj::Link::~Link()
+Link::~Link()
 {
       unlink();
 }
 
-void NetObj::Link::unlink()
+void Link::set_dir(DIR d)
+{
+      dir_ = d;
+}
+
+Link::DIR Link::get_dir() const
+{
+      return dir_;
+}
+
+void Link::drive0(Link::strength_t str)
+{
+      drive0_ = str;
+}
+
+void Link::drive1(Link::strength_t str)
+{
+      drive1_ = str;
+}
+
+Link::strength_t Link::drive0() const
+{
+      return drive0_;
+}
+
+Link::strength_t Link::drive1() const
+{
+      return drive1_;
+}
+
+void Link::cur_link(NetObj*&net, unsigned &pin)
+{
+      net = node_;
+      pin = pin_;
+}
+
+void Link::unlink()
 {
       next_->prev_ = prev_;
       prev_->next_ = next_;
       next_ = prev_ = this;
 }
 
-bool NetObj::Link::is_linked() const
+bool Link::is_linked() const
 {
       return next_ != this;
 }
 
-bool NetObj::Link::is_linked(const NetObj&that) const
+bool Link::is_linked(const NetObj&that) const
 {
       for (const Link*idx = next_ ; this != idx ;  idx = idx->next_)
 	    if (idx->node_ == &that)
@@ -142,7 +179,7 @@ bool NetObj::Link::is_linked(const NetObj&that) const
       return false;
 }
 
-bool NetObj::Link::is_linked(const NetObj::Link&that) const
+bool Link::is_linked(const Link&that) const
 {
       for (const Link*idx = next_ ; this != idx ;  idx = idx->next_)
 	    if (idx->is_equal(that))
@@ -151,7 +188,7 @@ bool NetObj::Link::is_linked(const NetObj::Link&that) const
       return false;
 }
 
-void NetObj::Link::next_link(NetObj*&net, unsigned&pin)
+void Link::next_link(NetObj*&net, unsigned&pin)
 {
       assert(next_->prev_ == this);
       assert(prev_->next_ == this);
@@ -159,7 +196,7 @@ void NetObj::Link::next_link(NetObj*&net, unsigned&pin)
       pin = next_->pin_;
 }
 
-void NetObj::Link::next_link(const NetObj*&net, unsigned&pin) const
+void Link::next_link(const NetObj*&net, unsigned&pin) const
 {
       assert(next_->prev_ == this);
       assert(prev_->next_ == this);
@@ -167,47 +204,47 @@ void NetObj::Link::next_link(const NetObj*&net, unsigned&pin) const
       pin = next_->pin_;
 }
 
-NetObj::Link* NetObj::Link::next_link()
+Link* Link::next_link()
 {
       assert(next_->prev_ == this);
       assert(prev_->next_ == this);
       return next_;
 }
 
-const NetObj::Link* NetObj::Link::next_link() const
+const Link* Link::next_link() const
 {
       assert(next_->prev_ == this);
       assert(prev_->next_ == this);
       return next_;
 }
 
-const NetObj*NetObj::Link::get_obj() const
+const NetObj*Link::get_obj() const
 {
       return node_;
 }
 
-NetObj*NetObj::Link::get_obj()
+NetObj*Link::get_obj()
 {
       return node_;
 }
 
-unsigned NetObj::Link::get_pin() const
+unsigned Link::get_pin() const
 {
       return pin_;
 }
 
-void NetObj::Link::set_name(const string&n, unsigned i)
+void Link::set_name(const string&n, unsigned i)
 {
       name_ = n;
       inst_ = i;
 }
 
-const string& NetObj::Link::get_name() const
+const string& Link::get_name() const
 {
       return name_;
 }
 
-unsigned NetObj::Link::get_inst() const
+unsigned Link::get_inst() const
 {
       return inst_;
 }
@@ -221,14 +258,14 @@ bool connected(const NetObj&l, const NetObj&r)
       return true;
 }
 
-unsigned count_inputs(const NetObj::Link&pin)
+unsigned count_inputs(const Link&pin)
 {
-      unsigned count = (pin.get_dir() == NetObj::Link::INPUT)? 1 : 0;
+      unsigned count = (pin.get_dir() == Link::INPUT)? 1 : 0;
       const NetObj*cur;
       unsigned cpin;
       pin.next_link(cur, cpin);
       while (cur->pin(cpin) != pin) {
-	    if (cur->pin(cpin).get_dir() == NetObj::Link::INPUT)
+	    if (cur->pin(cpin).get_dir() == Link::INPUT)
 		  count += 1;
 	    cur->pin(cpin).next_link(cur, cpin);
       }
@@ -236,14 +273,14 @@ unsigned count_inputs(const NetObj::Link&pin)
       return count;
 }
 
-unsigned count_outputs(const NetObj::Link&pin)
+unsigned count_outputs(const Link&pin)
 {
-      unsigned count = (pin.get_dir() == NetObj::Link::OUTPUT)? 1 : 0;
+      unsigned count = (pin.get_dir() == Link::OUTPUT)? 1 : 0;
       const NetObj*cur;
       unsigned cpin;
       pin.next_link(cur, cpin);
       while (cur->pin(cpin) != pin) {
-	    if (cur->pin(cpin).get_dir() == NetObj::Link::OUTPUT)
+	    if (cur->pin(cpin).get_dir() == Link::OUTPUT)
 		  count += 1;
 	    cur->pin(cpin).next_link(cur, cpin);
       }
@@ -251,7 +288,7 @@ unsigned count_outputs(const NetObj::Link&pin)
       return count;
 }
 
-unsigned count_signals(const NetObj::Link&pin)
+unsigned count_signals(const Link&pin)
 {
       unsigned count = 0;
       if (dynamic_cast<const NetNet*>(pin.get_obj()))
@@ -288,11 +325,11 @@ const NetNet* find_link_signal(const NetObj*net, unsigned pin, unsigned&bidx)
       return 0;
 }
 
-NetObj::Link* find_next_output(NetObj::Link*lnk)
+Link* find_next_output(Link*lnk)
 {
-      for (NetObj::Link*cur = lnk->next_link()
+      for (Link*cur = lnk->next_link()
 		 ;  cur != lnk ;  cur = cur->next_link())
-	    if (cur->get_dir() == NetObj::Link::OUTPUT)
+	    if (cur->get_dir() == Link::OUTPUT)
 		  return cur;
 
       return 0;
@@ -350,13 +387,13 @@ bool NetObj::has_compat_attributes(const NetObj&that) const
       return true;
 }
 
-NetObj::Link& NetObj::pin(unsigned idx)
+Link& NetObj::pin(unsigned idx)
 {
       assert(idx < npins_);
       return pins_[idx];
 }
 
-const NetObj::Link& NetObj::pin(unsigned idx) const
+const Link& NetObj::pin(unsigned idx) const
 {
       assert(idx < npins_);
       return pins_[idx];
@@ -530,78 +567,78 @@ unsigned NetFF::width() const
       return (pin_count() - 8) / 2;
 }
 
-NetObj::Link& NetFF::pin_Clock()
+Link& NetFF::pin_Clock()
 {
       return pin(0);
 }
 
-const NetObj::Link& NetFF::pin_Clock() const
+const Link& NetFF::pin_Clock() const
 {
       return pin(0);
 }
 
-NetObj::Link& NetFF::pin_Enable()
+Link& NetFF::pin_Enable()
 {
       return pin(1);
 }
 
-const NetObj::Link& NetFF::pin_Enable() const
+const Link& NetFF::pin_Enable() const
 {
       return pin(1);
 }
 
-NetObj::Link& NetFF::pin_Aload()
+Link& NetFF::pin_Aload()
 {
       return pin(2);
 }
 
-NetObj::Link& NetFF::pin_Aset()
+Link& NetFF::pin_Aset()
 {
       return pin(3);
 }
 
-NetObj::Link& NetFF::pin_Aclr()
+Link& NetFF::pin_Aclr()
 {
       return pin(4);
 }
 
-NetObj::Link& NetFF::pin_Sload()
+Link& NetFF::pin_Sload()
 {
       return pin(5);
 }
 
-NetObj::Link& NetFF::pin_Sset()
+Link& NetFF::pin_Sset()
 {
       return pin(6);
 }
 
-NetObj::Link& NetFF::pin_Sclr()
+Link& NetFF::pin_Sclr()
 {
       return pin(7);
 }
 
-NetObj::Link& NetFF::pin_Data(unsigned w)
+Link& NetFF::pin_Data(unsigned w)
 {
       unsigned pn = 8 + 2*w;
       assert(pn < pin_count());
       return pin(pn);
 }
 
-const NetObj::Link& NetFF::pin_Data(unsigned w) const
+const Link& NetFF::pin_Data(unsigned w) const
 {
       unsigned pn = 8 + 2*w;
       assert(pn < pin_count());
       return pin(pn);
 }
 
-NetObj::Link& NetFF::pin_Q(unsigned w)
+Link& NetFF::pin_Q(unsigned w)
 {
       unsigned pn = 9 + w*2;
       assert(pn < pin_count());
       return pin(pn);
 }
 
-const NetObj::Link& NetFF::pin_Q(unsigned w) const
+const Link& NetFF::pin_Q(unsigned w) const
 {
       unsigned pn = 9 + w*2;
       assert(pn < pin_count());
@@ -625,16 +662,16 @@ const NetObj::Link& NetFF::pin_Q(unsigned w) const
 NetAddSub::NetAddSub(const string&n, unsigned w)
 : NetNode(n, w*3+6)
 {
-      pin(0).set_dir(NetObj::Link::INPUT); pin(0).set_name("Add_Sub", 0);
-      pin(1).set_dir(NetObj::Link::INPUT); pin(1).set_name("Aclr", 0);
-      pin(2).set_dir(NetObj::Link::INPUT); pin(2).set_name("Clock", 0);
-      pin(3).set_dir(NetObj::Link::INPUT); pin(3).set_name("Cin", 0);
-      pin(4).set_dir(NetObj::Link::OUTPUT); pin(4).set_name("Cout", 0);
-      pin(5).set_dir(NetObj::Link::OUTPUT); pin(5).set_name("Overflow", 0);
+      pin(0).set_dir(Link::INPUT); pin(0).set_name("Add_Sub", 0);
+      pin(1).set_dir(Link::INPUT); pin(1).set_name("Aclr", 0);
+      pin(2).set_dir(Link::INPUT); pin(2).set_name("Clock", 0);
+      pin(3).set_dir(Link::INPUT); pin(3).set_name("Cin", 0);
+      pin(4).set_dir(Link::OUTPUT); pin(4).set_name("Cout", 0);
+      pin(5).set_dir(Link::OUTPUT); pin(5).set_name("Overflow", 0);
       for (unsigned idx = 0 ;  idx < w ;  idx += 1) {
-	    pin_DataA(idx).set_dir(NetObj::Link::INPUT);
-	    pin_DataB(idx).set_dir(NetObj::Link::INPUT);
-	    pin_Result(idx).set_dir(NetObj::Link::OUTPUT);
+	    pin_DataA(idx).set_dir(Link::INPUT);
+	    pin_DataB(idx).set_dir(Link::INPUT);
+	    pin_Result(idx).set_dir(Link::OUTPUT);
 	    pin_DataA(idx).set_name("DataA", idx);
 	    pin_DataB(idx).set_name("DataB", idx);
 	    pin_Result(idx).set_name("Result", idx);
@@ -650,52 +687,52 @@ unsigned NetAddSub::width()const
       return (pin_count() - 6) / 3;
 }
 
-NetObj::Link& NetAddSub::pin_Cout()
+Link& NetAddSub::pin_Cout()
 {
       return pin(4);
 }
 
-const NetObj::Link& NetAddSub::pin_Cout() const
+const Link& NetAddSub::pin_Cout() const
 {
       return pin(4);
 }
 
-NetObj::Link& NetAddSub::pin_DataA(unsigned idx)
+Link& NetAddSub::pin_DataA(unsigned idx)
 {
       idx = 6 + idx*3;
       assert(idx < pin_count());
       return pin(idx);
 }
 
-const NetObj::Link& NetAddSub::pin_DataA(unsigned idx) const
+const Link& NetAddSub::pin_DataA(unsigned idx) const
 {
       idx = 6 + idx*3;
       assert(idx < pin_count());
       return pin(idx);
 }
 
-NetObj::Link& NetAddSub::pin_DataB(unsigned idx)
+Link& NetAddSub::pin_DataB(unsigned idx)
 {
       idx = 7 + idx*3;
       assert(idx < pin_count());
       return pin(idx);
 }
 
-const NetObj::Link& NetAddSub::pin_DataB(unsigned idx) const
+const Link& NetAddSub::pin_DataB(unsigned idx) const
 {
       idx = 7 + idx*3;
       assert(idx < pin_count());
       return pin(idx);
 }
 
-NetObj::Link& NetAddSub::pin_Result(unsigned idx)
+Link& NetAddSub::pin_Result(unsigned idx)
 {
       idx = 8 + idx*3;
       assert(idx < pin_count());
       return pin(idx);
 }
 
-const NetObj::Link& NetAddSub::pin_Result(unsigned idx) const
+const Link& NetAddSub::pin_Result(unsigned idx) const
 {
       idx = 8 + idx*3;
       assert(idx < pin_count());
@@ -714,20 +751,20 @@ const NetObj::Link& NetAddSub::pin_Result(unsigned idx) const
 NetCLShift::NetCLShift(const string&n, unsigned width, unsigned width_dist)
 : NetNode(n, 3+2*width+width_dist), width_(width), width_dist_(width_dist)
 {
-      pin(0).set_dir(NetObj::Link::INPUT); pin(0).set_name("Direction", 0);
-      pin(1).set_dir(NetObj::Link::OUTPUT); pin(1).set_name("Underflow", 0);
-      pin(2).set_dir(NetObj::Link::OUTPUT); pin(2).set_name("Overflow", 0);
+      pin(0).set_dir(Link::INPUT); pin(0).set_name("Direction", 0);
+      pin(1).set_dir(Link::OUTPUT); pin(1).set_name("Underflow", 0);
+      pin(2).set_dir(Link::OUTPUT); pin(2).set_name("Overflow", 0);
 
       for (unsigned idx = 0 ;  idx < width_ ;  idx += 1) {
-	    pin(3+idx).set_dir(NetObj::Link::INPUT);
+	    pin(3+idx).set_dir(Link::INPUT);
 	    pin(3+idx).set_name("Data", idx);
 
-	    pin(3+width_+idx).set_dir(NetObj::Link::OUTPUT);
+	    pin(3+width_+idx).set_dir(Link::OUTPUT);
 	    pin(3+width_+idx).set_name("Result", idx);
       }
 
       for (unsigned idx = 0 ;  idx < width_dist_ ;  idx += 1) {
-	    pin(3+2*width_+idx).set_dir(NetObj::Link::INPUT);
+	    pin(3+2*width_+idx).set_dir(Link::INPUT);
 	    pin(3+2*width_+idx).set_name("Distance", idx);
       }
 }
@@ -746,67 +783,67 @@ unsigned NetCLShift::width_dist() const
       return width_dist_;
 }
 
-NetObj::Link& NetCLShift::pin_Direction()
+Link& NetCLShift::pin_Direction()
 {
       return pin(0);
 }
 
-const NetObj::Link& NetCLShift::pin_Direction() const
+const Link& NetCLShift::pin_Direction() const
 {
       return pin(0);
 }
 
-NetObj::Link& NetCLShift::pin_Underflow()
+Link& NetCLShift::pin_Underflow()
 {
       return pin(1);
 }
 
-const NetObj::Link& NetCLShift::pin_Underflow() const
+const Link& NetCLShift::pin_Underflow() const
 {
       return pin(1);
 }
 
-NetObj::Link& NetCLShift::pin_Overflow()
+Link& NetCLShift::pin_Overflow()
 {
       return pin(2);
 }
 
-const NetObj::Link& NetCLShift::pin_Overflow() const
+const Link& NetCLShift::pin_Overflow() const
 {
       return pin(2);
 }
 
-NetObj::Link& NetCLShift::pin_Data(unsigned idx)
+Link& NetCLShift::pin_Data(unsigned idx)
 {
       assert(idx < width_);
       return pin(3+idx);
 }
 
-const NetObj::Link& NetCLShift::pin_Data(unsigned idx) const
+const Link& NetCLShift::pin_Data(unsigned idx) const
 {
       assert(idx < width_);
       return pin(3+idx);
 }
 
-NetObj::Link& NetCLShift::pin_Result(unsigned idx)
+Link& NetCLShift::pin_Result(unsigned idx)
 {
       assert(idx < width_);
       return pin(3+width_+idx);
 }
 
-const NetObj::Link& NetCLShift::pin_Result(unsigned idx) const
+const Link& NetCLShift::pin_Result(unsigned idx) const
 {
       assert(idx < width_);
       return pin(3+width_+idx);
 }
 
-NetObj::Link& NetCLShift::pin_Distance(unsigned idx)
+Link& NetCLShift::pin_Distance(unsigned idx)
 {
       assert(idx < width_dist_);
       return pin(3+2*width_+idx);
 }
 
-const NetObj::Link& NetCLShift::pin_Distance(unsigned idx) const
+const Link& NetCLShift::pin_Distance(unsigned idx) const
 {
       assert(idx < width_dist_);
       return pin(3+2*width_+idx);
@@ -815,18 +852,18 @@ const NetObj::Link& NetCLShift::pin_Distance(unsigned idx) const
 NetCompare::NetCompare(const string&n, unsigned wi)
 : NetNode(n, 8+2*wi), width_(wi)
 {
-      pin(0).set_dir(NetObj::Link::INPUT); pin(0).set_name("Aclr");
-      pin(1).set_dir(NetObj::Link::INPUT); pin(1).set_name("Clock");
-      pin(2).set_dir(NetObj::Link::OUTPUT); pin(2).set_name("AGB");
-      pin(3).set_dir(NetObj::Link::OUTPUT); pin(3).set_name("AGEB");
-      pin(4).set_dir(NetObj::Link::OUTPUT); pin(4).set_name("AEB");
-      pin(5).set_dir(NetObj::Link::OUTPUT); pin(5).set_name("ANEB");
-      pin(6).set_dir(NetObj::Link::OUTPUT); pin(6).set_name("ALB");
-      pin(7).set_dir(NetObj::Link::OUTPUT); pin(7).set_name("ALEB");
+      pin(0).set_dir(Link::INPUT); pin(0).set_name("Aclr");
+      pin(1).set_dir(Link::INPUT); pin(1).set_name("Clock");
+      pin(2).set_dir(Link::OUTPUT); pin(2).set_name("AGB");
+      pin(3).set_dir(Link::OUTPUT); pin(3).set_name("AGEB");
+      pin(4).set_dir(Link::OUTPUT); pin(4).set_name("AEB");
+      pin(5).set_dir(Link::OUTPUT); pin(5).set_name("ANEB");
+      pin(6).set_dir(Link::OUTPUT); pin(6).set_name("ALB");
+      pin(7).set_dir(Link::OUTPUT); pin(7).set_name("ALEB");
       for (unsigned idx = 0 ;  idx < width_ ;  idx += 1) {
-	    pin(8+idx).set_dir(NetObj::Link::INPUT);
+	    pin(8+idx).set_dir(Link::INPUT);
 	    pin(8+idx).set_name("DataA", idx);
-	    pin(8+width_+idx).set_dir(NetObj::Link::INPUT);
+	    pin(8+width_+idx).set_dir(Link::INPUT);
 	    pin(8+width_+idx).set_name("DataB", idx);
       }
 }
@@ -840,102 +877,102 @@ unsigned NetCompare::width() const
       return width_;
 }
 
-NetObj::Link& NetCompare::pin_Aclr()
+Link& NetCompare::pin_Aclr()
 {
       return pin(0);
 }
 
-const NetObj::Link& NetCompare::pin_Aclr() const
+const Link& NetCompare::pin_Aclr() const
 {
       return pin(0);
 }
 
-NetObj::Link& NetCompare::pin_Clock()
+Link& NetCompare::pin_Clock()
 {
       return pin(1);
 }
 
-const NetObj::Link& NetCompare::pin_Clock() const
+const Link& NetCompare::pin_Clock() const
 {
       return pin(1);
 }
 
-NetObj::Link& NetCompare::pin_AGB()
+Link& NetCompare::pin_AGB()
 {
       return pin(2);
 }
 
-const NetObj::Link& NetCompare::pin_AGB() const
+const Link& NetCompare::pin_AGB() const
 {
       return pin(2);
 }
 
-NetObj::Link& NetCompare::pin_AGEB()
+Link& NetCompare::pin_AGEB()
 {
       return pin(3);
 }
 
-const NetObj::Link& NetCompare::pin_AGEB() const
+const Link& NetCompare::pin_AGEB() const
 {
       return pin(3);
 }
 
-NetObj::Link& NetCompare::pin_AEB()
+Link& NetCompare::pin_AEB()
 {
       return pin(4);
 }
 
-const NetObj::Link& NetCompare::pin_AEB() const
+const Link& NetCompare::pin_AEB() const
 {
       return pin(4);
 }
 
-NetObj::Link& NetCompare::pin_ANEB()
+Link& NetCompare::pin_ANEB()
 {
       return pin(5);
 }
 
-const NetObj::Link& NetCompare::pin_ANEB() const
+const Link& NetCompare::pin_ANEB() const
 {
       return pin(5);
 }
 
-NetObj::Link& NetCompare::pin_ALB()
+Link& NetCompare::pin_ALB()
 {
       return pin(6);
 }
 
-const NetObj::Link& NetCompare::pin_ALB() const
+const Link& NetCompare::pin_ALB() const
 {
       return pin(6);
 }
 
-NetObj::Link& NetCompare::pin_ALEB()
+Link& NetCompare::pin_ALEB()
 {
       return pin(7);
 }
 
-const NetObj::Link& NetCompare::pin_ALEB() const
+const Link& NetCompare::pin_ALEB() const
 {
       return pin(7);
 }
 
-NetObj::Link& NetCompare::pin_DataA(unsigned idx)
+Link& NetCompare::pin_DataA(unsigned idx)
 {
       return pin(8+idx);
 }
 
-const NetObj::Link& NetCompare::pin_DataA(unsigned idx) const
+const Link& NetCompare::pin_DataA(unsigned idx) const
 {
       return pin(8+idx);
 }
 
-NetObj::Link& NetCompare::pin_DataB(unsigned idx)
+Link& NetCompare::pin_DataB(unsigned idx)
 {
       return pin(8+width_+idx);
 }
 
-const NetObj::Link& NetCompare::pin_DataB(unsigned idx) const
+const Link& NetCompare::pin_DataB(unsigned idx) const
 {
       return pin(8+width_+idx);
 }
@@ -946,15 +983,15 @@ NetDivide::NetDivide(const string&n, unsigned wr,
 {
       unsigned p = 0;
       for (unsigned idx = 0 ;  idx < width_r_ ;  idx += 1, p += 1) {
-	    pin(p).set_dir(NetObj::Link::OUTPUT);
+	    pin(p).set_dir(Link::OUTPUT);
 	    pin(p).set_name("Result", idx);
       }
       for (unsigned idx = 0 ;  idx < width_a_ ;  idx += 1, p += 1) {
-	    pin(p).set_dir(NetObj::Link::INPUT);
+	    pin(p).set_dir(Link::INPUT);
 	    pin(p).set_name("DataA", idx);
       }
       for (unsigned idx = 0 ;  idx < width_b_ ;  idx += 1, p += 1) {
-	    pin(p).set_dir(NetObj::Link::INPUT);
+	    pin(p).set_dir(Link::INPUT);
 	    pin(p).set_name("DataB", idx);
       }
 }
@@ -978,37 +1015,37 @@ unsigned NetDivide::width_b() const
       return width_b_;
 }
 
-NetObj::Link& NetDivide::pin_Result(unsigned idx)
+Link& NetDivide::pin_Result(unsigned idx)
 {
       assert(idx < width_r_);
       return pin(idx);
 }
 
-const NetObj::Link& NetDivide::pin_Result(unsigned idx) const
+const Link& NetDivide::pin_Result(unsigned idx) const
 {
       assert(idx < width_r_);
       return pin(idx);
 }
 
-NetObj::Link& NetDivide::pin_DataA(unsigned idx)
+Link& NetDivide::pin_DataA(unsigned idx)
 {
       assert(idx < width_a_);
       return pin(idx+width_r_);
 }
 
-const NetObj::Link& NetDivide::pin_DataA(unsigned idx) const
+const Link& NetDivide::pin_DataA(unsigned idx) const
 {
       assert(idx < width_a_);
       return pin(idx+width_r_);
 }
 
-NetObj::Link& NetDivide::pin_DataB(unsigned idx)
+Link& NetDivide::pin_DataB(unsigned idx)
 {
       assert(idx < width_b_);
       return pin(idx+width_r_+width_a_);
 }
 
-const NetObj::Link& NetDivide::pin_DataB(unsigned idx) const
+const Link& NetDivide::pin_DataB(unsigned idx) const
 {
       assert(idx < width_b_);
       return pin(idx+width_r_+width_a_);
@@ -1019,25 +1056,25 @@ NetMult::NetMult(const string&n, unsigned wr, unsigned wa, unsigned wb,
 : NetNode(n, 2+wr+wa+wb+ws), width_r_(wr), width_a_(wa), width_b_(wb),
     width_s_(ws)
 {
-      pin(0).set_dir(NetObj::Link::INPUT); pin(0).set_name("Aclr", 0);
-      pin(1).set_dir(NetObj::Link::INPUT); pin(1).set_name("Clock", 0);
+      pin(0).set_dir(Link::INPUT); pin(0).set_name("Aclr", 0);
+      pin(1).set_dir(Link::INPUT); pin(1).set_name("Clock", 0);
 
 
       unsigned p = 2;
       for (unsigned idx = 0 ;  idx < width_r_ ;  idx += 1, p += 1) {
-	    pin(p).set_dir(NetObj::Link::OUTPUT);
+	    pin(p).set_dir(Link::OUTPUT);
 	    pin(p).set_name("Result", idx);
       }
       for (unsigned idx = 0 ;  idx < width_a_ ;  idx += 1, p += 1) {
-	    pin(p).set_dir(NetObj::Link::INPUT);
+	    pin(p).set_dir(Link::INPUT);
 	    pin(p).set_name("DataA", idx);
       }
       for (unsigned idx = 0 ;  idx < width_b_ ;  idx += 1, p += 1) {
-	    pin(p).set_dir(NetObj::Link::INPUT);
+	    pin(p).set_dir(Link::INPUT);
 	    pin(p).set_name("DataB", idx);
       }
       for (unsigned idx = 0 ;  idx < width_s_ ;  idx += 1, p += 1) {
-	    pin(p).set_dir(NetObj::Link::INPUT);
+	    pin(p).set_dir(Link::INPUT);
 	    pin(p).set_name("Sum", idx);
       }
 }
@@ -1066,69 +1103,69 @@ unsigned NetMult::width_s() const
       return width_s_;
 }
 
-NetObj::Link& NetMult::pin_Aclr()
+Link& NetMult::pin_Aclr()
 {
       return pin(0);
 }
 
-const NetObj::Link& NetMult::pin_Aclr() const
+const Link& NetMult::pin_Aclr() const
 {
       return pin(0);
 }
 
-NetObj::Link& NetMult::pin_Clock()
+Link& NetMult::pin_Clock()
 {
       return pin(1);
 }
 
-const NetObj::Link& NetMult::pin_Clock() const
+const Link& NetMult::pin_Clock() const
 {
       return pin(1);
 }
 
-NetObj::Link& NetMult::pin_Result(unsigned idx)
+Link& NetMult::pin_Result(unsigned idx)
 {
       assert(idx < width_r_);
       return pin(idx+2);
 }
 
-const NetObj::Link& NetMult::pin_Result(unsigned idx) const
+const Link& NetMult::pin_Result(unsigned idx) const
 {
       assert(idx < width_r_);
       return pin(idx+2);
 }
 
-NetObj::Link& NetMult::pin_DataA(unsigned idx)
+Link& NetMult::pin_DataA(unsigned idx)
 {
       assert(idx < width_a_);
       return pin(idx+2+width_r_);
 }
 
-const NetObj::Link& NetMult::pin_DataA(unsigned idx) const
+const Link& NetMult::pin_DataA(unsigned idx) const
 {
       assert(idx < width_a_);
       return pin(idx+2+width_r_);
 }
 
-NetObj::Link& NetMult::pin_DataB(unsigned idx)
+Link& NetMult::pin_DataB(unsigned idx)
 {
       assert(idx < width_b_);
       return pin(idx+2+width_r_+width_a_);
 }
 
-const NetObj::Link& NetMult::pin_DataB(unsigned idx) const
+const Link& NetMult::pin_DataB(unsigned idx) const
 {
       assert(idx < width_b_);
       return pin(idx+2+width_r_+width_a_);
 }
 
-NetObj::Link& NetMult::pin_Sum(unsigned idx)
+Link& NetMult::pin_Sum(unsigned idx)
 {
       assert(idx < width_s_);
       return pin(idx+2+width_r_+width_a_+width_b_);
 }
 
-const NetObj::Link& NetMult::pin_Sum(unsigned idx) const
+const Link& NetMult::pin_Sum(unsigned idx) const
 {
       assert(idx < width_s_);
       return pin(idx+2+width_r_+width_a_+width_b_);
@@ -1146,11 +1183,11 @@ const NetObj::Link& NetMult::pin_Sum(unsigned idx) const
 NetMux::NetMux(const string&n, unsigned wi, unsigned si, unsigned sw)
 : NetNode(n, 2+wi+sw+wi*si), width_(wi), size_(si), swidth_(sw)
 {
-      pin(0).set_dir(NetObj::Link::INPUT); pin(0).set_name("Aclr",  0);
-      pin(1).set_dir(NetObj::Link::INPUT); pin(1).set_name("Clock", 0);
+      pin(0).set_dir(Link::INPUT); pin(0).set_name("Aclr",  0);
+      pin(1).set_dir(Link::INPUT); pin(1).set_name("Clock", 0);
 
       for (unsigned idx = 0 ;  idx < width_ ;  idx += 1) {
-	    pin_Result(idx).set_dir(NetObj::Link::OUTPUT);
+	    pin_Result(idx).set_dir(Link::OUTPUT);
 	    pin_Result(idx).set_name("Result", idx);
 
 	    for (unsigned jdx = 0 ;  jdx < size_ ;  jdx += 1) {
@@ -1184,58 +1221,58 @@ unsigned NetMux::sel_width() const
       return swidth_;
 }
 
-NetObj::Link& NetMux::pin_Aclr()
+Link& NetMux::pin_Aclr()
 {
       return pin(0);
 }
 
-const NetObj::Link& NetMux::pin_Aclr() const
+const Link& NetMux::pin_Aclr() const
 {
       return pin(0);
 }
 
-NetObj::Link& NetMux::pin_Clock()
+Link& NetMux::pin_Clock()
 {
       return pin(1);
 }
 
-const NetObj::Link& NetMux::pin_Clock() const
+const Link& NetMux::pin_Clock() const
 {
       return pin(1);
 }
 
-NetObj::Link& NetMux::pin_Result(unsigned w)
+Link& NetMux::pin_Result(unsigned w)
 {
       assert(w < width_);
       return pin(2+w);
 }
 
-const NetObj::Link& NetMux::pin_Result(unsigned w) const
+const Link& NetMux::pin_Result(unsigned w) const
 {
       assert(w < width_);
       return pin(2+w);
 }
 
-NetObj::Link& NetMux::pin_Sel(unsigned w)
+Link& NetMux::pin_Sel(unsigned w)
 {
       assert(w < swidth_);
       return pin(2+width_+w);
 }
 
-const NetObj::Link& NetMux::pin_Sel(unsigned w) const
+const Link& NetMux::pin_Sel(unsigned w) const
 {
       assert(w < swidth_);
       return pin(2+width_+w);
 }
 
-NetObj::Link& NetMux::pin_Data(unsigned w, unsigned s)
+Link& NetMux::pin_Data(unsigned w, unsigned s)
 {
       assert(w < width_);
       assert(s < size_);
       return pin(2+width_+swidth_+s*width_+w);
 }
 
-const NetObj::Link& NetMux::pin_Data(unsigned w, unsigned s) const
+const Link& NetMux::pin_Data(unsigned w, unsigned s) const
 {
       assert(w < width_);
       assert(s < size_);
@@ -1246,22 +1283,22 @@ const NetObj::Link& NetMux::pin_Data(unsigned w, unsigned s) const
 NetRamDq::NetRamDq(const string&n, NetMemory*mem, unsigned awid)
 : NetNode(n, 3+2*mem->width()+awid), mem_(mem), awidth_(awid)
 {
-      pin(0).set_dir(NetObj::Link::INPUT); pin(0).set_name("InClock", 0);
-      pin(1).set_dir(NetObj::Link::INPUT); pin(1).set_name("OutClock", 0);
-      pin(2).set_dir(NetObj::Link::INPUT); pin(2).set_name("WE", 0);
+      pin(0).set_dir(Link::INPUT); pin(0).set_name("InClock", 0);
+      pin(1).set_dir(Link::INPUT); pin(1).set_name("OutClock", 0);
+      pin(2).set_dir(Link::INPUT); pin(2).set_name("WE", 0);
 
       for (unsigned idx = 0 ;  idx < awidth_ ;  idx += 1) {
-	    pin(3+idx).set_dir(NetObj::Link::INPUT);
+	    pin(3+idx).set_dir(Link::INPUT);
 	    pin(3+idx).set_name("Address", idx);
       }
 
       for (unsigned idx = 0 ;  idx < width() ;  idx += 1) {
-	    pin(3+awidth_+idx).set_dir(NetObj::Link::INPUT);
+	    pin(3+awidth_+idx).set_dir(Link::INPUT);
 	    pin(3+awidth_+idx).set_name("Data", idx);
       }
 
       for (unsigned idx = 0 ;  idx < width() ;  idx += 1) {
-	    pin(3+awidth_+width()+idx).set_dir(NetObj::Link::OUTPUT);
+	    pin(3+awidth_+width()+idx).set_dir(Link::OUTPUT);
 	    pin(3+awidth_+width()+idx).set_name("Q", idx);
       }
 
@@ -1381,67 +1418,67 @@ void NetRamDq::absorb_partners()
       }
 }
 
-NetObj::Link& NetRamDq::pin_InClock()
+Link& NetRamDq::pin_InClock()
 {
       return pin(0);
 }
 
-const NetObj::Link& NetRamDq::pin_InClock() const
+const Link& NetRamDq::pin_InClock() const
 {
       return pin(0);
 }
 
-NetObj::Link& NetRamDq::pin_OutClock()
+Link& NetRamDq::pin_OutClock()
 {
       return pin(1);
 }
 
-const NetObj::Link& NetRamDq::pin_OutClock() const
+const Link& NetRamDq::pin_OutClock() const
 {
       return pin(1);
 }
 
-NetObj::Link& NetRamDq::pin_WE()
+Link& NetRamDq::pin_WE()
 {
       return pin(2);
 }
 
-const NetObj::Link& NetRamDq::pin_WE() const
+const Link& NetRamDq::pin_WE() const
 {
       return pin(2);
 }
 
-NetObj::Link& NetRamDq::pin_Address(unsigned idx)
+Link& NetRamDq::pin_Address(unsigned idx)
 {
       assert(idx < awidth_);
       return pin(3+idx);
 }
 
-const NetObj::Link& NetRamDq::pin_Address(unsigned idx) const
+const Link& NetRamDq::pin_Address(unsigned idx) const
 {
       assert(idx < awidth_);
       return pin(3+idx);
 }
 
-NetObj::Link& NetRamDq::pin_Data(unsigned idx)
+Link& NetRamDq::pin_Data(unsigned idx)
 {
       assert(idx < width());
       return pin(3+awidth_+idx);
 }
 
-const NetObj::Link& NetRamDq::pin_Data(unsigned idx) const
+const Link& NetRamDq::pin_Data(unsigned idx) const
 {
       assert(idx < width());
       return pin(3+awidth_+idx);
 }
 
-NetObj::Link& NetRamDq::pin_Q(unsigned idx)
+Link& NetRamDq::pin_Q(unsigned idx)
 {
       assert(idx < width());
       return pin(3+awidth_+width()+idx);
 }
 
-const NetObj::Link& NetRamDq::pin_Q(unsigned idx) const
+const Link& NetRamDq::pin_Q(unsigned idx) const
 {
       assert(idx < width());
       return pin(3+awidth_+width()+idx);
@@ -1455,7 +1492,7 @@ NetAssign_::NetAssign_(const string&n, unsigned w)
 : NetNode(n, w), rval_(0), bmux_(0)
 {
       for (unsigned idx = 0 ;  idx < pin_count() ;  idx += 1) {
-	    pin(idx).set_dir(NetObj::Link::OUTPUT);
+	    pin(idx).set_dir(Link::OUTPUT);
 	    pin(idx).set_name("P", idx);
       }
 
@@ -1756,7 +1793,7 @@ NetForce::~NetForce()
 {
 }
 
-const NetObj::Link& NetForce::lval_pin(unsigned idx) const
+const Link& NetForce::lval_pin(unsigned idx) const
 {
       assert(idx < lval_->pin_count());
       return lval_->pin(idx);
@@ -2234,7 +2271,7 @@ unsigned NetESignal::pin_count() const
       return net_->pin_count();
 }
 
-NetObj::Link& NetESignal::pin(unsigned idx)
+Link& NetESignal::pin(unsigned idx)
 {
       return net_->pin(idx);
 }
@@ -2567,6 +2604,14 @@ bool NetUDP::sequ_glob_(string input, char output)
 
 /*
  * $Log: netlist.cc,v $
+ * Revision 1.123  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.122  2000/05/04 03:37:58  steve
  *  Add infrastructure for system functions, move
  *  $time to that structure and add $random.
diff --git a/netlist.h b/netlist.h
index 6bacaddf1..0f46e6d0a 100644
--- a/netlist.h
+++ b/netlist.h
@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: netlist.h,v 1.135 2000/05/04 03:37:58 steve Exp $"
+#ident "$Id: netlist.h,v 1.136 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 /*
@@ -35,6 +35,7 @@
 # include  "svector.h"
 
 class Design;
+class Link;
 class NetNode;
 class NetProc;
 class NetProcTop;
@@ -70,78 +71,6 @@ struct functor_t;
 class NetObj {
 
     public:
-      class Link {
-	    friend void connect(Link&, Link&);
-	    friend class NetObj;
-
-	  public:
-	    enum DIR { PASSIVE, INPUT, OUTPUT };
-	    Link();
-	    ~Link();
-
-	      // Manipulate the link direction.
-	    void set_dir(DIR d) { dir_ = d; }
-	    DIR get_dir() const { return dir_; }
-
-	    void cur_link(NetObj*&net, unsigned &pin)
-		  { net = node_;
-		    pin = pin_;
-		  }
-
-	    void next_link(NetObj*&net, unsigned&pin);
-	    void next_link(const NetObj*&net, unsigned&pin) const;
-
-	    Link* next_link();
-	    const Link* next_link() const;
-
-	      // Remove this link from the set of connected pins. The
-	      // destructor will automatically do this if needed.
-	    void unlink();
-
-	      // Return true if this link is connected to anything else.
-	    bool is_linked() const;
-
-	      // Return true if these pins are connected.
-	    bool is_linked(const NetObj::Link&that) const;
-
-	      // Return true if this link is connected to any pin of r.
-	    bool is_linked(const NetObj&r) const;
-
-	    bool is_equal(const NetObj::Link&that) const
-		  { return (node_ == that.node_) && (pin_ == that.pin_); }
-
-	      // Return information about the object that this link is
-	      // a part of.
-	    const NetObj*get_obj() const;
-	    NetObj*get_obj();
-	    unsigned get_pin() const;
-
-	    void set_name(const string&, unsigned inst =0);
-	    const string& get_name() const;
-	    unsigned get_inst() const;
-
-	  private:
-	      // The NetNode manages these. They point back to the
-	      // NetNode so that following the links can get me here.
-	    NetObj *node_;
-	    unsigned pin_;
-	    DIR dir_;
-
-	      // These members name the pin of the link. If the name
-	      // has width, then the ninst_ member is the index of the
-	      // pin.
-	    string   name_;
-	    unsigned inst_;
-
-	  private:
-	    Link *next_;
-	    Link *prev_;
-
-	  private: // not implemented
-	    Link(const Link&);
-	    Link& operator= (const Link&);
-      };
-
     public:
       explicit NetObj(const string&n, unsigned npins);
       virtual ~NetObj();
@@ -188,6 +117,86 @@ class NetObj {
       bool mark_;
 };
 
+class Link {
+      friend void connect(Link&, Link&);
+      friend class NetObj;
+
+    public:
+      enum DIR { PASSIVE, INPUT, OUTPUT };
+
+      enum strength_t { HIGHZ, WEAK, PULL, STRONG, SUPPLY };
+
+      Link();
+      ~Link();
+
+	// Manipulate the link direction.
+      void set_dir(DIR d);
+      DIR get_dir() const;
+
+      void drive0(strength_t);
+      void drive1(strength_t);
+
+      strength_t drive0() const;
+      strength_t drive1() const;
+
+      void cur_link(NetObj*&net, unsigned &pin);
+
+      void next_link(NetObj*&net, unsigned&pin);
+      void next_link(const NetObj*&net, unsigned&pin) const;
+
+      Link* next_link();
+      const Link* next_link() const;
+
+	// Remove this link from the set of connected pins. The
+	// destructor will automatically do this if needed.
+      void unlink();
+
+	// Return true if this link is connected to anything else.
+      bool is_linked() const;
+
+	// Return true if these pins are connected.
+      bool is_linked(const Link&that) const;
+
+	// Return true if this link is connected to any pin of r.
+      bool is_linked(const NetObj&r) const;
+
+      bool is_equal(const Link&that) const
+      { return (node_ == that.node_) && (pin_ == that.pin_); }
+
+	// Return information about the object that this link is
+	// a part of.
+      const NetObj*get_obj() const;
+      NetObj*get_obj();
+      unsigned get_pin() const;
+
+      void set_name(const string&, unsigned inst =0);
+      const string& get_name() const;
+      unsigned get_inst() const;
+
+    private:
+	// The NetNode manages these. They point back to the
+	// NetNode so that following the links can get me here.
+      NetObj *node_;
+      unsigned pin_;
+
+      DIR dir_;
+      strength_t drive0_, drive1_;
+
+	// These members name the pin of the link. If the name
+	// has width, then the ninst_ member is the index of the
+	// pin.
+      string   name_;
+      unsigned inst_;
+
+    private:
+      Link *next_;
+      Link *prev_;
+
+    private: // not implemented
+      Link(const Link&);
+      Link& operator= (const Link&);
+};
+
 /*
  * A NetNode is a device of some sort, where each pin has a different
  * meaning. (i.e. pin(0) is the output to an and gate.) NetNode
@@ -310,21 +319,21 @@ class NetAddSub  : public NetNode {
 	// operands and results.)
       unsigned width() const;
 
-      NetObj::Link& pin_Aclr();
-      NetObj::Link& pin_Add_Sub();
-      NetObj::Link& pin_Clock();
-      NetObj::Link& pin_Cin();
-      NetObj::Link& pin_Cout();
-      NetObj::Link& pin_Overflow();
+      Link& pin_Aclr();
+      Link& pin_Add_Sub();
+      Link& pin_Clock();
+      Link& pin_Cin();
+      Link& pin_Cout();
+      Link& pin_Overflow();
 
-      NetObj::Link& pin_DataA(unsigned idx);
-      NetObj::Link& pin_DataB(unsigned idx);
-      NetObj::Link& pin_Result(unsigned idx);
+      Link& pin_DataA(unsigned idx);
+      Link& pin_DataB(unsigned idx);
+      Link& pin_Result(unsigned idx);
 
-      const NetObj::Link& pin_Cout() const;
-      const NetObj::Link& pin_DataA(unsigned idx) const;
-      const NetObj::Link& pin_DataB(unsigned idx) const;
-      const NetObj::Link& pin_Result(unsigned idx) const;
+      const Link& pin_Cout() const;
+      const Link& pin_DataA(unsigned idx) const;
+      const Link& pin_DataB(unsigned idx) const;
+      const Link& pin_Result(unsigned idx) const;
 
       virtual void dump_node(ostream&, unsigned ind) const;
       virtual void emit_node(ostream&, struct target_t*) const;
@@ -343,19 +352,19 @@ class NetCLShift  : public NetNode {
       unsigned width() const;
       unsigned width_dist() const;
 
-      NetObj::Link& pin_Direction();
-      NetObj::Link& pin_Underflow();
-      NetObj::Link& pin_Overflow();
-      NetObj::Link& pin_Data(unsigned idx);
-      NetObj::Link& pin_Result(unsigned idx);
-      NetObj::Link& pin_Distance(unsigned idx);
+      Link& pin_Direction();
+      Link& pin_Underflow();
+      Link& pin_Overflow();
+      Link& pin_Data(unsigned idx);
+      Link& pin_Result(unsigned idx);
+      Link& pin_Distance(unsigned idx);
 
-      const NetObj::Link& pin_Direction() const;
-      const NetObj::Link& pin_Underflow() const;
-      const NetObj::Link& pin_Overflow() const;
-      const NetObj::Link& pin_Data(unsigned idx) const;
-      const NetObj::Link& pin_Result(unsigned idx) const;
-      const NetObj::Link& pin_Distance(unsigned idx) const;
+      const Link& pin_Direction() const;
+      const Link& pin_Underflow() const;
+      const Link& pin_Overflow() const;
+      const Link& pin_Data(unsigned idx) const;
+      const Link& pin_Result(unsigned idx) const;
+      const Link& pin_Distance(unsigned idx) const;
 
       virtual void dump_node(ostream&, unsigned ind) const;
       virtual void emit_node(ostream&, struct target_t*) const;
@@ -380,29 +389,29 @@ class NetCompare  : public NetNode {
 
       unsigned width() const;
 
-      NetObj::Link& pin_Aclr();
-      NetObj::Link& pin_Clock();
-      NetObj::Link& pin_AGB();
-      NetObj::Link& pin_AGEB();
-      NetObj::Link& pin_AEB();
-      NetObj::Link& pin_ANEB();
-      NetObj::Link& pin_ALB();
-      NetObj::Link& pin_ALEB();
+      Link& pin_Aclr();
+      Link& pin_Clock();
+      Link& pin_AGB();
+      Link& pin_AGEB();
+      Link& pin_AEB();
+      Link& pin_ANEB();
+      Link& pin_ALB();
+      Link& pin_ALEB();
 
-      NetObj::Link& pin_DataA(unsigned idx);
-      NetObj::Link& pin_DataB(unsigned idx);
+      Link& pin_DataA(unsigned idx);
+      Link& pin_DataB(unsigned idx);
 
-      const NetObj::Link& pin_Aclr() const;
-      const NetObj::Link& pin_Clock() const;
-      const NetObj::Link& pin_AGB() const;
-      const NetObj::Link& pin_AGEB() const;
-      const NetObj::Link& pin_AEB() const;
-      const NetObj::Link& pin_ANEB() const;
-      const NetObj::Link& pin_ALB() const;
-      const NetObj::Link& pin_ALEB() const;
+      const Link& pin_Aclr() const;
+      const Link& pin_Clock() const;
+      const Link& pin_AGB() const;
+      const Link& pin_AGEB() const;
+      const Link& pin_AEB() const;
+      const Link& pin_ANEB() const;
+      const Link& pin_ALB() const;
+      const Link& pin_ALEB() const;
 
-      const NetObj::Link& pin_DataA(unsigned idx) const;
-      const NetObj::Link& pin_DataB(unsigned idx) const;
+      const Link& pin_DataA(unsigned idx) const;
+      const Link& pin_DataB(unsigned idx) const;
 
       virtual void functor_node(Design*, functor_t*);
       virtual void dump_node(ostream&, unsigned ind) const;
@@ -432,13 +441,13 @@ class NetDivide  : public NetNode {
       unsigned width_a() const;
       unsigned width_b() const;
 
-      NetObj::Link& pin_DataA(unsigned idx);
-      NetObj::Link& pin_DataB(unsigned idx);
-      NetObj::Link& pin_Result(unsigned idx);
+      Link& pin_DataA(unsigned idx);
+      Link& pin_DataB(unsigned idx);
+      Link& pin_Result(unsigned idx);
 
-      const NetObj::Link& pin_DataA(unsigned idx) const;
-      const NetObj::Link& pin_DataB(unsigned idx) const;
-      const NetObj::Link& pin_Result(unsigned idx) const;
+      const Link& pin_DataA(unsigned idx) const;
+      const Link& pin_DataB(unsigned idx) const;
+      const Link& pin_Result(unsigned idx) const;
 
       virtual void dump_node(ostream&, unsigned ind) const;
       virtual void emit_node(ostream&, struct target_t*) const;
@@ -462,22 +471,22 @@ class NetFF  : public NetNode {
 
       unsigned width() const;
 
-      NetObj::Link& pin_Clock();
-      NetObj::Link& pin_Enable();
-      NetObj::Link& pin_Aload();
-      NetObj::Link& pin_Aset();
-      NetObj::Link& pin_Aclr();
-      NetObj::Link& pin_Sload();
-      NetObj::Link& pin_Sset();
-      NetObj::Link& pin_Sclr();
+      Link& pin_Clock();
+      Link& pin_Enable();
+      Link& pin_Aload();
+      Link& pin_Aset();
+      Link& pin_Aclr();
+      Link& pin_Sload();
+      Link& pin_Sset();
+      Link& pin_Sclr();
 
-      NetObj::Link& pin_Data(unsigned);
-      NetObj::Link& pin_Q(unsigned);
+      Link& pin_Data(unsigned);
+      Link& pin_Q(unsigned);
 
-      const NetObj::Link& pin_Clock() const;
-      const NetObj::Link& pin_Enable() const;
-      const NetObj::Link& pin_Data(unsigned) const;
-      const NetObj::Link& pin_Q(unsigned) const;
+      const Link& pin_Clock() const;
+      const Link& pin_Enable() const;
+      const Link& pin_Data(unsigned) const;
+      const Link& pin_Q(unsigned) const;
 
       virtual void dump_node(ostream&, unsigned ind) const;
       virtual void emit_node(ostream&, struct target_t*) const;
@@ -560,21 +569,21 @@ class NetMult  : public NetNode {
       unsigned width_b() const; // DataB
       unsigned width_s() const; // Sum (my be 0)
 
-      NetObj::Link& pin_Aclr();
-      NetObj::Link& pin_Clock();
+      Link& pin_Aclr();
+      Link& pin_Clock();
 
-      NetObj::Link& pin_DataA(unsigned idx);
-      NetObj::Link& pin_DataB(unsigned idx);
-      NetObj::Link& pin_Result(unsigned idx);
-      NetObj::Link& pin_Sum(unsigned idx);
+      Link& pin_DataA(unsigned idx);
+      Link& pin_DataB(unsigned idx);
+      Link& pin_Result(unsigned idx);
+      Link& pin_Sum(unsigned idx);
 
-      const NetObj::Link& pin_Aclr() const;
-      const NetObj::Link& pin_Clock() const;
+      const Link& pin_Aclr() const;
+      const Link& pin_Clock() const;
 
-      const NetObj::Link& pin_DataA(unsigned idx) const;
-      const NetObj::Link& pin_DataB(unsigned idx) const;
-      const NetObj::Link& pin_Result(unsigned idx) const;
-      const NetObj::Link& pin_Sum(unsigned idx) const;
+      const Link& pin_DataA(unsigned idx) const;
+      const Link& pin_DataB(unsigned idx) const;
+      const Link& pin_Result(unsigned idx) const;
+      const Link& pin_Sum(unsigned idx) const;
 
       virtual void dump_node(ostream&, unsigned ind) const;
       virtual void emit_node(ostream&, struct target_t*) const;
@@ -608,19 +617,19 @@ class NetMux  : public NetNode {
       unsigned size() const;
       unsigned sel_width() const;
 
-      NetObj::Link& pin_Aclr();
-      NetObj::Link& pin_Clock();
+      Link& pin_Aclr();
+      Link& pin_Clock();
 
-      NetObj::Link& pin_Result(unsigned);
-      NetObj::Link& pin_Data(unsigned wi, unsigned si);
-      NetObj::Link& pin_Sel(unsigned);
+      Link& pin_Result(unsigned);
+      Link& pin_Data(unsigned wi, unsigned si);
+      Link& pin_Sel(unsigned);
 
-      const NetObj::Link& pin_Aclr() const;
-      const NetObj::Link& pin_Clock() const;
+      const Link& pin_Aclr() const;
+      const Link& pin_Clock() const;
 
-      const NetObj::Link& pin_Result(unsigned) const;
-      const NetObj::Link& pin_Data(unsigned, unsigned) const;
-      const NetObj::Link& pin_Sel(unsigned) const;
+      const Link& pin_Result(unsigned) const;
+      const Link& pin_Data(unsigned, unsigned) const;
+      const Link& pin_Sel(unsigned) const;
 
       virtual void dump_node(ostream&, unsigned ind) const;
       virtual void emit_node(ostream&, struct target_t*) const;
@@ -648,21 +657,21 @@ class NetRamDq  : public NetNode {
       unsigned size() const;
       const NetMemory*mem() const;
 
-      NetObj::Link& pin_InClock();
-      NetObj::Link& pin_OutClock();
-      NetObj::Link& pin_WE();
+      Link& pin_InClock();
+      Link& pin_OutClock();
+      Link& pin_WE();
 
-      NetObj::Link& pin_Address(unsigned idx);
-      NetObj::Link& pin_Data(unsigned idx);
-      NetObj::Link& pin_Q(unsigned idx);
+      Link& pin_Address(unsigned idx);
+      Link& pin_Data(unsigned idx);
+      Link& pin_Q(unsigned idx);
 
-      const NetObj::Link& pin_InClock() const;
-      const NetObj::Link& pin_OutClock() const;
-      const NetObj::Link& pin_WE() const;
+      const Link& pin_InClock() const;
+      const Link& pin_OutClock() const;
+      const Link& pin_WE() const;
 
-      const NetObj::Link& pin_Address(unsigned idx) const;
-      const NetObj::Link& pin_Data(unsigned idx) const;
-      const NetObj::Link& pin_Q(unsigned idx) const;
+      const Link& pin_Address(unsigned idx) const;
+      const Link& pin_Data(unsigned idx) const;
+      const Link& pin_Q(unsigned idx) const;
 
       virtual void dump_node(ostream&, unsigned ind) const;
       virtual void emit_node(ostream&, struct target_t*) const;
@@ -1438,7 +1447,7 @@ class NetForce  : public NetProc, public NetNode {
       explicit NetForce(const string&n, NetNet*l);
       ~NetForce();
 
-      const NetObj::Link& lval_pin(unsigned) const;
+      const Link& lval_pin(unsigned) const;
 
       virtual void dump(ostream&, unsigned ind) const;
       virtual bool emit_proc(ostream&, struct target_t*) const;
@@ -2194,7 +2203,7 @@ class NetESignal  : public NetExpr {
 	// These methods actually reference the properties of the
 	// NetNet object that I point to.
       unsigned pin_count() const;
-      NetObj::Link& pin(unsigned idx);
+      Link& pin(unsigned idx);
 
       virtual void expr_scan(struct expr_scan_t*) const;
       virtual void dump(ostream&) const;
@@ -2460,18 +2469,18 @@ class Design {
 /* =======
  */
 
-inline bool operator == (const NetObj::Link&l, const NetObj::Link&r)
+inline bool operator == (const Link&l, const Link&r)
 { return l.is_equal(r); }
 
-inline bool operator != (const NetObj::Link&l, const NetObj::Link&r)
+inline bool operator != (const Link&l, const Link&r)
 { return ! l.is_equal(r); }
 
 /* Connect the pins of two nodes together. Either may already be
    connected to other things, connect is transitive. */
-extern void connect(NetObj::Link&, NetObj::Link&);
+extern void connect(Link&, Link&);
 
 /* Return true if l and r are connected. */
-inline bool connected(const NetObj::Link&l, const NetObj::Link&r)
+inline bool connected(const Link&l, const Link&r)
 { return l.is_linked(r); }
 
 /* Return true if l is fully connected to r. This means, every pin in
@@ -2481,12 +2490,12 @@ extern bool connected(const NetObj&l, const NetObj&r);
 
 /* return the number of links in the ring that are of the specified
    type. */
-extern unsigned count_inputs(const NetObj::Link&pin);
-extern unsigned count_outputs(const NetObj::Link&pin);
-extern unsigned count_signals(const NetObj::Link&pin);
+extern unsigned count_inputs(const Link&pin);
+extern unsigned count_outputs(const Link&pin);
+extern unsigned count_signals(const Link&pin);
 
 /* Find the next link that is an output into the nexus. */
-extern NetObj::Link* find_next_output(NetObj::Link*lnk);
+extern Link* find_next_output(Link*lnk);
 
 /* Find the signal connected to the given node pin. There should
    always be exactly one signal. The bidx parameter get filled with
@@ -2501,6 +2510,14 @@ extern ostream& operator << (ostream&, NetNet::Type);
 
 /*
  * $Log: netlist.h,v $
+ * Revision 1.136  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.135  2000/05/04 03:37:58  steve
  *  Add infrastructure for system functions, move
  *  $time to that structure and add $random.
diff --git a/netmisc.h b/netmisc.h
index 433697d31..a5388fae8 100644
--- a/netmisc.h
+++ b/netmisc.h
@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: netmisc.h,v 1.5 2000/04/20 00:28:03 steve Exp $"
+#ident "$Id: netmisc.h,v 1.6 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 # include  "netlist.h"
@@ -39,7 +39,7 @@ extern NetNet*pad_to_width(Design*des, const string&p, NetNet*n, unsigned w);
  * signals that are not connected together will have a different nexus
  * name.
  */
-extern string nexus_from_link(const NetObj::Link*lnk);
+extern string nexus_from_link(const Link*lnk);
 
 /*
  * Check to see if the link has a constant value driven to it. If
@@ -47,10 +47,18 @@ extern string nexus_from_link(const NetObj::Link*lnk);
  * that NetConst object. Also, return the index of the bit in that
  * constant through the idx parameter.
  */
-extern NetConst* link_const_value(NetObj::Link&pin, unsigned&idx);
+extern NetConst* link_const_value(Link&pin, unsigned&idx);
 
 /*
  * $Log: netmisc.h,v $
+ * Revision 1.6  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.5  2000/04/20 00:28:03  steve
  *  Catch some simple identity compareoptimizations.
  *
diff --git a/nexus_from_link.cc b/nexus_from_link.cc
index 8f1b73c26..678dc8251 100644
--- a/nexus_from_link.cc
+++ b/nexus_from_link.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: nexus_from_link.cc,v 1.2 2000/03/20 17:40:54 steve Exp $"
+#ident "$Id: nexus_from_link.cc,v 1.3 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 # include  "netmisc.h"
@@ -25,12 +25,12 @@
 # include  <string>
 # include  <typeinfo>
 
-string nexus_from_link(const NetObj::Link*lnk)
+string nexus_from_link(const Link*lnk)
 {
       const NetNet*sig = dynamic_cast<const NetNet*>(lnk->get_obj());
       unsigned pin = lnk->get_pin();
 
-      for (const NetObj::Link*cur = lnk->next_link()
+      for (const Link*cur = lnk->next_link()
 		 ;  cur != lnk ;  cur = cur->next_link()) {
 
 	    const NetNet*cursig = dynamic_cast<const NetNet*>(cur->get_obj());
@@ -82,6 +82,14 @@ string nexus_from_link(const NetObj::Link*lnk)
 
 /*
  * $Log: nexus_from_link.cc,v $
+ * Revision 1.3  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.2  2000/03/20 17:40:54  steve
  *  More complete error message about no signal.
  *
diff --git a/nodangle.cc b/nodangle.cc
index 8826008ec..45a2aeccc 100644
--- a/nodangle.cc
+++ b/nodangle.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: nodangle.cc,v 1.5 2000/04/28 21:00:29 steve Exp $"
+#ident "$Id: nodangle.cc,v 1.6 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 /*
@@ -67,8 +67,8 @@ void nodangle_f::signal(Design*des, NetNet*sig)
 	   to every pin of this signal. */
       unsigned significant_flags = 0;
       for (unsigned idx = 0 ;  idx < sig->pin_count() ;  idx += 1) {
-	    NetObj::Link&lnk = sig->pin(idx);
-	    for (NetObj::Link*cur = lnk.next_link()
+	    Link&lnk = sig->pin(idx);
+	    for (Link*cur = lnk.next_link()
 		       ; cur != &lnk ;  cur = cur->next_link()) {
 		  NetNet*cursig = dynamic_cast<NetNet*>(cur->get_obj());
 		  if (cursig == 0)
@@ -94,6 +94,14 @@ void nodangle(Design*des)
 
 /*
  * $Log: nodangle.cc,v $
+ * Revision 1.6  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.5  2000/04/28 21:00:29  steve
  *  Over agressive signal elimination in constant probadation.
  *
diff --git a/propinit.cc b/propinit.cc
index 3410b6b6b..c36a9432f 100644
--- a/propinit.cc
+++ b/propinit.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: propinit.cc,v 1.2 2000/02/23 02:56:55 steve Exp $"
+#ident "$Id: propinit.cc,v 1.3 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 /*
@@ -61,7 +61,7 @@ static void prop_sequdp_output(NetUDP*udp)
 	/* Take the output value and write it to all the NetNet pins
 	   that are connected to the output pin. */
 
-      for (NetObj::Link*lnk = udp->pin(0).next_link()
+      for (Link*lnk = udp->pin(0).next_link()
 		 ; (*lnk) != udp->pin(0) ;  lnk = lnk->next_link()) {
 
 	    if (NetNet*sig = dynamic_cast<NetNet*>(lnk->get_obj()))
@@ -81,6 +81,14 @@ void propinit(Design*des)
 
 /*
  * $Log: propinit.cc,v $
+ * Revision 1.3  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.2  2000/02/23 02:56:55  steve
  *  Macintosh compilers do not support ident.
  *
diff --git a/t-vvm.cc b/t-vvm.cc
index e56c7c2ca..a029eb3d5 100644
--- a/t-vvm.cc
+++ b/t-vvm.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: t-vvm.cc,v 1.143 2000/05/04 03:37:59 steve Exp $"
+#ident "$Id: t-vvm.cc,v 1.144 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 # include  <iostream>
@@ -108,7 +108,7 @@ class target_vvm : public target_t {
       void end_process(ostream&os, const NetProcTop*);
 
     private:
-      void emit_init_value_(const NetObj::Link&lnk, verinum::V val);
+      void emit_init_value_(const Link&lnk, verinum::V val);
       void emit_gate_outputfun_(const NetNode*, unsigned);
       string defn_gate_outputfun_(ostream&os, const NetNode*, unsigned);
 
@@ -157,6 +157,51 @@ class target_vvm : public target_t {
       unsigned selector_counter;
 };
 
+static const char*vvm_val_name(verinum::V val,
+			       Link::strength_t drv0,
+			       Link::strength_t drv1)
+{
+      switch (val) {
+	  case verinum::V0:
+	    switch (drv0) {
+		case Link::HIGHZ:
+		  return "HiZ";
+		case Link::WEAK:
+		  return "We0";
+		case Link::PULL:
+		  return "Pu0";
+		case Link::STRONG:
+		  return "St0";
+		case Link::SUPPLY:
+		  return "Su0";
+	    }
+	    break;
+
+	  case verinum::V1:
+	    switch (drv1) {
+		case Link::HIGHZ:
+		  return "HiZ";
+		case Link::WEAK:
+		  return "We1";
+		case Link::PULL:
+		  return "Pu1";
+		case Link::STRONG:
+		  return "St1";
+		case Link::SUPPLY:
+		  return "Su1";
+	    }
+	    break;
+
+	  case verinum::Vx:
+	    return "StX";
+
+	  case verinum::Vz:
+	    return "HiZ";
+      }
+
+      return "";
+}
+
 
 target_vvm::target_vvm()
 : function_def_flag_(false), init_code_name(0)
@@ -1038,14 +1083,15 @@ string target_vvm::defn_gate_outputfun_(ostream&os,
       return "";
 }
 
-void target_vvm::emit_init_value_(const NetObj::Link&lnk, verinum::V val)
+void target_vvm::emit_init_value_(const Link&lnk, verinum::V val)
 {
       map<string,bool>written;
+      const char*val_name = vvm_val_name(val, lnk.drive0(), lnk.drive1());
 
-      for (const NetObj::Link*cur = lnk.next_link()
+      for (const Link*cur = lnk.next_link()
 		 ; (*cur) != lnk ;  cur = cur->next_link()) {
 
-	    if (cur->get_dir() == NetObj::Link::OUTPUT)
+	    if (cur->get_dir() == Link::OUTPUT)
 		  continue;
 
 	    if (! dynamic_cast<const NetObj*>(cur->get_obj()))
@@ -1064,22 +1110,7 @@ void target_vvm::emit_init_value_(const NetObj::Link&lnk, verinum::V val)
 	    ostrstream line;
 	    line << "      " << mangle(cur->get_obj()->name())
 		 << ".init_" << cur->get_name() << "(" << cur->get_inst()
-		 << ", ";
-	    switch (val) {
-		case verinum::V0:
-		  line << "St0";
-		  break;
-		case verinum::V1:
-		  line << "St1";
-		  break;
-		case verinum::Vx:
-		  line << "StX";
-		  break;
-		case verinum::Vz:
-		  line << "HiZ";
-		  break;
-	    }
-	    line << ");" << endl << ends;
+		 << ", " << val_name << ");" << endl << ends;
 
 
 	      // Check to see if the line has already been
@@ -1757,8 +1788,29 @@ void target_vvm::net_case_cmp(ostream&os, const NetCaseCmp*gate)
  */
 void target_vvm::net_const(ostream&os, const NetConst*gate)
 {
+      const string mname = mangle(gate->name());
+
+      os << "static vvm_nexus::drive_t " << mname
+	 << "[" << gate->pin_count() << "];" << endl;
+
+      for (unsigned idx = 0 ;  idx < gate->pin_count() ;  idx += 1) {
+	    string nexus = nexus_from_link(&gate->pin(idx));
+	    unsigned ncode = nexus_wire_map[nexus];
+
+	    const char*val_str = vvm_val_name(gate->value(idx),
+					      gate->pin(idx).drive0(),
+					      gate->pin(idx).drive1());
+
+	    init_code << "      nexus_wire_table["<<ncode<<"].connect(&"
+		      << mname << "["<<idx<<"]);" << endl;
+	    start_code << "      " << mname << "["<<idx<<"].set_value("
+		       << val_str << ");" << endl;
+      }
+
+#if 0
       for (unsigned idx = 0 ;  idx < gate->pin_count() ;  idx += 1)
 	    emit_init_value_(gate->pin(idx), gate->value(idx));
+#endif
 }
 
 
@@ -2712,6 +2764,14 @@ extern const struct target tgt_vvm = {
 };
 /*
  * $Log: t-vvm.cc,v $
+ * Revision 1.144  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.143  2000/05/04 03:37:59  steve
  *  Add infrastructure for system functions, move
  *  $time to that structure and add $random.
diff --git a/t-xnf.cc b/t-xnf.cc
index d175f687f..fb8c9015a 100644
--- a/t-xnf.cc
+++ b/t-xnf.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: t-xnf.cc,v 1.26 2000/04/23 23:03:13 steve Exp $"
+#ident "$Id: t-xnf.cc,v 1.27 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 /* XNF BACKEND
@@ -99,9 +99,9 @@ class target_xnf  : public target_t {
 
     private:
       static string mangle(const string&);
-      static string choose_sig_name(const NetObj::Link*lnk);
+      static string choose_sig_name(const Link*lnk);
       static void draw_pin(ostream&os, const string&name,
-			   const NetObj::Link&lnk);
+			   const Link&lnk);
       static void draw_sym_with_lcaname(ostream&os, string lca,
 					const NetNode*net);
       static void draw_xor(ostream&os, const NetAddSub*, unsigned idx);
@@ -137,13 +137,13 @@ string target_xnf::mangle(const string&name)
  * nexus to decide which name to use if there are lots of attached
  * signals.
  */
-string target_xnf::choose_sig_name(const NetObj::Link*lnk)
+string target_xnf::choose_sig_name(const Link*lnk)
 {
       assert(lnk->is_linked());
       const NetNet*sig = dynamic_cast<const NetNet*>(lnk->get_obj());
       unsigned pin = lnk->get_pin();
 
-      for (const NetObj::Link*cur = lnk->next_link()
+      for (const Link*cur = lnk->next_link()
 		 ;  cur != lnk ;  cur = cur->next_link()) {
 
 	    const NetNet*cursig = dynamic_cast<const NetNet*>(cur->get_obj());
@@ -186,7 +186,7 @@ string target_xnf::choose_sig_name(const NetObj::Link*lnk)
 }
 
 void target_xnf::draw_pin(ostream&os, const string&name,
-			  const NetObj::Link&lnk)
+			  const Link&lnk)
 {
       bool inv = false;
       string use_name = name;
@@ -197,11 +197,11 @@ void target_xnf::draw_pin(ostream&os, const string&name,
 
       char type;
       switch (lnk.get_dir()) {
-	  case NetObj::Link::INPUT:
-	  case NetObj::Link::PASSIVE:
+	  case Link::INPUT:
+	  case Link::PASSIVE:
 	    type = 'I';
 	    break;
-	  case NetObj::Link::OUTPUT:
+	  case Link::OUTPUT:
 	    type = 'O';
 	    break;
       }
@@ -757,7 +757,7 @@ void target_xnf::net_const(ostream&os, const NetConst*c)
       for (unsigned idx = 0 ;  idx < c->pin_count() ;  idx += 1) {
 	    verinum::V v=c->value(idx);
 	    assert(v==verinum::V0 || v==verinum::V1);
-	    const NetObj::Link& lnk = c->pin(idx);
+	    const Link& lnk = c->pin(idx);
 	      // Code parallels draw_pin above, some smart c++ guru should
 	      // find a way to make a method out of this.
 	    unsigned cpin;
@@ -887,6 +887,14 @@ extern const struct target tgt_xnf = { "xnf", &target_xnf_obj };
 
 /*
  * $Log: t-xnf.cc,v $
+ * Revision 1.27  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.26  2000/04/23 23:03:13  steve
  *  automatically generate macro interface code.
  *
diff --git a/vvm/vpi_bit.c b/vvm/vpi_bit.c
index dbd37c547..960972f21 100644
--- a/vvm/vpi_bit.c
+++ b/vvm/vpi_bit.c
@@ -17,13 +17,18 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: vpi_bit.c,v 1.2 2000/03/22 05:16:38 steve Exp $"
+#ident "$Id: vpi_bit.c,v 1.3 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 # include  "vpi_priv.h"
 # include  <stdio.h>
 
-#define UNAMBIG(v) (((v)&0x0f) == ((v)>>4))
+/*
+ * A signal value is unambiguous if the top 4 bits and the bottom 4
+ * bits are identical. This means that the VSSSvsss bits of the 8bit
+ * value have V==v and SSS==sss.
+ */
+#define UNAMBIG(v) (((v)&0x0f) == (((v)>>4)&0x0f))
 
 
 # define STREN1(v) ( ((v)&0x80)? ((v)&0xf0) : (0x70 - ((v)&0xf0)) )
@@ -48,14 +53,28 @@ vpip_bit_t vpip_bits_resolve(const vpip_bit_t*bits, unsigned nbits)
 	    if (UNAMBIG(res) && UNAMBIG(bits[idx])) {
 
 		    /* If both signals are unambiguous, simply choose
-		       the stronger. */
+		       the stronger. If they have the same strength
+		       but different values, then this becomes
+		       ambiguous. */
 
-		  if ((bits[idx]&0x77) > (res&0x77))
+		  if (bits[idx] == res) {
+
+			  /* values are equal. do nothing. */
+
+		  } else if ((bits[idx]&0x07) > (res&0x07)) {
+
+			  /* New value is stronger. Take it. */
 			res = bits[idx];
-		  else if (bits[idx]*0x77 == (res&0x77))
-			res = (res&0xf0) + (bits[idx]&0x0f);
-		  else
-			;
+
+		  } else if ((bits[idx]&0x77) == (res&0x77)) {
+
+			  /* Strengths are the same. Make value ambiguous. */
+			res = (res&0x70) | (bits[idx]&0x07) | 0x80;
+
+		  } else {
+
+			  /* Must be res is the stronger one. */
+		  }
 
 	    } else if (UNAMBIG(res) || UNAMBIG(bits[idx])) {
 
@@ -106,6 +125,14 @@ vpip_bit_t vpip_bits_resolve(const vpip_bit_t*bits, unsigned nbits)
 
 /*
  * $Log: vpi_bit.c,v $
+ * Revision 1.3  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.2  2000/03/22 05:16:38  steve
  *  Integrate drive resolution function.
  *
diff --git a/vvm/vpi_priv.h b/vvm/vpi_priv.h
index 19c3f5432..b94579ecf 100644
--- a/vvm/vpi_priv.h
+++ b/vvm/vpi_priv.h
@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: vpi_priv.h,v 1.16 2000/05/04 03:37:59 steve Exp $"
+#ident "$Id: vpi_priv.h,v 1.17 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 /*
@@ -70,8 +70,20 @@ struct __vpirt;
  */
 typedef unsigned char vpip_bit_t;
 
+# define Su1 0xff
 # define St1 0xee
+# define Pu1 0xdd
+# define La1 0xcc
+# define We1 0xbb
+# define Me1 0xaa
+# define Sm1 0x99
+# define Su0 0x77
 # define St0 0x66
+# define Pu0 0x55
+# define La0 0x44
+# define We0 0x33
+# define Me0 0x22
+# define Sm0 0x11
 # define StX 0xe6
 # define HiZ 0x08
 
@@ -354,6 +366,14 @@ extern int vpip_finished();
 
 /*
  * $Log: vpi_priv.h,v $
+ * Revision 1.17  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.16  2000/05/04 03:37:59  steve
  *  Add infrastructure for system functions, move
  *  $time to that structure and add $random.
diff --git a/xnfio.cc b/xnfio.cc
index cf83c392a..55da1a997 100644
--- a/xnfio.cc
+++ b/xnfio.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: xnfio.cc,v 1.13 2000/05/02 00:58:12 steve Exp $"
+#ident "$Id: xnfio.cc,v 1.14 2000/05/07 04:37:56 steve Exp $"
 #endif
 
 # include  "functor.h"
@@ -70,7 +70,7 @@ static NetLogic* make_obuf(Design*des, NetNet*net)
 
 	/* Look for an existing OBUF connected to this signal. If it
 	   is there, then no need to add one. */
-      for (NetObj::Link*idx = net->pin(0).next_link()
+      for (Link*idx = net->pin(0).next_link()
 		 ; *idx != net->pin(0)  ; idx = idx->next_link()) {
 	    NetLogic*tmp;
 	    if ((tmp = dynamic_cast<NetLogic*>(idx->get_obj())) == 0)
@@ -161,7 +161,7 @@ static void absorb_OFF(Design*des, NetLogic*buf)
       if (buf->type() != NetLogic::BUF)
 	    return;
 
-      NetObj::Link*drv = find_next_output(&buf->pin(1));
+      Link*drv = find_next_output(&buf->pin(1));
       assert(drv);
 
 	/* Make sure the device is a FF with width 1. */
@@ -211,7 +211,7 @@ static void make_ibuf(Design*des, NetNet*net)
 
 	/* Look for an existing BUF connected to this signal and
 	   suitably connected that I can use it as an IBUF. */
-      for (NetObj::Link*idx = net->pin(0).next_link()
+      for (Link*idx = net->pin(0).next_link()
 		 ; *idx != net->pin(0)  ; idx = idx->next_link()) {
 	    NetLogic*tmp;
 	    if ((tmp = dynamic_cast<NetLogic*>(idx->get_obj())) == 0)
@@ -356,6 +356,14 @@ void xnfio(Design*des)
 
 /*
  * $Log: xnfio.cc,v $
+ * Revision 1.14  2000/05/07 04:37:56  steve
+ *  Carry strength values from Verilog source to the
+ *  pform and netlist for gates.
+ *
+ *  Change vvm constants to use the driver_t to drive
+ *  a constant value. This works better if there are
+ *  multiple drivers on a signal.
+ *
  * Revision 1.13  2000/05/02 00:58:12  steve
  *  Move signal tables to the NetScope class.
  *