diff --git a/elab_expr.cc b/elab_expr.cc
index b5894a617..d54983586 100644
--- a/elab_expr.cc
+++ b/elab_expr.cc
@@ -31,7 +31,7 @@
 # include  "util.h"
 # include  "ivl_assert.h"
 
-static bool type_is_vectorable(ivl_variable_type_t type)
+bool type_is_vectorable(ivl_variable_type_t type)
 {
       switch (type) {
 	  case IVL_VT_BOOL:
diff --git a/elaborate.cc b/elaborate.cc
index b9693b53d..8283e749a 100644
--- a/elaborate.cc
+++ b/elaborate.cc
@@ -109,6 +109,19 @@ void PGAssign::elaborate(Design*des, NetScope*scope) const
 	    return;
       }
 
+      if (type_is_vectorable(rval_expr->expr_type())
+	  && type_is_vectorable(lval->data_type())
+	  && rval_expr->expr_width() < lval->vector_width()) {
+	    if (debug_elaborate) {
+		  cerr << get_fileline() << ": debug: "
+		       << "r-value expressions width "<<rval_expr->expr_width()
+		       << " of " << (rval_expr->has_sign()? "signed":"unsigned")
+		       << " expression is to small for l-value width "
+		       << lval->vector_width() << "." << endl;
+	    }
+	    rval_expr = pad_to_width(rval_expr, lval->vector_width());
+      }
+
       NetNet*rval = rval_expr->synthesize(des, scope);
 
       if (rval == 0) {
diff --git a/netmisc.h b/netmisc.h
index 2e7872ea5..7e31b37fa 100644
--- a/netmisc.h
+++ b/netmisc.h
@@ -185,6 +185,13 @@ extern hname_t eval_path_component(Design*des, NetScope*scope,
 extern std::list<hname_t> eval_scope_path(Design*des, NetScope*scope,
 					  const pform_name_t&path);
 
+/*
+ * Return true if the data type is a type that is normally available
+ * in vector for. IVL_VT_BOOL and IVL_VT_LOGIC are vectorable,
+ * IVL_VT_REAL is not.
+ */
+extern bool type_is_vectorable(ivl_variable_type_t type);
+
 /*
  * Return a human readable version of the operator.
  */