From ac7ae1ba6f867581c5abba0d868b5afb016f965e Mon Sep 17 00:00:00 2001 From: steve Date: Tue, 2 Jan 2001 17:28:08 +0000 Subject: [PATCH] Resolve repeat ambiguity in favor of loop. --- ieee1364-notes.txt | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/ieee1364-notes.txt b/ieee1364-notes.txt index ad0952509..e76fb24df 100644 --- a/ieee1364-notes.txt +++ b/ieee1364-notes.txt @@ -192,13 +192,17 @@ to resolve this conflict, and the IEEE1364-2000 DRAFT does not improve the situation. Practice suggests that a repeat followed by an event control should be -interpreted as a procedural_timing_control_statement in preference to -to loop_statement interpretation, but the standard does not say this. +interpreted as a loop head, and this is what Icarus Verilog does, as +well as all the other major Verilog tools, but the standard does not +say this. -$Id: ieee1364-notes.txt,v 1.4 2001/01/01 19:12:35 steve Exp $ +$Id: ieee1364-notes.txt,v 1.5 2001/01/02 17:28:08 steve Exp $ $Log: ieee1364-notes.txt,v $ +Revision 1.5 2001/01/02 17:28:08 steve + Resolve repeat ambiguity in favor of loop. + Revision 1.4 2001/01/01 19:12:35 steve repeat loops ambiguity.