From aafda65b99aaff7d930347d9b36b62fe4655f45f Mon Sep 17 00:00:00 2001 From: Cary R Date: Thu, 21 May 2026 05:19:53 -0700 Subject: [PATCH] Cppcheck cleanup --- PGate.h | 2 +- cppcheck.sup | 50 +++++++++++++------------- driver/cppcheck.sup | 2 ++ elaborate.cc | 2 +- net_link.cc | 10 +++--- net_scope.cc | 10 +++--- netlist.h | 8 ++--- parse.y | 8 ++--- pform.cc | 2 +- pform.h | 2 +- pform_types.h | 2 +- t-dll.cc | 8 ++--- t-dll.h | 2 +- tgt-fpga/device.h | 4 +-- tgt-fpga/tables.c | 8 ++--- tgt-fpga/xilinx.c | 78 ++++++++++++++++++++--------------------- tgt-fpga/xilinx.h | 44 +++++++++++------------ tgt-pcb/cppcheck.sup | 2 ++ tgt-vhdl/vhdl_syntax.cc | 4 +-- tgt-vhdl/vhdl_syntax.hh | 2 +- vhdlpp/architec_emit.cc | 4 +-- vhdlpp/cppcheck.sup | 3 ++ vhdlpp/library.cc | 2 +- vpi/cppcheck.sup | 4 +++ vvp/compile.cc | 18 +++++----- vvp/compile.h | 4 +-- vvp/delay.cc | 2 +- vvp/vpip_to_dec.cc | 16 ++++----- vvp/vvp_island.h | 2 +- 29 files changed, 159 insertions(+), 146 deletions(-) diff --git a/PGate.h b/PGate.h index 84e172377..ca67bd4e6 100644 --- a/PGate.h +++ b/PGate.h @@ -235,7 +235,7 @@ class PGModule : public PGate { unsigned nparms_; friend class delayed_elaborate_scope_mod_instances; - void elaborate_mod_(Design*, Module*mod, NetScope*scope) const; + void elaborate_mod_(Design*, const Module*mod, NetScope*scope) const; void elaborate_udp_(Design*, PUdp *udp, NetScope*scope) const; void elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const; void elaborate_scope_mod_instances_(Design*des, Module*mod, NetScope*sc) const; diff --git a/cppcheck.sup b/cppcheck.sup index 1147d347e..f4e70d72d 100644 --- a/cppcheck.sup +++ b/cppcheck.sup @@ -10,9 +10,9 @@ nullPointerOutOfMemory ctuuninitvar:parse_misc.cc:61 // Skip strdup() not constant. -constVariablePointer:main.cc:415 -constVariablePointer:main.cc:419 -constVariablePointer:main.cc:669 +constVariablePointer:main.cc:421 +constVariablePointer:main.cc:425 +constVariablePointer:main.cc:675 // const auto should be const constVariablePointer:elab_expr.cc:344 @@ -24,9 +24,9 @@ constParameterReference:net_udp.cc:37 // These cannot be static since they access object data functionStatic:net_link.cc:178 -functionStatic:net_link.cc:183 -functionStatic:net_link.cc:188 -functionStatic:net_link.cc:193 +functionStatic:net_link.cc:184 +functionStatic:net_link.cc:189 +functionStatic:net_link.cc:194 // This cannot be static when checking with valgrind functionStatic:libmisc/StringHeap.cc @@ -36,23 +36,23 @@ uninitMemberVar:t-dll.cc:41 uninitMemberVar:t-dll.cc:109 // By convention we put statics at the top scope. -variableScope:pform.cc:3461 +variableScope:pform.cc:3499 // These are correct and are used to find the base (zero) pin. -thisSubtraction:netlist.h:5310 -thisSubtraction:netlist.h:5319 +thisSubtraction:netlist.h:5376 +thisSubtraction:netlist.h:5385 // This is used when running a debugger // debugger_release -knownConditionTrueFalse:main.cc:949 +knownConditionTrueFalse:main.cc:955 // These should be checked, but are not real issues -knownConditionTrueFalse:elaborate.cc:7633 -knownConditionTrueFalse:elab_sig.cc:271 -knownConditionTrueFalse:elab_sig.cc:338 +knownConditionTrueFalse:elaborate.cc:7970 +knownConditionTrueFalse:elab_sig.cc:272 +knownConditionTrueFalse:elab_sig.cc:345 // Yes, it's a duplicate -duplicateCondition:elaborate.cc:7684 +duplicateCondition:elaborate.cc:8021 // To complicated to use std::find_if() useStlAlgorithm:map_named_args.cc:38 @@ -722,31 +722,33 @@ unusedFunction:Statement.h:192 // chain_args() unusedFunction:Statement.h:341 // gn_modules_nest() -unusedFunction:compiler.h:245 +unusedFunction:compiler.h:247 // driven_mask() unusedFunction:link_const.cc:275 // find_root_scope() unusedFunction:net_design.cc:121 // assign_lval() -unusedFunction:net_link.cc:282 +unusedFunction:net_link.cc:283 // intersect() -unusedFunction:net_link.cc:689 +unusedFunction:net_link.cc:687 // get_def_fileline() unusedFunction:net_scope.cc:201 // get_module_port_info() -unusedFunction:net_scope.cc:599 +unusedFunction:net_scope.cc:600 // find_link_signal() -unusedFunction:netlist.cc:111 +unusedFunction:netlist.cc:113 // find_link() -unusedFunction:netlist.cc:297 +unusedFunction:netlist.cc:304 // set_module_port_index() -unusedFunction:netlist.cc:651 +unusedFunction:netlist.cc:658 // width_a() -unusedFunction:netlist.cc:1678 +unusedFunction:netlist.cc:1685 // width_b() -unusedFunction:netlist.cc:1683 +unusedFunction:netlist.cc:1690 // result_sig() -unusedFunction:netlist.cc:2184 +unusedFunction:netlist.cc:2191 +// soft_union() +unusedFunction:netstruct.h:93 // test_protected() unusedFunction:property_qual.h:50 // test_rand() diff --git a/driver/cppcheck.sup b/driver/cppcheck.sup index 70838cc38..82ce9a74e 100644 --- a/driver/cppcheck.sup +++ b/driver/cppcheck.sup @@ -18,8 +18,10 @@ memleakOnRealloc:cfparse.y allocaCalled:cfparse.c constParameterPointer:cfparse.c constVariablePointer:cfparse.c +invalidPrintfArgType_sint:cfparse.c knownConditionTrueFalse:cfparse.c sizeofwithnumericparameter:cfparse.c +unsignedPositive:cfparse.c constVariablePointer: duplicateBreak: nullPointer: diff --git a/elaborate.cc b/elaborate.cc index 67320db99..988110c7f 100644 --- a/elaborate.cc +++ b/elaborate.cc @@ -1679,7 +1679,7 @@ bool PGModule::bind_interface_ports_(Design*des, const Module*rmod, * the parameters. This is done with BUFZ gates so that they look just * like continuous assignment connections. */ -void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const +void PGModule::elaborate_mod_(Design*des, const Module*rmod, NetScope*scope) const { ivl_assert(*this, scope); diff --git a/net_link.cc b/net_link.cc index 4ef426e48..df28aaef9 100644 --- a/net_link.cc +++ b/net_link.cc @@ -169,16 +169,16 @@ void Link::drivers_delays(const delay_exprs_t &delays) find_nexus_()->drivers_delays(delays); } -void Link::drivers_drive(const drive_strength_t &drive) +void Link::drivers_drive(const drive_strength_t &drive_i) { - find_nexus_()->drivers_drive(drive); + find_nexus_()->drivers_drive(drive_i); } -void Link::drive(const drive_strength_t &drive) +void Link::drive(const drive_strength_t &drive_i) { - drive0_ = drive.drive0; - drive1_ = drive.drive1; + drive0_ = drive_i.drive0; + drive1_ = drive_i.drive1; } drive_strength_t Link::drive() const diff --git a/net_scope.cc b/net_scope.cc index bd019f93d..cd9e923d0 100644 --- a/net_scope.cc +++ b/net_scope.cc @@ -239,16 +239,16 @@ void NetScope::add_typedefs(const map*typedefs) typedefs_ = *typedefs; } -NetScope*NetScope::find_typedef_scope(const Design*des, const typedef_t*type) +NetScope*NetScope::find_typedef_scope(const Design*des, const typedef_t*type_i) { - ivl_assert(*this, type); + ivl_assert(*this, type_i); NetScope *cur_scope = this; while (cur_scope) { - auto it = cur_scope->typedefs_.find(type->name); - if (it != cur_scope->typedefs_.end() && it->second == type) + auto it = cur_scope->typedefs_.find(type_i->name); + if (it != cur_scope->typedefs_.end() && it->second == type_i) return cur_scope; - NetScope*import_scope = cur_scope->find_import(des, type->name); + NetScope*import_scope = cur_scope->find_import(des, type_i->name); if (import_scope) cur_scope = import_scope; else if (cur_scope == unit_) diff --git a/netlist.h b/netlist.h index 812372ff5..86bfb9b73 100644 --- a/netlist.h +++ b/netlist.h @@ -167,12 +167,12 @@ class Link { // A link has a drive strength for 0 and 1 values. The drive0 // strength is for when the link has the value 0, and drive1 // strength is for when the link has a value 1. - void drive(const drive_strength_t &drive); + void drive(const drive_strength_t &drive_i); drive_strength_t drive() const; // This sets the drives for all drivers of this link, and not // just the current link. - void drivers_drive(const drive_strength_t &drive); + void drivers_drive(const drive_strength_t &drive_i); ivl_drive_t drive0() const; ivl_drive_t drive1() const; @@ -308,7 +308,7 @@ class NetObj : public NetPins, public Attrib { const NetExpr *rise_time() const { return delays_.rise; } const NetExpr *fall_time() const { return delays_.fall; } const NetExpr *decay_time() const { return delays_.decay; } - delay_exprs_t delay_times() const + const delay_exprs_t &delay_times() const { return delays_; } @@ -1007,7 +1007,7 @@ class NetScope : public Definitions, public Attrib { void add_typedefs(const std::map*typedefs); /* Search the scope hierarchy for the scope where 'type' was defined. */ - NetScope*find_typedef_scope(const Design*des, const typedef_t*type); + NetScope*find_typedef_scope(const Design*des, const typedef_t*type_i); /* Parameters exist within a scope, and these methods allow one to manipulate the set. In these cases, the name is the diff --git a/parse.y b/parse.y index 8c94dd4b5..985afe40a 100644 --- a/parse.y +++ b/parse.y @@ -2925,17 +2925,17 @@ type_declaration | K_typedef identifier_name ';' { perm_string name = lex_strings.make($2); - pform_forward_typedef(@2, name, type_restrict_t::ANY); + pform_forward_typedef(@2, name, type_restrict_t(type_restrict_t::ANY)); delete[]$2; } | K_typedef forward_type_without_enum identifier_name ';' { perm_string name = lex_strings.make($3); - pform_forward_typedef(@3, name, $2); + pform_forward_typedef(@3, name, type_restrict_t($2)); delete[]$3; } | K_typedef K_enum identifier_name ';' { perm_string name = lex_strings.make($3); - pform_forward_typedef(@3, name, type_restrict_t::ENUM); + pform_forward_typedef(@3, name, type_restrict_t(type_restrict_t::ENUM)); delete[]$3; } | K_typedef error ';' @@ -4955,7 +4955,7 @@ type_param { if (generation_flag < GN_VER2023) yyerror(@1, "error: Restricted type parameters require SystemVerilog 2023 or later."); param_is_type = true; - param_type_restrict = $2; + param_type_restrict = type_restrict_t($2); } ; diff --git a/pform.cc b/pform.cc index e66d5dce8..0a62724e8 100644 --- a/pform.cc +++ b/pform.cc @@ -1418,7 +1418,7 @@ Module::port_t* pform_module_interface_port_reference( } void pform_module_define_interface_port(const struct vlltype&loc, - Module::port_t*port, + const Module::port_t*port, list*attr) { ivl_assert(loc, port); diff --git a/pform.h b/pform.h index 5fb7e5035..610dd8390 100644 --- a/pform.h +++ b/pform.h @@ -174,7 +174,7 @@ extern Module::port_t* pform_module_interface_port_reference( perm_string name, std::list*udims = 0); extern void pform_module_define_interface_port(const struct vlltype&loc, - Module::port_t*port, + const Module::port_t*port, std::list*attr); extern void pform_endmodule(const char*, bool inside_celldefine, Module::UCDriveType uc_drive_def); diff --git a/pform_types.h b/pform_types.h index 29fedb693..e16273cf6 100644 --- a/pform_types.h +++ b/pform_types.h @@ -59,7 +59,7 @@ struct type_restrict_t { }; type_restrict_t() = default; - type_restrict_t(type_t kind) : type(kind) { } + explicit type_restrict_t(type_t kind) : type(kind) { } bool merge(type_restrict_t other); bool matches(ivl_type_t type) const; diff --git a/t-dll.cc b/t-dll.cc index 6a99ec8d6..1d130dbca 100644 --- a/t-dll.cc +++ b/t-dll.cc @@ -401,13 +401,13 @@ static void scope_add_switch(ivl_scope_t scope, ivl_switch_t net) scope->switches.push_back(net); } -ivl_parameter_t dll_target::scope_find_param(ivl_scope_t scope, +ivl_parameter_t dll_target::scope_find_param(ivl_scope_t scope_i, const char*name) { unsigned idx = 0; - while (idx < scope->param.size()) { - if (strcmp(name, scope->param[idx].basename) == 0) - return &scope->param[idx]; + while (idx < scope_i->param.size()) { + if (strcmp(name, scope_i->param[idx].basename) == 0) + return &scope_i->param[idx]; idx += 1; } diff --git a/t-dll.h b/t-dll.h index 4dc074247..44d5c3724 100644 --- a/t-dll.h +++ b/t-dll.h @@ -162,7 +162,7 @@ struct dll_target : public target_t, public expr_scan_t { static ivl_scope_t find_scope(ivl_design_s &des, const NetScope*cur); static ivl_signal_t find_signal(ivl_design_s &des, const NetNet*net); - static ivl_parameter_t scope_find_param(ivl_scope_t scope, + static ivl_parameter_t scope_find_param(ivl_scope_t scope_i, const char*name); void add_root(const NetScope *s); diff --git a/tgt-fpga/device.h b/tgt-fpga/device.h index 03cb08b1b..0c001215d 100644 --- a/tgt-fpga/device.h +++ b/tgt-fpga/device.h @@ -1,7 +1,7 @@ #ifndef IVL_device_H #define IVL_device_H /* - * Copyright (c) 2001-2014 Stephen Williams (steve@icarus.com) + * Copyright (c) 2001-2026 Stephen Williams (steve@icarus.com) * * This source code is free software; you can redistribute it * and/or modify it in source code form under the terms of the GNU @@ -72,6 +72,6 @@ struct device_s { * This function is used if the user specifies the architecture * explicitly, with the -parch=name flag. */ -extern device_t device_from_arch(const char*arch); +extern device_t device_from_arch(const char*arch_i); #endif /* IVL_device_H */ diff --git a/tgt-fpga/tables.c b/tgt-fpga/tables.c index 1aa44f16f..73fa608c8 100644 --- a/tgt-fpga/tables.c +++ b/tgt-fpga/tables.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2001 Stephen Williams (steve@icarus.com) + * Copyright (c) 2001-2026 Stephen Williams (steve@icarus.com) * * This source code is free software; you can redistribute it * and/or modify it in source code form under the terms of the GNU @@ -40,14 +40,14 @@ const struct device_table_s { { 0, 0 } }; -device_t device_from_arch(const char*arch) +device_t device_from_arch(const char*arch_i) { unsigned idx; - assert(arch); + assert(arch_i); for (idx = 0 ; device_table[idx].name ; idx += 1) { - if (strcmp(arch, device_table[idx].name) == 0) + if (strcmp(arch_i, device_table[idx].name) == 0) return device_table[idx].driver; } diff --git a/tgt-fpga/xilinx.c b/tgt-fpga/xilinx.c index eb1ad7738..233d58bd1 100644 --- a/tgt-fpga/xilinx.c +++ b/tgt-fpga/xilinx.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003-2014 Stephen Williams (steve at icarus.com) + * Copyright (c) 2003-2026 Stephen Williams (steve at icarus.com) * * This source code is free software; you can redistribute it * and/or modify it in source code form under the terms of the GNU @@ -26,80 +26,80 @@ # include # include "ivl_alloc.h" -edif_cell_t xilinx_cell_buf(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_buf(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell) return cell; - cell = edif_xcell_create(xlib, "BUF", 2); + cell = edif_xcell_create(xlib_i, "BUF", 2); edif_cell_portconfig(cell, BUF_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, BUF_I, "I", IVL_SIP_INPUT); return cell; } -edif_cell_t xilinx_cell_bufe(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_bufe(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell) return cell; - cell = edif_xcell_create(xlib, "BUFE", 3); + cell = edif_xcell_create(xlib_i, "BUFE", 3); edif_cell_portconfig(cell, BUF_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, BUF_I, "I", IVL_SIP_INPUT); edif_cell_portconfig(cell, BUF_T, "E", IVL_SIP_INPUT); return cell; } -edif_cell_t xilinx_cell_bufg(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_bufg(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell) return cell; - cell = edif_xcell_create(xlib, "BUFG", 2); + cell = edif_xcell_create(xlib_i, "BUFG", 2); edif_cell_portconfig(cell, BUF_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, BUF_I, "I", IVL_SIP_INPUT); return cell; } -edif_cell_t xilinx_cell_buft(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_buft(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell) return cell; - cell = edif_xcell_create(xlib, "BUFT", 3); + cell = edif_xcell_create(xlib_i, "BUFT", 3); edif_cell_portconfig(cell, BUF_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, BUF_I, "I", IVL_SIP_INPUT); edif_cell_portconfig(cell, BUF_T, "T", IVL_SIP_INPUT); return cell; } -edif_cell_t xilinx_cell_ibuf(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_ibuf(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell) return cell; - cell = edif_xcell_create(xlib, "IBUF", 2); + cell = edif_xcell_create(xlib_i, "IBUF", 2); edif_cell_portconfig(cell, BUF_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, BUF_I, "I", IVL_SIP_INPUT); return cell; } -edif_cell_t xilinx_cell_inv(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_inv(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell) return cell; - cell = edif_xcell_create(xlib, "INV", 2); + cell = edif_xcell_create(xlib_i, "INV", 2); edif_cell_portconfig(cell, BUF_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, BUF_I, "I", IVL_SIP_INPUT); return cell; } -edif_cell_t xilinx_cell_muxf5(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_muxf5(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell) return cell; - cell = edif_xcell_create(xlib, "MUXF5", 4); + cell = edif_xcell_create(xlib_i, "MUXF5", 4); edif_cell_portconfig(cell, MUXF_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, MUXF_I0, "I0", IVL_SIP_INPUT); edif_cell_portconfig(cell, MUXF_I1, "I1", IVL_SIP_INPUT); @@ -107,12 +107,12 @@ edif_cell_t xilinx_cell_muxf5(edif_xlibrary_t xlib) return cell; } -edif_cell_t xilinx_cell_muxf6(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_muxf6(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell) return cell; - cell = edif_xcell_create(xlib, "MUXF6", 4); + cell = edif_xcell_create(xlib_i, "MUXF6", 4); edif_cell_portconfig(cell, MUXF_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, MUXF_I0, "I0", IVL_SIP_INPUT); edif_cell_portconfig(cell, MUXF_I1, "I1", IVL_SIP_INPUT); @@ -120,36 +120,36 @@ edif_cell_t xilinx_cell_muxf6(edif_xlibrary_t xlib) return cell; } -edif_cell_t xilinx_cell_obuf(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_obuf(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell) return cell; - cell = edif_xcell_create(xlib, "OBUF", 2); + cell = edif_xcell_create(xlib_i, "OBUF", 2); edif_cell_portconfig(cell, BUF_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, BUF_I, "I", IVL_SIP_INPUT); return cell; } -edif_cell_t xilinx_cell_lut2(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_lut2(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell != 0) return cell; - cell = edif_xcell_create(xlib, "LUT2", 3); + cell = edif_xcell_create(xlib_i, "LUT2", 3); edif_cell_portconfig(cell, LUT_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, LUT_I0, "I0", IVL_SIP_INPUT); edif_cell_portconfig(cell, LUT_I1, "I1", IVL_SIP_INPUT); return cell; } -edif_cell_t xilinx_cell_lut3(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_lut3(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell != 0) return cell; - cell = edif_xcell_create(xlib, "LUT3", 4); + cell = edif_xcell_create(xlib_i, "LUT3", 4); edif_cell_portconfig(cell, LUT_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, LUT_I0, "I0", IVL_SIP_INPUT); edif_cell_portconfig(cell, LUT_I1, "I1", IVL_SIP_INPUT); @@ -157,12 +157,12 @@ edif_cell_t xilinx_cell_lut3(edif_xlibrary_t xlib) return cell; } -edif_cell_t xilinx_cell_lut4(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_lut4(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell != 0) return cell; - cell = edif_xcell_create(xlib, "LUT4", 5); + cell = edif_xcell_create(xlib_i, "LUT4", 5); edif_cell_portconfig(cell, LUT_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, LUT_I0, "I0", IVL_SIP_INPUT); edif_cell_portconfig(cell, LUT_I1, "I1", IVL_SIP_INPUT); @@ -172,12 +172,12 @@ edif_cell_t xilinx_cell_lut4(edif_xlibrary_t xlib) } -edif_cell_t xilinx_cell_fdce(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_fdce(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell != 0) return cell; - cell = edif_xcell_create(xlib, "FDCE", 5); + cell = edif_xcell_create(xlib_i, "FDCE", 5); edif_cell_portconfig(cell, FDCE_Q, "Q", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, FDCE_D, "D", IVL_SIP_INPUT); edif_cell_portconfig(cell, FDCE_C, "C", IVL_SIP_INPUT); @@ -186,12 +186,12 @@ edif_cell_t xilinx_cell_fdce(edif_xlibrary_t xlib) return cell; } -edif_cell_t xilinx_cell_fdcpe(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_fdcpe(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell != 0) return cell; - cell = edif_xcell_create(xlib, "FDCPE", 6); + cell = edif_xcell_create(xlib_i, "FDCPE", 6); edif_cell_portconfig(cell, FDCE_Q, "Q", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, FDCE_D, "D", IVL_SIP_INPUT); edif_cell_portconfig(cell, FDCE_C, "C", IVL_SIP_INPUT); @@ -201,12 +201,12 @@ edif_cell_t xilinx_cell_fdcpe(edif_xlibrary_t xlib) return cell; } -edif_cell_t xilinx_cell_fdre(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_fdre(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell != 0) return cell; - cell = edif_xcell_create(xlib, "FDRE", 5); + cell = edif_xcell_create(xlib_i, "FDRE", 5); edif_cell_portconfig(cell, FDCE_Q, "Q", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, FDCE_D, "D", IVL_SIP_INPUT); edif_cell_portconfig(cell, FDCE_C, "C", IVL_SIP_INPUT); @@ -216,24 +216,24 @@ edif_cell_t xilinx_cell_fdre(edif_xlibrary_t xlib) } -edif_cell_t xilinx_cell_mult_and(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_mult_and(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell != 0) return cell; - cell = edif_xcell_create(xlib, "MULT_AND", 3); + cell = edif_xcell_create(xlib_i, "MULT_AND", 3); edif_cell_portconfig(cell, MULT_AND_LO, "LO", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, MULT_AND_I0, "I0", IVL_SIP_INPUT); edif_cell_portconfig(cell, MULT_AND_I1, "I1", IVL_SIP_INPUT); return cell; } -edif_cell_t xilinx_cell_muxcy(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_muxcy(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell != 0) return cell; - cell = edif_xcell_create(xlib, "MUXCY", 4); + cell = edif_xcell_create(xlib_i, "MUXCY", 4); edif_cell_portconfig(cell, MUXCY_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, MUXCY_DI, "DI", IVL_SIP_INPUT); edif_cell_portconfig(cell, MUXCY_CI, "CI", IVL_SIP_INPUT); @@ -241,12 +241,12 @@ edif_cell_t xilinx_cell_muxcy(edif_xlibrary_t xlib) return cell; } -edif_cell_t xilinx_cell_muxcy_l(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_muxcy_l(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell != 0) return cell; - cell = edif_xcell_create(xlib, "MUXCY_L", 4); + cell = edif_xcell_create(xlib_i, "MUXCY_L", 4); edif_cell_portconfig(cell, MUXCY_O, "LO", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, MUXCY_DI, "DI", IVL_SIP_INPUT); edif_cell_portconfig(cell, MUXCY_CI, "CI", IVL_SIP_INPUT); @@ -254,12 +254,12 @@ edif_cell_t xilinx_cell_muxcy_l(edif_xlibrary_t xlib) return cell; } -edif_cell_t xilinx_cell_xorcy(edif_xlibrary_t xlib) +edif_cell_t xilinx_cell_xorcy(edif_xlibrary_t xlib_i) { static edif_cell_t cell = 0; if (cell != 0) return cell; - cell = edif_xcell_create(xlib, "XORCY", 3); + cell = edif_xcell_create(xlib_i, "XORCY", 3); edif_cell_portconfig(cell, XORCY_O, "O", IVL_SIP_OUTPUT); edif_cell_portconfig(cell, XORCY_CI, "CI", IVL_SIP_INPUT); edif_cell_portconfig(cell, XORCY_LI, "LI", IVL_SIP_INPUT); diff --git a/tgt-fpga/xilinx.h b/tgt-fpga/xilinx.h index b3b0ae7ac..70f241614 100644 --- a/tgt-fpga/xilinx.h +++ b/tgt-fpga/xilinx.h @@ -1,7 +1,7 @@ #ifndef IVL_xilinx_H #define IVL_xilinx_H /* - * Copyright (c) 2003-2014 Stephen Williams (steve at icarus.com) + * Copyright (c) 2003-2026 Stephen Williams (steve at icarus.com) * * This source code is free software; you can redistribute it * and/or modify it in source code form under the terms of the GNU @@ -34,13 +34,13 @@ /* Buffer types of devices have the BUF_O and BUF_I pin assignments. The BUF, INV, and certain specialized devices fit in this category. */ -extern edif_cell_t xilinx_cell_buf (edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_bufe(edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_bufg(edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_buft(edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_inv (edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_ibuf(edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_obuf(edif_xlibrary_t xlib); +extern edif_cell_t xilinx_cell_buf (edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_bufe(edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_bufg(edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_buft(edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_inv (edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_ibuf(edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_obuf(edif_xlibrary_t xlib_i); #define BUF_O 0 #define BUF_I 1 /* Only bufe and buft buffers have this input. */ @@ -52,9 +52,9 @@ extern edif_cell_t xilinx_cell_obuf(edif_xlibrary_t xlib); 2, 3 or 4 inputs. All forms have a single bit output. Also, the real behavior of the device will need to be specified by an INIT parameter string. */ -extern edif_cell_t xilinx_cell_lut2(edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_lut3(edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_lut4(edif_xlibrary_t xlib); +extern edif_cell_t xilinx_cell_lut2(edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_lut3(edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_lut4(edif_xlibrary_t xlib_i); #define LUT_O 0 #define LUT_I0 1 #define LUT_I1 2 @@ -67,9 +67,9 @@ extern edif_cell_t xilinx_cell_lut4(edif_xlibrary_t xlib); /* * These are flip-flops of various sort, but similar pinouts. */ -extern edif_cell_t xilinx_cell_fdce(edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_fdcpe(edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_fdre(edif_xlibrary_t xlib); +extern edif_cell_t xilinx_cell_fdce(edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_fdcpe(edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_fdre(edif_xlibrary_t xlib_i); #define FDCE_Q 0 #define FDCE_C 1 #define FDCE_D 2 @@ -80,28 +80,28 @@ extern edif_cell_t xilinx_cell_fdre(edif_xlibrary_t xlib); /* === Virtex/Virtex2 Carry Chain Logic === */ -extern edif_cell_t xilinx_cell_mult_and(edif_xlibrary_t xlib); +extern edif_cell_t xilinx_cell_mult_and(edif_xlibrary_t xlib_i); #define MULT_AND_LO 0 #define MULT_AND_I0 1 #define MULT_AND_I1 2 -extern edif_cell_t xilinx_cell_muxcy(edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_muxcy_l(edif_xlibrary_t xlib); +extern edif_cell_t xilinx_cell_muxcy(edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_muxcy_l(edif_xlibrary_t xlib_i); #define MUXCY_O 0 #define MUXCY_DI 1 #define MUXCY_CI 2 #define MUXCY_S 3 -extern edif_cell_t xilinx_cell_xorcy(edif_xlibrary_t xlib); +extern edif_cell_t xilinx_cell_xorcy(edif_xlibrary_t xlib_i); #define XORCY_O 0 #define XORCY_CI 1 #define XORCY_LI 2 /* === Virtex/Virtex2 MUX devices */ -extern edif_cell_t xilinx_cell_muxf5(edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_muxf6(edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_muxf7(edif_xlibrary_t xlib); -extern edif_cell_t xilinx_cell_muxf8(edif_xlibrary_t xlib); +extern edif_cell_t xilinx_cell_muxf5(edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_muxf6(edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_muxf7(edif_xlibrary_t xlib_i); +extern edif_cell_t xilinx_cell_muxf8(edif_xlibrary_t xlib_i); #define MUXF_O 0 #define MUXF_I0 1 #define MUXF_I1 2 diff --git a/tgt-pcb/cppcheck.sup b/tgt-pcb/cppcheck.sup index b79920b11..0599400b1 100644 --- a/tgt-pcb/cppcheck.sup +++ b/tgt-pcb/cppcheck.sup @@ -10,7 +10,9 @@ unusedFunction:pcb.cc:84 // Errors/limitations in the generated yacc and lex files duplicateBreak:fp.lex constParameterPointer:fp.cc +invalidPrintfArgType_sint:fp.cc knownConditionTrueFalse:fp.cc +unsignedPositive:fp.cc constVariablePointer:fp_lex.cc cstyleCast:fp_lex.cc duplicateBreak:fp_lex.cc diff --git a/tgt-vhdl/vhdl_syntax.cc b/tgt-vhdl/vhdl_syntax.cc index d62daefa5..763a31e07 100644 --- a/tgt-vhdl/vhdl_syntax.cc +++ b/tgt-vhdl/vhdl_syntax.cc @@ -286,9 +286,9 @@ void stmt_container::find_vars(vhdl_var_set_t& read, (*it)->find_vars(read, write); } -void stmt_container::emit(std::ostream &of, int level, bool newline) const +void stmt_container::emit(std::ostream &of, int level, bool trailing_newln) const { - emit_children(of, stmts_, level, "", newline); + emit_children(of, stmts_, level, "", trailing_newln); } vhdl_comp_inst::vhdl_comp_inst(const char *inst_name, const char *comp_name) diff --git a/tgt-vhdl/vhdl_syntax.hh b/tgt-vhdl/vhdl_syntax.hh index e74d564af..66b2e8903 100644 --- a/tgt-vhdl/vhdl_syntax.hh +++ b/tgt-vhdl/vhdl_syntax.hh @@ -360,7 +360,7 @@ public: void add_stmt(vhdl_seq_stmt *stmt); void move_stmts_from(stmt_container *other); - void emit(std::ostream &of, int level, bool newline=true) const; + void emit(std::ostream &of, int level, bool trailing_newln=true) const; bool empty() const { return stmts_.empty(); } void find_vars(vhdl_var_set_t& read, vhdl_var_set_t& write); diff --git a/vhdlpp/architec_emit.cc b/vhdlpp/architec_emit.cc index 900dfe8c0..012c8684c 100644 --- a/vhdlpp/architec_emit.cc +++ b/vhdlpp/architec_emit.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011-2021 Stephen Williams (steve@icarus.com) + * Copyright (c) 2011-2026 Stephen Williams (steve@icarus.com) * * This source code is free software; you can redistribute it * and/or modify it in source code form under the terms of the GNU @@ -203,7 +203,7 @@ int CondSignalAssignment::emit(ostream&out, Entity*ent, Architecture*arc) int ComponentInstantiation::emit(ostream&out, Entity*ent, Architecture*arc) { - const char*comma = ""; + const char*comma; int errors = 0; arc->set_cur_component(this); diff --git a/vhdlpp/cppcheck.sup b/vhdlpp/cppcheck.sup index 5613c1c10..53b54a207 100644 --- a/vhdlpp/cppcheck.sup +++ b/vhdlpp/cppcheck.sup @@ -24,6 +24,7 @@ useStlAlgorithm // Errors/limitations in the generated yacc and lex files cstyleCast:lexor.cc constVariablePointer:lexor.cc +duplicateBreak:lexor.cc redundantInitialization:lexor.cc unusedFunction:lexor.cc unusedStructMember:lexor.cc @@ -32,7 +33,9 @@ duplicateBreak:lexor.lex redundantInitialization:lexor.lex uselessAssignmentPtrArg:lexor.lex constParameterPointer:parse.cc +invalidPrintfArgType_sint:parse.cc knownConditionTrueFalse:parse.cc +unsignedPositive:parse.cc // Unused functions unusedFunction:LineInfo.h diff --git a/vhdlpp/library.cc b/vhdlpp/library.cc index b59bc7990..b72a7d896 100644 --- a/vhdlpp/library.cc +++ b/vhdlpp/library.cc @@ -78,7 +78,6 @@ void library_add_directory(const char*directory) SubprogramHeader*library_match_subprogram(perm_string name, const list*params) { - SubprogramHeader*subp; map::const_iterator lib_it; for(lib_it = libraries.begin(); lib_it != libraries.end(); ++lib_it) { @@ -86,6 +85,7 @@ SubprogramHeader*library_match_subprogram(perm_string name, const list::const_iterator pack_it; for(pack_it = lib.packages.begin(); pack_it != lib.packages.end(); ++pack_it) { + SubprogramHeader*subp; if((subp = pack_it->second->match_subprogram(name, params))) return subp; } diff --git a/vpi/cppcheck.sup b/vpi/cppcheck.sup index 078495990..c69de0859 100644 --- a/vpi/cppcheck.sup +++ b/vpi/cppcheck.sup @@ -280,6 +280,8 @@ unusedFunction:fastlz.c:418 // lz4.c from GTKWave bitwiseOnBoolean:lz4.c constVariablePointer:lz4.c +invalidPrintfArgType_sint:lz4.c +invalidPrintfArgType_uint:lz4.c staticFunction:lz4.c syntaxError:lz4.c unusedStructMember:lz4.c @@ -359,6 +361,8 @@ variableScope:sys_random.c:47 variableScope:sys_random.c:70 variableScope:sys_random.c:93 variableScope:sys_random.c:148 +// Also a comparison warning. +compareValueOutOfTypeRangeError:sys_random.c:195 // Issues in Lex/Yacc files allocaCalled:sdf_parse.c diff --git a/vvp/compile.cc b/vvp/compile.cc index 5c0460086..7cfa13005 100644 --- a/vvp/compile.cc +++ b/vvp/compile.cc @@ -1573,7 +1573,7 @@ struct __vpiModPath* compile_modpath(char*label, unsigned width, } static struct __vpiModPathSrc*make_modpath_src(struct __vpiModPath*path, - char edge, + char edge_c, const struct symb_s&src, struct numbv_s&vals, bool ifnone) @@ -1591,12 +1591,12 @@ static struct __vpiModPathSrc*make_modpath_src(struct __vpiModPath*path, vvp_fun_modpath_src*obj = 0; int vpi_edge = vpiNoEdge; - if (edge == 0) { + if (edge_c == 0) { obj = new vvp_fun_modpath_src(use_delay); } else { bool posedge, negedge; - switch (edge) { + switch (edge_c) { case '+': vpi_edge = vpiPosedge; posedge = true; @@ -1616,8 +1616,8 @@ static struct __vpiModPathSrc*make_modpath_src(struct __vpiModPath*path, default: posedge = false; negedge = false; - fprintf(stderr, "Unknown edge identifier %c(%d).\n", edge, - edge); + fprintf(stderr, "Unknown edge identifier %c(%d).\n", edge_c, + edge_c); assert(0); } obj = new vvp_fun_modpath_edge(use_delay, posedge, negedge); @@ -1636,19 +1636,19 @@ static struct __vpiModPathSrc*make_modpath_src(struct __vpiModPath*path, return srcobj; } -void compile_modpath_src(struct __vpiModPath*dst, char edge, +void compile_modpath_src(struct __vpiModPath*dst, char edge_c, const struct symb_s&src, struct numbv_s&vals, const struct symb_s&condit_src, const struct symb_s&path_term_in) { struct __vpiModPathSrc*obj = - make_modpath_src(dst, edge, src, vals, false); + make_modpath_src(dst, edge_c, src, vals, false); input_connect(obj->net, 1, condit_src.text); compile_vpi_lookup(&obj->path_term_in.expr, path_term_in.text); } -void compile_modpath_src(struct __vpiModPath*dst, char edge, +void compile_modpath_src(struct __vpiModPath*dst, char edge_c, const struct symb_s&src, struct numbv_s&vals, int condit_src, @@ -1657,7 +1657,7 @@ void compile_modpath_src(struct __vpiModPath*dst, char edge, { assert(condit_src == 0); struct __vpiModPathSrc*obj = - make_modpath_src(dst, edge, src, vals, ifnone); + make_modpath_src(dst, edge_c, src, vals, ifnone); compile_vpi_lookup(&obj->path_term_in.expr, path_term_in.text); } diff --git a/vvp/compile.h b/vvp/compile.h index d19263ae5..cccc2391a 100644 --- a/vvp/compile.h +++ b/vvp/compile.h @@ -242,13 +242,13 @@ extern __vpiModPath* compile_modpath(char*label, struct symb_s drv, struct symb_s dest); extern void compile_modpath_src(__vpiModPath*dst, - char edge, + char edge_c, const struct symb_s&src, struct numbv_s&vals, const struct symb_s&condit_src, const struct symb_s&path_term_in); extern void compile_modpath_src(__vpiModPath*dst, - char edge, + char edge_c, const struct symb_s&src, struct numbv_s&vals, int condit_src, /* match with '0' */ diff --git a/vvp/delay.cc b/vvp/delay.cc index 49954b13d..af5224580 100644 --- a/vvp/delay.cc +++ b/vvp/delay.cc @@ -626,7 +626,7 @@ void vvp_fun_modpath::recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit, typedef list::const_iterator iter_t; iter_t cur = candidate_list.begin(); - vvp_fun_modpath_src*src = *cur; + const vvp_fun_modpath_src*src = *cur; for (unsigned idx = 0 ; idx < 12 ; idx += 1) { out_at[idx] = src->wake_time_ + src->delay_[idx]; diff --git a/vvp/vpip_to_dec.cc b/vvp/vpip_to_dec.cc index 5bb686d62..96c928c7e 100644 --- a/vvp/vpip_to_dec.cc +++ b/vvp/vpip_to_dec.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008-2025 Stephen Williams + * Copyright (c) 2008-2026 Stephen Williams * Copyright (c) 2002 Larry Doolittle (larry@doolittle.boa.org) * * This source code is free software; you can redistribute it @@ -58,6 +58,11 @@ #define B_ISX(x) ((x) == 2) #define B_ISZ(x) ((x) == 3) +/* Jump through some hoops so we don't have to malloc/free valv + * on every call, and implement an optional malloc-less version. */ +static unsigned long *valv=NULL; +static unsigned int vlen_alloc=0; + /* The program works by building a base BASE representation of the number * in the valv array. BBITS bits of the number can be put in at a time. * Previous values of each valv element are always less than BASE, the @@ -68,7 +73,7 @@ * less than or equal to 2^BBITS. BBITS and BASE are configured above * to depend on the "unsigned long" length of the host, for efficiency. */ -static inline void shift_in(unsigned long *valv, unsigned int vlen, unsigned long val) +static inline void shift_in(unsigned int vlen, unsigned long val) { unsigned int i; /* printf("shift in %u\n",val); */ @@ -103,11 +108,6 @@ static inline int write_digits(unsigned long v, char **buf, return zero_suppress; } -/* Jump through some hoops so we don't have to malloc/free valv - * on every call, and implement an optional malloc-less version. */ -static unsigned long *valv=NULL; -static unsigned int vlen_alloc=0; - #ifdef CHECK_WITH_VALGRIND void dec_str_delete(void) { @@ -179,7 +179,7 @@ unsigned vpip_vec4_to_dec_str(const vvp_vector4_t&vec4, if ((mbits-idx-1)%BBITS==0) { /* make negative 2's complement, not 1's complement */ if (comp && idx==mbits-1) ++val; - shift_in(valv,vlen,val); + shift_in(vlen,val); val=0; } else { val=val+val; diff --git a/vvp/vvp_island.h b/vvp/vvp_island.h index 9841f6bbe..68c31373e 100644 --- a/vvp/vvp_island.h +++ b/vvp/vvp_island.h @@ -218,7 +218,7 @@ struct vvp_island_branch { static inline vvp_branch_ptr_t next(vvp_branch_ptr_t cur) { - vvp_island_branch*ptr = cur.ptr(); + const vvp_island_branch*ptr = cur.ptr(); unsigned ab = cur.port(); return ptr->link[ab]; }