diff --git a/driver/main.c b/driver/main.c index f6cb3ab09..a2b15e167 100644 --- a/driver/main.c +++ b/driver/main.c @@ -642,7 +642,7 @@ int main(int argc, char **argv) { int e_flag = 0; int version_flag = 0; - int opt, idx, rc; + int opt, idx; #ifdef __MINGW32__ { char * s; @@ -774,8 +774,7 @@ int main(int argc, char **argv) break; case 'g': - rc = process_generation(optarg); - if (rc != 0) + if (process_generation(optarg) != 0) return -1; break; case 'h': diff --git a/tgt-stub/expression.c b/tgt-stub/expression.c index 192ba9679..204709e46 100644 --- a/tgt-stub/expression.c +++ b/tgt-stub/expression.c @@ -331,9 +331,9 @@ void show_expression(ivl_expr_t net, unsigned ind) ind, "", ivl_expr_name(net), width, sign, vt, ivl_expr_file(net), ivl_expr_lineno(net)); { unsigned cnt = ivl_expr_parms(net); - unsigned idx; - for (idx = 0 ; idx < cnt ; idx += 1) - show_expression(ivl_expr_parm(net, idx), ind+3); + unsigned jdx; + for (jdx = 0 ; jdx < cnt ; jdx += 1) + show_expression(ivl_expr_parm(net, jdx), ind+3); } break; @@ -355,15 +355,15 @@ void show_expression(ivl_expr_t net, unsigned ind) case IVL_EX_REALNUM: { - int idx; + int jdx; union foo { double rv; unsigned char bv[sizeof(double)]; } tmp; tmp.rv = ivl_expr_dvalue(net); fprintf(out, "%*s 0 ; idx -= 1) - fprintf(out, "%02x", tmp.bv[idx-1]); + for (jdx = sizeof(double) ; jdx > 0 ; jdx -= 1) + fprintf(out, "%02x", tmp.bv[jdx-1]); fprintf(out, ")"); if (par != 0) fprintf(out, ", parameter=%s", diff --git a/tgt-stub/statement.c b/tgt-stub/statement.c index 807c64e99..652ea6a3f 100644 --- a/tgt-stub/statement.c +++ b/tgt-stub/statement.c @@ -239,7 +239,6 @@ void show_statement(ivl_statement_t net, unsigned ind) case IVL_ST_CASER: case IVL_ST_CASE: { unsigned cnt = ivl_stmt_case_count(net); - unsigned idx; fprintf(out, "%*scase (...) <%u cases>\n", ind, "", cnt); show_expression(ivl_stmt_cond_expr(net), ind+4); diff --git a/tgt-stub/stub.c b/tgt-stub/stub.c index 112ecda05..4e8e0ecf6 100644 --- a/tgt-stub/stub.c +++ b/tgt-stub/stub.c @@ -1208,7 +1208,6 @@ static void show_nexus_details(ivl_signal_t net, ivl_nexus_t nex) static void show_signal(ivl_signal_t net) { unsigned idx; - ivl_nexus_t nex; const char*type = "?"; const char*port = ""; @@ -1277,7 +1276,7 @@ static void show_signal(ivl_signal_t net) for (idx = 0 ; idx < ivl_signal_array_count(net) ; idx += 1) { - nex = ivl_signal_nex(net, idx); + ivl_nexus_t nex = ivl_signal_nex(net, idx); fprintf(out, " %s %s %s%s[%d:%d] %s[word=%u, adr=%d] nexus=%s\n", type, sign, port, data_type, diff --git a/tgt-vvp/draw_net_input.c b/tgt-vvp/draw_net_input.c index 17b368f23..b318308d1 100644 --- a/tgt-vvp/draw_net_input.c +++ b/tgt-vvp/draw_net_input.c @@ -146,27 +146,27 @@ static struct vvp_nexus_data*new_nexus_data() static int nexus_drive_is_strength_aware(ivl_nexus_ptr_t nptr) { - ivl_net_logic_t log; + ivl_net_logic_t logic; if (ivl_nexus_ptr_drive0(nptr) != IVL_DR_STRONG) return 1; if (ivl_nexus_ptr_drive1(nptr) != IVL_DR_STRONG) return 1; - log = ivl_nexus_ptr_log(nptr); - if (log != 0) { + logic = ivl_nexus_ptr_log(nptr); + if (logic != 0) { /* These logic gates are able to generate unusual strength values and so their outputs are considered strength aware. */ - if (ivl_logic_type(log) == IVL_LO_BUFIF0) + if (ivl_logic_type(logic) == IVL_LO_BUFIF0) return 1; - if (ivl_logic_type(log) == IVL_LO_BUFIF1) + if (ivl_logic_type(logic) == IVL_LO_BUFIF1) return 1; - if (ivl_logic_type(log) == IVL_LO_PMOS) + if (ivl_logic_type(logic) == IVL_LO_PMOS) return 1; - if (ivl_logic_type(log) == IVL_LO_NMOS) + if (ivl_logic_type(logic) == IVL_LO_NMOS) return 1; - if (ivl_logic_type(log) == IVL_LO_CMOS) + if (ivl_logic_type(logic) == IVL_LO_CMOS) return 1; } @@ -586,22 +586,22 @@ char* draw_net_input_x(ivl_nexus_t nex, /* If the nexus has no drivers, then send a constant HiZ into the net. */ if (ndrivers == 0) { - unsigned idx, wid = width_of_nexus(nex); + unsigned jdx, wid = width_of_nexus(nex); char*tmp = malloc(wid + 5); nex_private = tmp; strcpy(tmp, "C4<"); tmp += strlen(tmp); switch (res) { case IVL_SIT_TRI: - for (idx = 0 ; idx < wid ; idx += 1) + for (jdx = 0 ; jdx < wid ; jdx += 1) *tmp++ = 'z'; break; case IVL_SIT_TRI0: - for (idx = 0 ; idx < wid ; idx += 1) + for (jdx = 0 ; jdx < wid ; jdx += 1) *tmp++ = '0'; break; case IVL_SIT_TRI1: - for (idx = 0 ; idx < wid ; idx += 1) + for (jdx = 0 ; jdx < wid ; jdx += 1) *tmp++ = '1'; break; default: @@ -610,9 +610,9 @@ char* draw_net_input_x(ivl_nexus_t nex, *tmp++ = '>'; *tmp = 0; if (island) { - char*tmp = draw_island_port(island, nex, nex_private); + char*tmp2 = draw_island_port(island, nex, nex_private); free(nex_private); - nex_private = tmp; + nex_private = tmp2; } return nex_private; } diff --git a/tgt-vvp/eval_bool.c b/tgt-vvp/eval_bool.c index 07c61d682..9070b2d7b 100644 --- a/tgt-vvp/eval_bool.c +++ b/tgt-vvp/eval_bool.c @@ -46,12 +46,12 @@ * Evaluate the bool64 the hard way, by evaluating the logic vector * and converting it to a bool64. */ -static int eval_bool64_logic(ivl_expr_t exp) +static int eval_bool64_logic(ivl_expr_t expr) { int res; struct vector_info tmp; - tmp = draw_eval_expr(exp, STUFF_OK_XZ); + tmp = draw_eval_expr(expr, STUFF_OK_XZ); res = allocate_word(); fprintf(vvp_out, " %%ix/get %d, %u, %u;\n", res, tmp.base, tmp.wid); clr_vector(tmp); @@ -59,14 +59,14 @@ static int eval_bool64_logic(ivl_expr_t exp) return res; } -static int draw_number_bool64(ivl_expr_t exp) +static int draw_number_bool64(ivl_expr_t expr) { int res; - const char*bits = ivl_expr_bits(exp); + const char*bits = ivl_expr_bits(expr); uint64_t val = 0; unsigned long idx; - for (idx = 0 ; idx < ivl_expr_width(exp) ; idx += 1) { + for (idx = 0 ; idx < ivl_expr_width(expr) ; idx += 1) { if (bits[idx] == '1') val |= 1UL << idx; } @@ -76,16 +76,16 @@ static int draw_number_bool64(ivl_expr_t exp) return res; } -int draw_eval_bool64(ivl_expr_t exp) +int draw_eval_bool64(ivl_expr_t expr) { int res; - switch (ivl_expr_type(exp)) { + switch (ivl_expr_type(expr)) { case IVL_EX_NUMBER: - res = draw_number_bool64(exp); + res = draw_number_bool64(expr); break; default: - res = eval_bool64_logic(exp); + res = eval_bool64_logic(expr); break; } diff --git a/tgt-vvp/eval_expr.c b/tgt-vvp/eval_expr.c index 1c22c394b..fe9412b0c 100644 --- a/tgt-vvp/eval_expr.c +++ b/tgt-vvp/eval_expr.c @@ -1727,8 +1727,8 @@ static struct vector_info draw_number_expr(ivl_expr_t exp, unsigned wid) immediate. In this case we generate a single %movi instruction. */ if ((!number_is_unknown(exp)) && number_is_immediate(exp, IMM_WID,0)) { - unsigned long val = get_number_immediate(exp); - fprintf(vvp_out, " %%movi %u, %lu, %u;\n", res.base, val, wid); + unsigned long val2 = get_number_immediate(exp); + fprintf(vvp_out, " %%movi %u, %lu, %u;\n", res.base, val2, wid); return res; } diff --git a/tgt-vvp/eval_real.c b/tgt-vvp/eval_real.c index f2b577ba1..7470cc8da 100644 --- a/tgt-vvp/eval_real.c +++ b/tgt-vvp/eval_real.c @@ -51,14 +51,14 @@ void clr_word(int res) word_alloc_mask &= ~ (1U << res); } -static int draw_binary_real(ivl_expr_t exp) +static int draw_binary_real(ivl_expr_t expr) { int l, r = -1; /* If the opcode is a vector only opcode then the sub expression * must not be a real expression, so use vector evaluation and * then convert that result to a real value. */ - switch (ivl_expr_opcode(exp)) { + switch (ivl_expr_opcode(expr)) { case 'E': case 'N': case 'l': @@ -75,9 +75,9 @@ static int draw_binary_real(ivl_expr_t exp) int res; const char*sign_flag; - vi = draw_eval_expr(exp, STUFF_OK_XZ); + vi = draw_eval_expr(expr, STUFF_OK_XZ); res = allocate_word(); - sign_flag = ivl_expr_signed(exp)? "/s" : ""; + sign_flag = ivl_expr_signed(expr)? "/s" : ""; fprintf(vvp_out, " %%ix/get%s %d, %u, %u;\n", sign_flag, res, vi.base, vi.wid); @@ -88,10 +88,10 @@ static int draw_binary_real(ivl_expr_t exp) } } - l = draw_eval_real(ivl_expr_oper1(exp)); - r = draw_eval_real(ivl_expr_oper2(exp)); + l = draw_eval_real(ivl_expr_oper1(expr)); + r = draw_eval_real(ivl_expr_oper2(expr)); - switch (ivl_expr_opcode(exp)) { + switch (ivl_expr_opcode(expr)) { case '+': fprintf(vvp_out, " %%add/wr %d, %d;\n", l, r); @@ -153,7 +153,7 @@ static int draw_binary_real(ivl_expr_t exp) } default: fprintf(stderr, "XXXX draw_binary_real(%c)\n", - ivl_expr_opcode(exp)); + ivl_expr_opcode(expr)); assert(0); } @@ -162,12 +162,12 @@ static int draw_binary_real(ivl_expr_t exp) return l; } -static int draw_number_real(ivl_expr_t exp) +static int draw_number_real(ivl_expr_t expr) { unsigned int idx; int res = allocate_word(); - const char*bits = ivl_expr_bits(exp); - unsigned wid = ivl_expr_width(exp); + const char*bits = ivl_expr_bits(expr); + unsigned wid = ivl_expr_width(expr); unsigned long mant = 0, mask = -1UL; int vexp = 0x1000; @@ -178,7 +178,7 @@ static int draw_number_real(ivl_expr_t exp) int negate = 0; int carry = 0; - if (ivl_expr_signed(exp) && (bits[wid-1] == '1')) { + if (ivl_expr_signed(expr) && (bits[wid-1] == '1')) { negate = 1; carry = 1; } @@ -198,7 +198,7 @@ static int draw_number_real(ivl_expr_t exp) } for ( ; idx < wid ; idx += 1) { - if (ivl_expr_signed(exp) && (bits[idx] == bits[IMM_WID-1])) + if (ivl_expr_signed(expr) && (bits[idx] == bits[IMM_WID-1])) continue; if (bits[idx] == '0') @@ -217,10 +217,10 @@ static int draw_number_real(ivl_expr_t exp) return res; } -static int draw_realnum_real(ivl_expr_t exp) +static int draw_realnum_real(ivl_expr_t expr) { int res = allocate_word(); - double value = ivl_expr_dvalue(exp); + double value = ivl_expr_dvalue(expr); double fract; int expo, vexp; @@ -260,7 +260,7 @@ static int draw_realnum_real(ivl_expr_t exp) vexp += sign; fprintf(vvp_out, " %%loadi/wr %d, %lu, %d; load=%g\n", - res, mant, vexp, ivl_expr_dvalue(exp)); + res, mant, vexp, ivl_expr_dvalue(expr)); /* Capture the residual bits, if there are any. Note that an IEEE754 mantissa has 52 bits, 31 of which were accounted @@ -278,7 +278,7 @@ static int draw_realnum_real(ivl_expr_t exp) if (mant != 0) { int tmp_word = allocate_word(); fprintf(vvp_out, " %%loadi/wr %d, %lu, %d; load=%g\n", - tmp_word, mant, vexp, ivl_expr_dvalue(exp)); + tmp_word, mant, vexp, ivl_expr_dvalue(expr)); fprintf(vvp_out, " %%add/wr %d, %d;\n", res, tmp_word); clr_word(tmp_word); } @@ -286,23 +286,23 @@ static int draw_realnum_real(ivl_expr_t exp) return res; } -static int draw_sfunc_real(ivl_expr_t exp) +static int draw_sfunc_real(ivl_expr_t expr) { struct vector_info sv; int res; const char*sign_flag = ""; - switch (ivl_expr_value(exp)) { + switch (ivl_expr_value(expr)) { case IVL_VT_REAL: - if (ivl_expr_parms(exp) == 0) { + if (ivl_expr_parms(expr) == 0) { res = allocate_word(); fprintf(vvp_out, " %%vpi_func/r %u %u \"%s\", %d;\n", - ivl_file_table_index(ivl_expr_file(exp)), - ivl_expr_lineno(exp), ivl_expr_name(exp), res); + ivl_file_table_index(ivl_expr_file(expr)), + ivl_expr_lineno(expr), ivl_expr_name(expr), res); } else { - res = draw_vpi_rfunc_call(exp); + res = draw_vpi_rfunc_call(expr); } break; @@ -310,10 +310,10 @@ static int draw_sfunc_real(ivl_expr_t exp) /* If the value of the sfunc is a vector, then evaluate it as a vector, then convert the result to a real (via an index register) for the result. */ - sv = draw_eval_expr(exp, 0); + sv = draw_eval_expr(expr, 0); clr_vector(sv); - if (ivl_expr_signed(exp)) + if (ivl_expr_signed(expr)) sign_flag = "/s"; res = allocate_word(); @@ -335,11 +335,11 @@ static int draw_sfunc_real(ivl_expr_t exp) * The real value of a signal is the integer value of a signal * converted to real. */ -static int draw_signal_real_logic(ivl_expr_t exp) +static int draw_signal_real_logic(ivl_expr_t expr) { int res = allocate_word(); - struct vector_info sv = draw_eval_expr(exp, 0); - const char*sign_flag = ivl_expr_signed(exp)? "/s" : ""; + struct vector_info sv = draw_eval_expr(expr, 0); + const char*sign_flag = ivl_expr_signed(expr)? "/s" : ""; fprintf(vvp_out, " %%ix/get%s %d, %u, %u; logic signal as real\n", sign_flag, res, sv.base, sv.wid); @@ -350,9 +350,9 @@ static int draw_signal_real_logic(ivl_expr_t exp) return res; } -static int draw_signal_real_real(ivl_expr_t exp) +static int draw_signal_real_real(ivl_expr_t expr) { - ivl_signal_t sig = ivl_expr_signal(exp); + ivl_signal_t sig = ivl_expr_signal(expr); int res = allocate_word(); if (ivl_signal_dimensions(sig) == 0) { @@ -360,7 +360,7 @@ static int draw_signal_real_real(ivl_expr_t exp) return res; } - ivl_expr_t word_ex = ivl_expr_oper1(exp); + ivl_expr_t word_ex = ivl_expr_oper1(expr); int word_ix = allocate_word(); draw_eval_expr_into_integer(word_ex, word_ix); fprintf(vvp_out, " %%load/ar %d, v%p, %d;\n", res, sig, word_ix); @@ -368,14 +368,14 @@ static int draw_signal_real_real(ivl_expr_t exp) return res; } -static int draw_signal_real(ivl_expr_t exp) +static int draw_signal_real(ivl_expr_t expr) { - ivl_signal_t sig = ivl_expr_signal(exp); + ivl_signal_t sig = ivl_expr_signal(expr); switch (ivl_signal_data_type(sig)) { case IVL_VT_LOGIC: - return draw_signal_real_logic(exp); + return draw_signal_real_logic(expr); case IVL_VT_REAL: - return draw_signal_real_real(exp); + return draw_signal_real_real(expr); default: fprintf(stderr, "internal error: signal_data_type=%d\n", ivl_signal_data_type(sig)); @@ -384,11 +384,11 @@ static int draw_signal_real(ivl_expr_t exp) } } -static int draw_ternary_real(ivl_expr_t exp) +static int draw_ternary_real(ivl_expr_t expr) { - ivl_expr_t cond = ivl_expr_oper1(exp); - ivl_expr_t true_ex = ivl_expr_oper2(exp); - ivl_expr_t false_ex = ivl_expr_oper3(exp); + ivl_expr_t cond = ivl_expr_oper1(expr); + ivl_expr_t true_ex = ivl_expr_oper2(expr); + ivl_expr_t false_ex = ivl_expr_oper3(expr); struct vector_info tst; @@ -446,7 +446,7 @@ static int draw_ternary_real(ivl_expr_t exp) return res; } -static int draw_unary_real(ivl_expr_t exp) +static int draw_unary_real(ivl_expr_t expr) { ivl_expr_t sube; int sub; @@ -454,14 +454,14 @@ static int draw_unary_real(ivl_expr_t exp) /* If the opcode is a ~ then the sub expression must not be a * real expression, so use vector evaluation and then convert * that result to a real value. */ - if (ivl_expr_opcode(exp) == '~') { + if (ivl_expr_opcode(expr) == '~') { struct vector_info vi; int res; const char*sign_flag; - vi = draw_eval_expr(exp, STUFF_OK_XZ); + vi = draw_eval_expr(expr, STUFF_OK_XZ); res = allocate_word(); - sign_flag = ivl_expr_signed(exp)? "/s" : ""; + sign_flag = ivl_expr_signed(expr)? "/s" : ""; fprintf(vvp_out, " %%ix/get%s %d, %u, %u;\n", sign_flag, res, vi.base, vi.wid); @@ -471,14 +471,14 @@ static int draw_unary_real(ivl_expr_t exp) return res; } - if (ivl_expr_opcode(exp) == '!') { + if (ivl_expr_opcode(expr) == '!') { struct vector_info vi; int res; const char*sign_flag; - vi = draw_eval_expr(exp, STUFF_OK_XZ); + vi = draw_eval_expr(expr, STUFF_OK_XZ); res = allocate_word(); - sign_flag = ivl_expr_signed(exp)? "/s" : ""; + sign_flag = ivl_expr_signed(expr)? "/s" : ""; fprintf(vvp_out, " %%ix/get%s %d, %u, %u;\n", sign_flag, res, vi.base, vi.wid); @@ -488,13 +488,13 @@ static int draw_unary_real(ivl_expr_t exp) return res; } - sube = ivl_expr_oper1(exp); + sube = ivl_expr_oper1(expr); sub = draw_eval_real(sube); - if (ivl_expr_opcode(exp) == '+') + if (ivl_expr_opcode(expr) == '+') return sub; - if (ivl_expr_opcode(exp) == '-') { + if (ivl_expr_opcode(expr) == '-') { int res = allocate_word(); fprintf(vvp_out, " %%loadi/wr %d, 0, 0; load 0.0\n", res); fprintf(vvp_out, " %%sub/wr %d, %d;\n", res, sub); @@ -503,58 +503,58 @@ static int draw_unary_real(ivl_expr_t exp) return res; } - if (ivl_expr_opcode(exp) == 'm') { /* abs(sube) */ + if (ivl_expr_opcode(expr) == 'm') { /* abs(sube) */ fprintf(vvp_out, " %%abs/wr %d, %d;\n", sub, sub); return sub; } - fprintf(vvp_out, "; XXXX unary (%c) on sube in %d\n", ivl_expr_opcode(exp), sub); - fprintf(stderr, "XXXX evaluate unary (%c) on sube in %d\n", ivl_expr_opcode(exp), sub); + fprintf(vvp_out, "; XXXX unary (%c) on sube in %d\n", ivl_expr_opcode(expr), sub); + fprintf(stderr, "XXXX evaluate unary (%c) on sube in %d\n", ivl_expr_opcode(expr), sub); return 0; } -int draw_eval_real(ivl_expr_t exp) +int draw_eval_real(ivl_expr_t expr) { int res = 0; - switch (ivl_expr_type(exp)) { + switch (ivl_expr_type(expr)) { case IVL_EX_BINARY: - res = draw_binary_real(exp); + res = draw_binary_real(expr); break; case IVL_EX_NUMBER: - res = draw_number_real(exp); + res = draw_number_real(expr); break; case IVL_EX_REALNUM: - res = draw_realnum_real(exp); + res = draw_realnum_real(expr); break; case IVL_EX_SFUNC: - res = draw_sfunc_real(exp); + res = draw_sfunc_real(expr); break; case IVL_EX_SIGNAL: - res = draw_signal_real(exp); + res = draw_signal_real(expr); break; case IVL_EX_TERNARY: - res = draw_ternary_real(exp); + res = draw_ternary_real(expr); break; case IVL_EX_UFUNC: - res = draw_ufunc_real(exp); + res = draw_ufunc_real(expr); break; case IVL_EX_UNARY: - res = draw_unary_real(exp); + res = draw_unary_real(expr); break; default: - if (ivl_expr_value(exp) == IVL_VT_VECTOR) { - struct vector_info sv = draw_eval_expr(exp, 0); - const char*sign_flag = ivl_expr_signed(exp)? "/s" : ""; + if (ivl_expr_value(expr) == IVL_VT_VECTOR) { + struct vector_info sv = draw_eval_expr(expr, 0); + const char*sign_flag = ivl_expr_signed(expr)? "/s" : ""; clr_vector(sv); res = allocate_word(); @@ -566,9 +566,9 @@ int draw_eval_real(ivl_expr_t exp) } else { fprintf(stderr, "XXXX Evaluate real expression (%d)\n", - ivl_expr_type(exp)); + ivl_expr_type(expr)); fprintf(vvp_out, " ; XXXX Evaluate real expression (%d)\n", - ivl_expr_type(exp)); + ivl_expr_type(expr)); return 0; } break; diff --git a/vpi/sys_display.c b/vpi/sys_display.c index 36fef11ae..3f0c1fe9c 100644 --- a/vpi/sys_display.c +++ b/vpi/sys_display.c @@ -1759,7 +1759,7 @@ static unsigned int get_format(char **rtn, char *fmt, size += cnt; cp += cnt; } else { - int cnt, ljust = 0, plus = 0, ld_zero = 0, width = -1, prec = -1; + int ljust = 0, plus = 0, ld_zero = 0, width = -1, prec = -1; char *result; cp += 1; diff --git a/vpi/sys_lxt.c b/vpi/sys_lxt.c index f0ce99855..ac9972c57 100644 --- a/vpi/sys_lxt.c +++ b/vpi/sys_lxt.c @@ -315,7 +315,7 @@ static PLI_INT32 finish_cb(p_cb_data cause) __inline__ static int install_dumpvars_callback(void) { struct t_cb_data cb; - static struct t_vpi_time time; + static struct t_vpi_time now; if (dumpvars_status == 1) return 0; @@ -327,8 +327,8 @@ __inline__ static int install_dumpvars_callback(void) return 1; } - time.type = vpiSimTime; - cb.time = &time; + now.type = vpiSimTime; + cb.time = &now; cb.reason = cbReadOnlySynch; cb.cb_rtn = dumpvars_cb; cb.user_data = 0x0; diff --git a/vpi/sys_lxt2.c b/vpi/sys_lxt2.c index 2e3fb0fb8..65c1a0d02 100644 --- a/vpi/sys_lxt2.c +++ b/vpi/sys_lxt2.c @@ -314,7 +314,7 @@ static PLI_INT32 finish_cb(p_cb_data cause) __inline__ static int install_dumpvars_callback(void) { struct t_cb_data cb; - static struct t_vpi_time time; + static struct t_vpi_time now; if (dumpvars_status == 1) return 0; @@ -325,8 +325,8 @@ __inline__ static int install_dumpvars_callback(void) return 1; } - time.type = vpiSimTime; - cb.time = &time; + now.type = vpiSimTime; + cb.time = &now; cb.reason = cbReadOnlySynch; cb.cb_rtn = dumpvars_cb; cb.user_data = 0x0; diff --git a/vpi/sys_random.c b/vpi/sys_random.c index dc27b0466..3e2e8dec7 100644 --- a/vpi/sys_random.c +++ b/vpi/sys_random.c @@ -338,11 +338,11 @@ static double chi_square(long *seed, long deg_of_free) static double t( long *seed, long deg_of_free) { - double x, chi2, div, root; + double x, chi2, dv, root; chi2 = chi_square(seed, deg_of_free); - div = chi2 / (double) deg_of_free; - root = sqrt(div); + dv = chi2 / (double) deg_of_free; + root = sqrt(dv); x = normal(seed, 0, 1) / root; return x; diff --git a/vpi/sys_readmem.c b/vpi/sys_readmem.c index 614f6548a..a7381f53f 100644 --- a/vpi/sys_readmem.c +++ b/vpi/sys_readmem.c @@ -229,20 +229,20 @@ static PLI_INT32 sys_readmem_calltf(PLI_BYTE8*name) addr_incr = 1; } else{ - s_vpi_value value; - value.format = vpiIntVal; - vpi_get_value(start_item, &value); - start_addr = value.value.integer; + s_vpi_value value2; + value2.format = vpiIntVal; + vpi_get_value(start_item, &value2); + start_addr = value2.value.integer; if (stop_item==0){ stop_addr = left_addr