From 9cac88330bf2ff393d554ff384f0b2112007bd5d Mon Sep 17 00:00:00 2001 From: steve Date: Sun, 26 Jun 2005 18:06:29 +0000 Subject: [PATCH] AND gates propogate through scheduler, not directly. --- vvp/logic.cc | 33 +++++++++++++++++++++++++-------- vvp/logic.h | 18 ++++++++++++++---- 2 files changed, 39 insertions(+), 12 deletions(-) diff --git a/vvp/logic.cc b/vvp/logic.cc index 672124129..bc81d3659 100644 --- a/vvp/logic.cc +++ b/vvp/logic.cc @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: logic.cc,v 1.29 2005/06/22 00:04:49 steve Exp $" +#ident "$Id: logic.cc,v 1.30 2005/06/26 18:06:29 steve Exp $" #endif # include "logic.h" @@ -25,6 +25,7 @@ # include "bufif.h" # include "npmos.h" # include "schedule.h" +# include "delay.h" # include "statistics.h" # include # include @@ -79,6 +80,21 @@ void table_functor_s::recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&val) vvp_send_vec4(ptr.ptr()->out, result); } +vvp_fun_boolean_::~vvp_fun_boolean_() +{ +} + +void vvp_fun_boolean_::recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit) +{ + unsigned port = ptr.port(); + if (input_[port] .eeq( bit )) + return; + + input_[ptr.port()] = bit; + net_ = ptr.ptr(); + schedule_generic(this, 0, false); +} + vvp_fun_and::vvp_fun_and() { } @@ -87,15 +103,13 @@ vvp_fun_and::~vvp_fun_and() { } -void vvp_fun_and::recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit) +void vvp_fun_and::run_run() { - input_[ptr.port()] = bit; - - vvp_vector4_t result (bit); + vvp_vector4_t result (input_[0]); for (unsigned idx = 0 ; idx < result.size() ; idx += 1) { - vvp_bit4_t bitbit = BIT4_1; - for (unsigned pdx = 0 ; pdx < 4 ; pdx += 1) { + vvp_bit4_t bitbit = result.value(idx); + for (unsigned pdx = 1 ; pdx < 4 ; pdx += 1) { if (input_[pdx].size() < idx) { bitbit = BIT4_X; break; @@ -107,7 +121,7 @@ void vvp_fun_and::recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit) result.set_bit(idx, bitbit); } - vvp_send_vec4(ptr.ptr()->out, result); + vvp_send_vec4(net_->out, result); } vvp_fun_buf::vvp_fun_buf() @@ -356,6 +370,9 @@ void compile_functor(char*label, char*type, unsigned width, /* * $Log: logic.cc,v $ + * Revision 1.30 2005/06/26 18:06:29 steve + * AND gates propogate through scheduler, not directly. + * * Revision 1.29 2005/06/22 00:04:49 steve * Reduce vvp_vector4 copies by using const references. * diff --git a/vvp/logic.h b/vvp/logic.h index 0f5ea0a3a..5b282b64f 100644 --- a/vvp/logic.h +++ b/vvp/logic.h @@ -19,11 +19,11 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: logic.h,v 1.19 2005/06/22 00:04:49 steve Exp $" +#ident "$Id: logic.h,v 1.20 2005/06/26 18:06:30 steve Exp $" #endif # include "vvp_net.h" -# include "delay.h" +# include "schedule.h" # include /* @@ -49,10 +49,15 @@ class table_functor_s: public vvp_net_fun_t { /* * vvp_fun_boolean_ is just a common hook for holding operands. */ -class vvp_fun_boolean_ : public vvp_net_fun_t { +class vvp_fun_boolean_ : public vvp_net_fun_t, protected vvp_gen_event_s { + + public: + ~vvp_fun_boolean_(); + void recv_vec4(vvp_net_ptr_t p, const vvp_vector4_t&bit); protected: vvp_vector4_t input_[4]; + vvp_net_t*net_; }; class vvp_fun_and : public vvp_fun_boolean_ { @@ -60,7 +65,9 @@ class vvp_fun_and : public vvp_fun_boolean_ { public: explicit vvp_fun_and(); ~vvp_fun_and(); - void recv_vec4(vvp_net_ptr_t p, const vvp_vector4_t&bit); + + private: + void run_run(); }; /* @@ -135,6 +142,9 @@ extern const unsigned char ft_XOR[]; /* * $Log: logic.h,v $ + * Revision 1.20 2005/06/26 18:06:30 steve + * AND gates propogate through scheduler, not directly. + * * Revision 1.19 2005/06/22 00:04:49 steve * Reduce vvp_vector4 copies by using const references. *