From 9b807c78d3204a1bf2d3de9d18000ccd023aa1ec Mon Sep 17 00:00:00 2001
From: Stephen Williams <steve@icarus.com>
Date: Sun, 12 Aug 2007 20:27:38 -0700
Subject: [PATCH]  Prepare for 20070812 snapshot

---
 verilog.spec | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/verilog.spec b/verilog.spec
index ec055b703..2c29bbb10 100644
--- a/verilog.spec
+++ b/verilog.spec
@@ -1,14 +1,14 @@
 Summary: Icarus Verilog
 Name: verilog
-Version: 0.9.0.20070608
+Version: 0.9.0.20070812
 Release: 0
 License: GPL
 Group: Productivity/Scientific/Electronics
-Source: verilog-20070608.tar.gz
+Source: verilog-20070812.tar.gz
 URL: http://www.icarus.com/eda/verilog/index.html
 Packager: Stephen Williams <steve@icarus.com>
 
-BuildRoot: %{_tmppath}/%{name}-%{version}-20070608-%{release}-root
+BuildRoot: %{_tmppath}/%{name}-%{version}-20070812-%{release}-root
 
 BuildRequires: gcc-c++, zlib-devel, bison, flex, gperf, readline-devel
 
@@ -32,7 +32,7 @@ engineering formats, including simulation. It strives to be true
 to the IEEE-1364 standard.
 
 %prep
-%setup -n verilog-20070608
+%setup -n verilog-20070812
 
 %build
 %ifarch x86_64