From 90751b9250bcb419bae26fa1e154ad0d3eede995 Mon Sep 17 00:00:00 2001
From: steve <steve>
Date: Mon, 16 Sep 2002 21:55:06 +0000
Subject: [PATCH]  Reject multiple probes on synchronous logic.

---
 sync.cc | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/sync.cc b/sync.cc
index d0e9fac07..4acef4840 100644
--- a/sync.cc
+++ b/sync.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: sync.cc,v 1.1 2002/09/16 00:30:33 steve Exp $"
+#ident "$Id: sync.cc,v 1.2 2002/09/16 21:55:06 steve Exp $"
 #endif
 
 # include "config.h"
@@ -39,7 +39,7 @@ bool NetEvWait::is_synchronous()
       for (unsigned idx = 0 ;  idx < nevents_ ;  idx += 1) {
 	    NetEvent*ev = events_[idx];
 
-	    if (ev->nprobe() == 0)
+	    if (ev->nprobe() != 1)
 		  return false;
 
 	    for (unsigned pdx = 0 ;  pdx < ev->nprobe() ;  pdx += 1) {
@@ -67,6 +67,9 @@ bool NetProcTop::is_synchronous()
 
 /*
  * $Log: sync.cc,v $
+ * Revision 1.2  2002/09/16 21:55:06  steve
+ *  Reject multiple probes on synchronous logic.
+ *
  * Revision 1.1  2002/09/16 00:30:33  steve
  *  Add to synth2 support for synthesis of
  *  synchronous logic. This includes DFF enables